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110fa979 WY |
1 | /* |
2 | * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC | |
3 | * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC | |
4 | * | |
5 | * Copyright (C) 2013 Atmel, | |
6 | * 2013 Ludovic Desroches <ludovic.desroches@atmel.com> | |
7 | * | |
8 | * Licensed under GPLv2 or later. | |
9 | */ | |
10 | ||
11 | #include "skeleton.dtsi" | |
12 | #include <dt-bindings/dma/at91.h> | |
13 | #include <dt-bindings/pinctrl/at91.h> | |
14 | #include <dt-bindings/interrupt-controller/irq.h> | |
15 | #include <dt-bindings/gpio/gpio.h> | |
16 | #include <dt-bindings/clock/at91.h> | |
17 | ||
18 | / { | |
19 | model = "Atmel SAMA5D3 family SoC"; | |
20 | compatible = "atmel,sama5d3", "atmel,sama5"; | |
21 | interrupt-parent = <&aic>; | |
22 | ||
23 | aliases { | |
24 | serial0 = &dbgu; | |
25 | serial1 = &usart0; | |
26 | serial2 = &usart1; | |
27 | serial3 = &usart2; | |
28 | serial4 = &usart3; | |
29 | serial5 = &uart0; | |
30 | gpio0 = &pioA; | |
31 | gpio1 = &pioB; | |
32 | gpio2 = &pioC; | |
33 | gpio3 = &pioD; | |
34 | gpio4 = &pioE; | |
35 | tcb0 = &tcb0; | |
36 | i2c0 = &i2c0; | |
37 | i2c1 = &i2c1; | |
38 | i2c2 = &i2c2; | |
39 | ssc0 = &ssc0; | |
40 | ssc1 = &ssc1; | |
41 | pwm0 = &pwm0; | |
42 | }; | |
43 | cpus { | |
44 | #address-cells = <1>; | |
45 | #size-cells = <0>; | |
46 | cpu@0 { | |
47 | device_type = "cpu"; | |
48 | compatible = "arm,cortex-a5"; | |
49 | reg = <0x0>; | |
50 | }; | |
51 | }; | |
52 | ||
53 | pmu { | |
54 | compatible = "arm,cortex-a5-pmu"; | |
55 | interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>; | |
56 | }; | |
57 | ||
58 | memory { | |
59 | reg = <0x20000000 0x8000000>; | |
60 | }; | |
61 | ||
62 | clocks { | |
63 | slow_xtal: slow_xtal { | |
64 | compatible = "fixed-clock"; | |
65 | #clock-cells = <0>; | |
66 | clock-frequency = <0>; | |
67 | }; | |
68 | ||
69 | main_xtal: main_xtal { | |
70 | compatible = "fixed-clock"; | |
71 | #clock-cells = <0>; | |
72 | clock-frequency = <0>; | |
73 | }; | |
74 | ||
75 | adc_op_clk: adc_op_clk{ | |
76 | compatible = "fixed-clock"; | |
77 | #clock-cells = <0>; | |
78 | clock-frequency = <1000000>; | |
79 | }; | |
80 | }; | |
81 | ||
82 | sram: sram@00300000 { | |
83 | compatible = "mmio-sram"; | |
84 | reg = <0x00300000 0x20000>; | |
85 | }; | |
86 | ||
87 | ahb { | |
88 | compatible = "simple-bus"; | |
89 | #address-cells = <1>; | |
90 | #size-cells = <1>; | |
91 | ranges; | |
92 | u-boot,dm-pre-reloc; | |
93 | ||
94 | apb { | |
95 | compatible = "simple-bus"; | |
96 | #address-cells = <1>; | |
97 | #size-cells = <1>; | |
98 | ranges; | |
99 | u-boot,dm-pre-reloc; | |
100 | ||
101 | mmc0: mmc@f0000000 { | |
102 | compatible = "atmel,hsmci"; | |
103 | reg = <0xf0000000 0x600>; | |
104 | interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; | |
105 | dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>; | |
106 | dma-names = "rxtx"; | |
107 | pinctrl-names = "default"; | |
108 | pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>; | |
109 | status = "disabled"; | |
110 | #address-cells = <1>; | |
111 | #size-cells = <0>; | |
112 | clocks = <&mci0_clk>; | |
113 | clock-names = "mci_clk"; | |
114 | }; | |
115 | ||
116 | spi0: spi@f0004000 { | |
117 | #address-cells = <1>; | |
118 | #size-cells = <0>; | |
119 | compatible = "atmel,at91rm9200-spi"; | |
120 | reg = <0xf0004000 0x100>; | |
121 | interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; | |
122 | dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>, | |
123 | <&dma0 2 AT91_DMA_CFG_PER_ID(2)>; | |
124 | dma-names = "tx", "rx"; | |
125 | pinctrl-names = "default"; | |
126 | pinctrl-0 = <&pinctrl_spi0>; | |
127 | clocks = <&spi0_clk>; | |
128 | clock-names = "spi_clk"; | |
129 | status = "disabled"; | |
130 | }; | |
131 | ||
132 | ssc0: ssc@f0008000 { | |
133 | compatible = "atmel,at91sam9g45-ssc"; | |
134 | reg = <0xf0008000 0x4000>; | |
135 | interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>; | |
136 | dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>, | |
137 | <&dma0 2 AT91_DMA_CFG_PER_ID(14)>; | |
138 | dma-names = "tx", "rx"; | |
139 | pinctrl-names = "default"; | |
140 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | |
141 | clocks = <&ssc0_clk>; | |
142 | clock-names = "pclk"; | |
143 | status = "disabled"; | |
144 | }; | |
145 | ||
146 | tcb0: timer@f0010000 { | |
147 | compatible = "atmel,at91sam9x5-tcb"; | |
148 | reg = <0xf0010000 0x100>; | |
149 | interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; | |
150 | clocks = <&tcb0_clk>, <&clk32k>; | |
151 | clock-names = "t0_clk", "slow_clk"; | |
152 | }; | |
153 | ||
154 | i2c0: i2c@f0014000 { | |
155 | compatible = "atmel,at91sam9x5-i2c"; | |
156 | reg = <0xf0014000 0x4000>; | |
157 | interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>; | |
158 | dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>, | |
159 | <&dma0 2 AT91_DMA_CFG_PER_ID(8)>; | |
160 | dma-names = "tx", "rx"; | |
161 | pinctrl-names = "default"; | |
162 | pinctrl-0 = <&pinctrl_i2c0>; | |
163 | #address-cells = <1>; | |
164 | #size-cells = <0>; | |
165 | clocks = <&twi0_clk>; | |
166 | status = "disabled"; | |
167 | }; | |
168 | ||
169 | i2c1: i2c@f0018000 { | |
170 | compatible = "atmel,at91sam9x5-i2c"; | |
171 | reg = <0xf0018000 0x4000>; | |
172 | interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>; | |
173 | dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>, | |
174 | <&dma0 2 AT91_DMA_CFG_PER_ID(10)>; | |
175 | dma-names = "tx", "rx"; | |
176 | pinctrl-names = "default"; | |
177 | pinctrl-0 = <&pinctrl_i2c1>; | |
178 | #address-cells = <1>; | |
179 | #size-cells = <0>; | |
180 | clocks = <&twi1_clk>; | |
181 | status = "disabled"; | |
182 | }; | |
183 | ||
184 | usart0: serial@f001c000 { | |
185 | compatible = "atmel,at91sam9260-usart"; | |
186 | reg = <0xf001c000 0x100>; | |
187 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; | |
188 | dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>, | |
189 | <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; | |
190 | dma-names = "tx", "rx"; | |
191 | pinctrl-names = "default"; | |
192 | pinctrl-0 = <&pinctrl_usart0>; | |
193 | clocks = <&usart0_clk>; | |
194 | clock-names = "usart"; | |
195 | status = "disabled"; | |
196 | }; | |
197 | ||
198 | usart1: serial@f0020000 { | |
199 | compatible = "atmel,at91sam9260-usart"; | |
200 | reg = <0xf0020000 0x100>; | |
201 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>; | |
202 | dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>, | |
203 | <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>; | |
204 | dma-names = "tx", "rx"; | |
205 | pinctrl-names = "default"; | |
206 | pinctrl-0 = <&pinctrl_usart1>; | |
207 | clocks = <&usart1_clk>; | |
208 | clock-names = "usart"; | |
209 | status = "disabled"; | |
210 | }; | |
211 | ||
212 | uart0: serial@f0024000 { | |
213 | compatible = "atmel,at91sam9260-usart"; | |
214 | reg = <0xf0024000 0x100>; | |
215 | interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; | |
216 | pinctrl-names = "default"; | |
217 | pinctrl-0 = <&pinctrl_uart0>; | |
218 | clocks = <&uart0_clk>; | |
219 | clock-names = "usart"; | |
220 | status = "disabled"; | |
221 | }; | |
222 | ||
223 | pwm0: pwm@f002c000 { | |
224 | compatible = "atmel,sama5d3-pwm"; | |
225 | reg = <0xf002c000 0x300>; | |
226 | interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>; | |
227 | #pwm-cells = <3>; | |
228 | clocks = <&pwm_clk>; | |
229 | status = "disabled"; | |
230 | }; | |
231 | ||
232 | isi: isi@f0034000 { | |
233 | compatible = "atmel,at91sam9g45-isi"; | |
234 | reg = <0xf0034000 0x4000>; | |
235 | interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>; | |
236 | pinctrl-names = "default"; | |
237 | pinctrl-0 = <&pinctrl_isi_data_0_7>; | |
238 | clocks = <&isi_clk>; | |
239 | clock-names = "isi_clk"; | |
240 | status = "disabled"; | |
241 | port { | |
242 | #address-cells = <1>; | |
243 | #size-cells = <0>; | |
244 | }; | |
245 | }; | |
246 | ||
247 | sfr: sfr@f0038000 { | |
248 | compatible = "atmel,sama5d3-sfr", "syscon"; | |
249 | reg = <0xf0038000 0x60>; | |
250 | }; | |
251 | ||
252 | mmc1: mmc@f8000000 { | |
253 | compatible = "atmel,hsmci"; | |
254 | reg = <0xf8000000 0x600>; | |
255 | interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>; | |
256 | dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>; | |
257 | dma-names = "rxtx"; | |
258 | pinctrl-names = "default"; | |
259 | pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>; | |
260 | status = "disabled"; | |
261 | #address-cells = <1>; | |
262 | #size-cells = <0>; | |
263 | clocks = <&mci1_clk>; | |
264 | clock-names = "mci_clk"; | |
265 | }; | |
266 | ||
267 | spi1: spi@f8008000 { | |
268 | #address-cells = <1>; | |
269 | #size-cells = <0>; | |
270 | compatible = "atmel,at91rm9200-spi"; | |
271 | reg = <0xf8008000 0x100>; | |
272 | interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>; | |
273 | dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>, | |
274 | <&dma1 2 AT91_DMA_CFG_PER_ID(16)>; | |
275 | dma-names = "tx", "rx"; | |
276 | pinctrl-names = "default"; | |
277 | pinctrl-0 = <&pinctrl_spi1>; | |
278 | clocks = <&spi1_clk>; | |
279 | clock-names = "spi_clk"; | |
280 | status = "disabled"; | |
281 | }; | |
282 | ||
283 | ssc1: ssc@f800c000 { | |
284 | compatible = "atmel,at91sam9g45-ssc"; | |
285 | reg = <0xf800c000 0x4000>; | |
286 | interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>; | |
287 | dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>, | |
288 | <&dma1 2 AT91_DMA_CFG_PER_ID(4)>; | |
289 | dma-names = "tx", "rx"; | |
290 | pinctrl-names = "default"; | |
291 | pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; | |
292 | clocks = <&ssc1_clk>; | |
293 | clock-names = "pclk"; | |
294 | status = "disabled"; | |
295 | }; | |
296 | ||
297 | adc0: adc@f8018000 { | |
298 | #address-cells = <1>; | |
299 | #size-cells = <0>; | |
300 | compatible = "atmel,at91sam9x5-adc"; | |
301 | reg = <0xf8018000 0x100>; | |
302 | interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>; | |
303 | pinctrl-names = "default"; | |
304 | pinctrl-0 = < | |
305 | &pinctrl_adc0_adtrg | |
306 | &pinctrl_adc0_ad0 | |
307 | &pinctrl_adc0_ad1 | |
308 | &pinctrl_adc0_ad2 | |
309 | &pinctrl_adc0_ad3 | |
310 | &pinctrl_adc0_ad4 | |
311 | &pinctrl_adc0_ad5 | |
312 | &pinctrl_adc0_ad6 | |
313 | &pinctrl_adc0_ad7 | |
314 | &pinctrl_adc0_ad8 | |
315 | &pinctrl_adc0_ad9 | |
316 | &pinctrl_adc0_ad10 | |
317 | &pinctrl_adc0_ad11 | |
318 | >; | |
319 | clocks = <&adc_clk>, | |
320 | <&adc_op_clk>; | |
321 | clock-names = "adc_clk", "adc_op_clk"; | |
322 | atmel,adc-channels-used = <0xfff>; | |
323 | atmel,adc-startup-time = <40>; | |
324 | atmel,adc-use-external-triggers; | |
325 | atmel,adc-vref = <3000>; | |
326 | atmel,adc-res = <10 12>; | |
327 | atmel,adc-sample-hold-time = <11>; | |
328 | atmel,adc-res-names = "lowres", "highres"; | |
329 | status = "disabled"; | |
330 | ||
331 | trigger@0 { | |
332 | reg = <0>; | |
333 | trigger-name = "external-rising"; | |
334 | trigger-value = <0x1>; | |
335 | trigger-external; | |
336 | }; | |
337 | trigger@1 { | |
338 | reg = <1>; | |
339 | trigger-name = "external-falling"; | |
340 | trigger-value = <0x2>; | |
341 | trigger-external; | |
342 | }; | |
343 | trigger@2 { | |
344 | reg = <2>; | |
345 | trigger-name = "external-any"; | |
346 | trigger-value = <0x3>; | |
347 | trigger-external; | |
348 | }; | |
349 | trigger@3 { | |
350 | reg = <3>; | |
351 | trigger-name = "continuous"; | |
352 | trigger-value = <0x6>; | |
353 | }; | |
354 | }; | |
355 | ||
356 | i2c2: i2c@f801c000 { | |
357 | compatible = "atmel,at91sam9x5-i2c"; | |
358 | reg = <0xf801c000 0x4000>; | |
359 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>; | |
360 | dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>, | |
361 | <&dma1 2 AT91_DMA_CFG_PER_ID(12)>; | |
362 | dma-names = "tx", "rx"; | |
363 | pinctrl-names = "default"; | |
364 | pinctrl-0 = <&pinctrl_i2c2>; | |
365 | #address-cells = <1>; | |
366 | #size-cells = <0>; | |
367 | clocks = <&twi2_clk>; | |
368 | status = "disabled"; | |
369 | }; | |
370 | ||
371 | usart2: serial@f8020000 { | |
372 | compatible = "atmel,at91sam9260-usart"; | |
373 | reg = <0xf8020000 0x100>; | |
374 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; | |
375 | dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>, | |
376 | <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>; | |
377 | dma-names = "tx", "rx"; | |
378 | pinctrl-names = "default"; | |
379 | pinctrl-0 = <&pinctrl_usart2>; | |
380 | clocks = <&usart2_clk>; | |
381 | clock-names = "usart"; | |
382 | status = "disabled"; | |
383 | }; | |
384 | ||
385 | usart3: serial@f8024000 { | |
386 | compatible = "atmel,at91sam9260-usart"; | |
387 | reg = <0xf8024000 0x100>; | |
388 | interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; | |
389 | dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>, | |
390 | <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>; | |
391 | dma-names = "tx", "rx"; | |
392 | pinctrl-names = "default"; | |
393 | pinctrl-0 = <&pinctrl_usart3>; | |
394 | clocks = <&usart3_clk>; | |
395 | clock-names = "usart"; | |
396 | status = "disabled"; | |
397 | }; | |
398 | ||
399 | sha@f8034000 { | |
400 | compatible = "atmel,at91sam9g46-sha"; | |
401 | reg = <0xf8034000 0x100>; | |
402 | interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>; | |
403 | dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>; | |
404 | dma-names = "tx"; | |
405 | clocks = <&sha_clk>; | |
406 | clock-names = "sha_clk"; | |
407 | }; | |
408 | ||
409 | aes@f8038000 { | |
410 | compatible = "atmel,at91sam9g46-aes"; | |
411 | reg = <0xf8038000 0x100>; | |
412 | interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>; | |
413 | dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>, | |
414 | <&dma1 2 AT91_DMA_CFG_PER_ID(19)>; | |
415 | dma-names = "tx", "rx"; | |
416 | clocks = <&aes_clk>; | |
417 | clock-names = "aes_clk"; | |
418 | }; | |
419 | ||
420 | tdes@f803c000 { | |
421 | compatible = "atmel,at91sam9g46-tdes"; | |
422 | reg = <0xf803c000 0x100>; | |
423 | interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>; | |
424 | dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>, | |
425 | <&dma1 2 AT91_DMA_CFG_PER_ID(21)>; | |
426 | dma-names = "tx", "rx"; | |
427 | clocks = <&tdes_clk>; | |
428 | clock-names = "tdes_clk"; | |
429 | }; | |
430 | ||
431 | trng@f8040000 { | |
432 | compatible = "atmel,at91sam9g45-trng"; | |
433 | reg = <0xf8040000 0x100>; | |
434 | interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>; | |
435 | clocks = <&trng_clk>; | |
436 | }; | |
437 | ||
438 | dma0: dma-controller@ffffe600 { | |
439 | compatible = "atmel,at91sam9g45-dma"; | |
440 | reg = <0xffffe600 0x200>; | |
441 | interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>; | |
442 | #dma-cells = <2>; | |
443 | clocks = <&dma0_clk>; | |
444 | clock-names = "dma_clk"; | |
445 | }; | |
446 | ||
447 | dma1: dma-controller@ffffe800 { | |
448 | compatible = "atmel,at91sam9g45-dma"; | |
449 | reg = <0xffffe800 0x200>; | |
450 | interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; | |
451 | #dma-cells = <2>; | |
452 | clocks = <&dma1_clk>; | |
453 | clock-names = "dma_clk"; | |
454 | }; | |
455 | ||
456 | ramc0: ramc@ffffea00 { | |
457 | compatible = "atmel,sama5d3-ddramc"; | |
458 | reg = <0xffffea00 0x200>; | |
459 | clocks = <&ddrck>, <&mpddr_clk>; | |
460 | clock-names = "ddrck", "mpddr"; | |
461 | }; | |
462 | ||
463 | dbgu: serial@ffffee00 { | |
464 | compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; | |
465 | reg = <0xffffee00 0x200>; | |
466 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; | |
467 | dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>, | |
468 | <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>; | |
469 | dma-names = "tx", "rx"; | |
470 | pinctrl-names = "default"; | |
471 | pinctrl-0 = <&pinctrl_dbgu>; | |
472 | clocks = <&dbgu_clk>; | |
473 | clock-names = "usart"; | |
474 | status = "disabled"; | |
475 | }; | |
476 | ||
477 | aic: interrupt-controller@fffff000 { | |
478 | #interrupt-cells = <3>; | |
479 | compatible = "atmel,sama5d3-aic"; | |
480 | interrupt-controller; | |
481 | reg = <0xfffff000 0x200>; | |
482 | atmel,external-irqs = <47>; | |
483 | }; | |
484 | ||
485 | pinctrl@fffff200 { | |
486 | u-boot,dm-pre-reloc; | |
487 | #address-cells = <1>; | |
488 | #size-cells = <1>; | |
489 | compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus"; | |
490 | ranges = <0xfffff200 0xfffff200 0xa00>; | |
491 | atmel,mux-mask = < | |
492 | /* A B C */ | |
493 | 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */ | |
494 | 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */ | |
495 | 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */ | |
496 | 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */ | |
497 | 0xffffffff 0xbf9f8000 0x18000000 /* pioE */ | |
498 | >; | |
499 | reg = <0xfffff200 0x100 /* pioA */ | |
500 | 0xfffff400 0x100 /* pioB */ | |
501 | 0xfffff600 0x100 /* pioC */ | |
502 | 0xfffff800 0x100 /* pioD */ | |
503 | 0xfffffa00 0x100 /* pioE */ | |
504 | >; | |
505 | ||
506 | /* shared pinctrl settings */ | |
507 | adc0 { | |
508 | pinctrl_adc0_adtrg: adc0_adtrg { | |
509 | atmel,pins = | |
510 | <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */ | |
511 | }; | |
512 | pinctrl_adc0_ad0: adc0_ad0 { | |
513 | atmel,pins = | |
514 | <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */ | |
515 | }; | |
516 | pinctrl_adc0_ad1: adc0_ad1 { | |
517 | atmel,pins = | |
518 | <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */ | |
519 | }; | |
520 | pinctrl_adc0_ad2: adc0_ad2 { | |
521 | atmel,pins = | |
522 | <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */ | |
523 | }; | |
524 | pinctrl_adc0_ad3: adc0_ad3 { | |
525 | atmel,pins = | |
526 | <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */ | |
527 | }; | |
528 | pinctrl_adc0_ad4: adc0_ad4 { | |
529 | atmel,pins = | |
530 | <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */ | |
531 | }; | |
532 | pinctrl_adc0_ad5: adc0_ad5 { | |
533 | atmel,pins = | |
534 | <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */ | |
535 | }; | |
536 | pinctrl_adc0_ad6: adc0_ad6 { | |
537 | atmel,pins = | |
538 | <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */ | |
539 | }; | |
540 | pinctrl_adc0_ad7: adc0_ad7 { | |
541 | atmel,pins = | |
542 | <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */ | |
543 | }; | |
544 | pinctrl_adc0_ad8: adc0_ad8 { | |
545 | atmel,pins = | |
546 | <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */ | |
547 | }; | |
548 | pinctrl_adc0_ad9: adc0_ad9 { | |
549 | atmel,pins = | |
550 | <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */ | |
551 | }; | |
552 | pinctrl_adc0_ad10: adc0_ad10 { | |
553 | atmel,pins = | |
554 | <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */ | |
555 | }; | |
556 | pinctrl_adc0_ad11: adc0_ad11 { | |
557 | atmel,pins = | |
558 | <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */ | |
559 | }; | |
560 | }; | |
561 | ||
562 | dbgu { | |
563 | u-boot,dm-pre-reloc; | |
564 | pinctrl_dbgu: dbgu-0 { | |
565 | u-boot,dm-pre-reloc; | |
566 | atmel,pins = | |
567 | <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */ | |
568 | AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */ | |
569 | }; | |
570 | }; | |
571 | ||
572 | i2c0 { | |
573 | pinctrl_i2c0: i2c0-0 { | |
574 | atmel,pins = | |
575 | <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */ | |
576 | AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */ | |
577 | }; | |
578 | }; | |
579 | ||
580 | i2c1 { | |
581 | pinctrl_i2c1: i2c1-0 { | |
582 | atmel,pins = | |
583 | <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */ | |
584 | AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */ | |
585 | }; | |
586 | }; | |
587 | ||
588 | i2c2 { | |
589 | pinctrl_i2c2: i2c2-0 { | |
590 | atmel,pins = | |
591 | <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */ | |
592 | AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */ | |
593 | }; | |
594 | }; | |
595 | ||
596 | isi { | |
597 | pinctrl_isi_data_0_7: isi-0-data-0-7 { | |
598 | atmel,pins = | |
599 | <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */ | |
600 | AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */ | |
601 | AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */ | |
602 | AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */ | |
603 | AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */ | |
604 | AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */ | |
605 | AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */ | |
606 | AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */ | |
607 | AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */ | |
608 | AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */ | |
609 | AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */ | |
610 | }; | |
611 | ||
612 | pinctrl_isi_data_8_9: isi-0-data-8-9 { | |
613 | atmel,pins = | |
614 | <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */ | |
615 | AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */ | |
616 | }; | |
617 | ||
618 | pinctrl_isi_data_10_11: isi-0-data-10-11 { | |
619 | atmel,pins = | |
620 | <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */ | |
621 | AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */ | |
622 | }; | |
623 | }; | |
624 | ||
625 | mmc0 { | |
626 | u-boot,dm-pre-reloc; | |
627 | pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 { | |
628 | u-boot,dm-pre-reloc; | |
629 | atmel,pins = | |
630 | <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */ | |
631 | AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */ | |
632 | AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */ | |
633 | }; | |
634 | pinctrl_mmc0_dat1_3: mmc0_dat1_3 { | |
635 | u-boot,dm-pre-reloc; | |
636 | atmel,pins = | |
637 | <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */ | |
638 | AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */ | |
639 | AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */ | |
640 | }; | |
641 | pinctrl_mmc0_dat4_7: mmc0_dat4_7 { | |
642 | u-boot,dm-pre-reloc; | |
643 | atmel,pins = | |
644 | <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */ | |
645 | AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */ | |
646 | AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */ | |
647 | AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */ | |
648 | }; | |
649 | }; | |
650 | ||
651 | mmc1 { | |
652 | u-boot,dm-pre-reloc; | |
653 | pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 { | |
654 | u-boot,dm-pre-reloc; | |
655 | atmel,pins = | |
656 | <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */ | |
657 | AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */ | |
658 | AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */ | |
659 | }; | |
660 | pinctrl_mmc1_dat1_3: mmc1_dat1_3 { | |
661 | u-boot,dm-pre-reloc; | |
662 | atmel,pins = | |
663 | <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */ | |
664 | AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */ | |
665 | AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */ | |
666 | }; | |
667 | }; | |
668 | ||
669 | nand0 { | |
670 | pinctrl_nand0_ale_cle: nand0_ale_cle-0 { | |
671 | atmel,pins = | |
672 | <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */ | |
673 | AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */ | |
674 | }; | |
675 | }; | |
676 | ||
677 | pwm0 { | |
678 | pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 { | |
679 | atmel,pins = | |
680 | <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */ | |
681 | }; | |
682 | pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 { | |
683 | atmel,pins = | |
684 | <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */ | |
685 | }; | |
686 | pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 { | |
687 | atmel,pins = | |
688 | <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */ | |
689 | }; | |
690 | pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 { | |
691 | atmel,pins = | |
692 | <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */ | |
693 | }; | |
694 | ||
695 | pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 { | |
696 | atmel,pins = | |
697 | <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */ | |
698 | }; | |
699 | pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 { | |
700 | atmel,pins = | |
701 | <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */ | |
702 | }; | |
703 | pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 { | |
704 | atmel,pins = | |
705 | <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */ | |
706 | }; | |
707 | pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 { | |
708 | atmel,pins = | |
709 | <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */ | |
710 | }; | |
711 | pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 { | |
712 | atmel,pins = | |
713 | <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */ | |
714 | }; | |
715 | pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 { | |
716 | atmel,pins = | |
717 | <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */ | |
718 | }; | |
719 | ||
720 | pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 { | |
721 | atmel,pins = | |
722 | <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */ | |
723 | }; | |
724 | pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 { | |
725 | atmel,pins = | |
726 | <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */ | |
727 | }; | |
728 | pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 { | |
729 | atmel,pins = | |
730 | <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */ | |
731 | }; | |
732 | pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 { | |
733 | atmel,pins = | |
734 | <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */ | |
735 | }; | |
736 | ||
737 | pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 { | |
738 | atmel,pins = | |
739 | <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */ | |
740 | }; | |
741 | pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 { | |
742 | atmel,pins = | |
743 | <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */ | |
744 | }; | |
745 | pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 { | |
746 | atmel,pins = | |
747 | <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */ | |
748 | }; | |
749 | pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 { | |
750 | atmel,pins = | |
751 | <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */ | |
752 | }; | |
753 | }; | |
754 | ||
755 | spi0 { | |
756 | u-boot,dm-pre-reloc; | |
757 | pinctrl_spi0: spi0-0 { | |
758 | u-boot,dm-pre-reloc; | |
759 | atmel,pins = | |
760 | <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */ | |
761 | AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */ | |
762 | AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */ | |
763 | }; | |
764 | }; | |
765 | ||
766 | spi1 { | |
767 | u-boot,dm-pre-reloc; | |
768 | pinctrl_spi1: spi1-0 { | |
769 | u-boot,dm-pre-reloc; | |
770 | atmel,pins = | |
771 | <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */ | |
772 | AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */ | |
773 | AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */ | |
774 | }; | |
775 | }; | |
776 | ||
777 | ssc0 { | |
778 | pinctrl_ssc0_tx: ssc0_tx { | |
779 | atmel,pins = | |
780 | <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */ | |
781 | AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */ | |
782 | AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */ | |
783 | }; | |
784 | ||
785 | pinctrl_ssc0_rx: ssc0_rx { | |
786 | atmel,pins = | |
787 | <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */ | |
788 | AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */ | |
789 | AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */ | |
790 | }; | |
791 | }; | |
792 | ||
793 | ssc1 { | |
794 | pinctrl_ssc1_tx: ssc1_tx { | |
795 | atmel,pins = | |
796 | <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */ | |
797 | AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */ | |
798 | AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */ | |
799 | }; | |
800 | ||
801 | pinctrl_ssc1_rx: ssc1_rx { | |
802 | atmel,pins = | |
803 | <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */ | |
804 | AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */ | |
805 | AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */ | |
806 | }; | |
807 | }; | |
808 | ||
809 | uart0 { | |
810 | pinctrl_uart0: uart0-0 { | |
811 | atmel,pins = | |
812 | <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* conflicts with PWMFI2, ISI_D8 */ | |
813 | AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* conflicts with ISI_PCK */ | |
814 | }; | |
815 | }; | |
816 | ||
817 | uart1 { | |
818 | pinctrl_uart1: uart1-0 { | |
819 | atmel,pins = | |
820 | <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* conflicts with TWD0, ISI_VSYNC */ | |
821 | AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* conflicts with TWCK0, ISI_HSYNC */ | |
822 | }; | |
823 | }; | |
824 | ||
825 | usart0 { | |
826 | pinctrl_usart0: usart0-0 { | |
827 | atmel,pins = | |
828 | <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */ | |
829 | AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */ | |
830 | }; | |
831 | ||
832 | pinctrl_usart0_rts_cts: usart0_rts_cts-0 { | |
833 | atmel,pins = | |
834 | <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */ | |
835 | AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */ | |
836 | }; | |
837 | }; | |
838 | ||
839 | usart1 { | |
840 | pinctrl_usart1: usart1-0 { | |
841 | atmel,pins = | |
842 | <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */ | |
843 | AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */ | |
844 | }; | |
845 | ||
846 | pinctrl_usart1_rts_cts: usart1_rts_cts-0 { | |
847 | atmel,pins = | |
848 | <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */ | |
849 | AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */ | |
850 | }; | |
851 | }; | |
852 | ||
853 | usart2 { | |
854 | pinctrl_usart2: usart2-0 { | |
855 | atmel,pins = | |
856 | <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */ | |
857 | AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */ | |
858 | }; | |
859 | ||
860 | pinctrl_usart2_rts_cts: usart2_rts_cts-0 { | |
861 | atmel,pins = | |
862 | <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */ | |
863 | AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */ | |
864 | }; | |
865 | }; | |
866 | ||
867 | usart3 { | |
868 | pinctrl_usart3: usart3-0 { | |
869 | atmel,pins = | |
870 | <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */ | |
871 | AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */ | |
872 | }; | |
873 | ||
874 | pinctrl_usart3_rts_cts: usart3_rts_cts-0 { | |
875 | atmel,pins = | |
876 | <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */ | |
877 | AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */ | |
878 | }; | |
879 | }; | |
880 | }; | |
881 | ||
882 | pioA: gpio@fffff200 { | |
883 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | |
884 | reg = <0xfffff200 0x100>; | |
885 | interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>; | |
886 | #gpio-cells = <2>; | |
887 | gpio-controller; | |
888 | interrupt-controller; | |
889 | #interrupt-cells = <2>; | |
890 | clocks = <&pioA_clk>; | |
891 | u-boot,dm-pre-reloc; | |
892 | }; | |
893 | ||
894 | pioB: gpio@fffff400 { | |
895 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | |
896 | reg = <0xfffff400 0x100>; | |
897 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>; | |
898 | #gpio-cells = <2>; | |
899 | gpio-controller; | |
900 | interrupt-controller; | |
901 | #interrupt-cells = <2>; | |
902 | clocks = <&pioB_clk>; | |
903 | u-boot,dm-pre-reloc; | |
904 | }; | |
905 | ||
906 | pioC: gpio@fffff600 { | |
907 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | |
908 | reg = <0xfffff600 0x100>; | |
909 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>; | |
910 | #gpio-cells = <2>; | |
911 | gpio-controller; | |
912 | interrupt-controller; | |
913 | #interrupt-cells = <2>; | |
914 | clocks = <&pioC_clk>; | |
915 | u-boot,dm-pre-reloc; | |
916 | }; | |
917 | ||
918 | pioD: gpio@fffff800 { | |
919 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | |
920 | reg = <0xfffff800 0x100>; | |
921 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>; | |
922 | #gpio-cells = <2>; | |
923 | gpio-controller; | |
924 | interrupt-controller; | |
925 | #interrupt-cells = <2>; | |
926 | clocks = <&pioD_clk>; | |
927 | u-boot,dm-pre-reloc; | |
928 | }; | |
929 | ||
930 | pioE: gpio@fffffa00 { | |
931 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | |
932 | reg = <0xfffffa00 0x100>; | |
933 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>; | |
934 | #gpio-cells = <2>; | |
935 | gpio-controller; | |
936 | interrupt-controller; | |
937 | #interrupt-cells = <2>; | |
938 | clocks = <&pioE_clk>; | |
939 | u-boot,dm-pre-reloc; | |
940 | }; | |
941 | ||
942 | pmc: pmc@fffffc00 { | |
943 | compatible = "atmel,sama5d3-pmc", "syscon"; | |
944 | reg = <0xfffffc00 0x120>; | |
945 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
946 | interrupt-controller; | |
947 | #address-cells = <1>; | |
948 | #size-cells = <0>; | |
949 | #interrupt-cells = <1>; | |
950 | u-boot,dm-pre-reloc; | |
951 | ||
952 | main_rc_osc: main_rc_osc { | |
953 | compatible = "atmel,at91sam9x5-clk-main-rc-osc"; | |
954 | #clock-cells = <0>; | |
955 | interrupt-parent = <&pmc>; | |
956 | interrupts = <AT91_PMC_MOSCRCS>; | |
957 | clock-frequency = <12000000>; | |
958 | clock-accuracy = <50000000>; | |
959 | }; | |
960 | ||
961 | main_osc: main_osc { | |
962 | compatible = "atmel,at91rm9200-clk-main-osc"; | |
963 | #clock-cells = <0>; | |
964 | interrupt-parent = <&pmc>; | |
965 | interrupts = <AT91_PMC_MOSCS>; | |
966 | clocks = <&main_xtal>; | |
967 | }; | |
968 | ||
969 | main: mainck { | |
970 | compatible = "atmel,at91sam9x5-clk-main"; | |
971 | #clock-cells = <0>; | |
972 | interrupt-parent = <&pmc>; | |
973 | interrupts = <AT91_PMC_MOSCSELS>; | |
974 | clocks = <&main_rc_osc &main_osc>; | |
975 | }; | |
976 | ||
977 | plla: pllack@0 { | |
978 | compatible = "atmel,sama5d3-clk-pll"; | |
979 | #clock-cells = <0>; | |
980 | interrupt-parent = <&pmc>; | |
981 | interrupts = <AT91_PMC_LOCKA>; | |
982 | clocks = <&main>; | |
983 | reg = <0>; | |
984 | atmel,clk-input-range = <8000000 50000000>; | |
985 | #atmel,pll-clk-output-range-cells = <4>; | |
986 | atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>; | |
987 | }; | |
988 | ||
989 | plladiv: plladivck { | |
990 | compatible = "atmel,at91sam9x5-clk-plldiv"; | |
991 | #clock-cells = <0>; | |
992 | clocks = <&plla>; | |
993 | }; | |
994 | ||
995 | utmi: utmick { | |
996 | compatible = "atmel,at91sam9x5-clk-utmi"; | |
997 | #clock-cells = <0>; | |
998 | interrupt-parent = <&pmc>; | |
999 | interrupts = <AT91_PMC_LOCKU>; | |
1000 | clocks = <&main>; | |
56246d1e WY |
1001 | regmap-sfr = <&sfr>; |
1002 | u-boot,dm-pre-reloc; | |
110fa979 WY |
1003 | }; |
1004 | ||
1005 | mck: masterck { | |
1006 | compatible = "atmel,at91sam9x5-clk-master"; | |
1007 | #clock-cells = <0>; | |
1008 | interrupt-parent = <&pmc>; | |
1009 | interrupts = <AT91_PMC_MCKRDY>; | |
1010 | clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>; | |
1011 | atmel,clk-output-range = <0 166000000>; | |
1012 | atmel,clk-divisors = <1 2 4 3>; | |
1013 | u-boot,dm-pre-reloc; | |
1014 | }; | |
1015 | ||
1016 | usb: usbck { | |
1017 | compatible = "atmel,at91sam9x5-clk-usb"; | |
1018 | #clock-cells = <0>; | |
1019 | clocks = <&plladiv>, <&utmi>; | |
1020 | }; | |
1021 | ||
1022 | prog: progck { | |
1023 | compatible = "atmel,at91sam9x5-clk-programmable"; | |
1024 | #address-cells = <1>; | |
1025 | #size-cells = <0>; | |
1026 | interrupt-parent = <&pmc>; | |
1027 | clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>; | |
1028 | ||
1029 | prog0: progck@0 { | |
1030 | #clock-cells = <0>; | |
1031 | reg = <0>; | |
1032 | interrupts = <AT91_PMC_PCKRDY(0)>; | |
1033 | }; | |
1034 | ||
1035 | prog1: progck@1 { | |
1036 | #clock-cells = <0>; | |
1037 | reg = <1>; | |
1038 | interrupts = <AT91_PMC_PCKRDY(1)>; | |
1039 | }; | |
1040 | ||
1041 | prog2: progck@2 { | |
1042 | #clock-cells = <0>; | |
1043 | reg = <2>; | |
1044 | interrupts = <AT91_PMC_PCKRDY(2)>; | |
1045 | }; | |
1046 | }; | |
1047 | ||
1048 | smd: smdclk { | |
1049 | compatible = "atmel,at91sam9x5-clk-smd"; | |
1050 | #clock-cells = <0>; | |
1051 | clocks = <&plladiv>, <&utmi>; | |
1052 | }; | |
1053 | ||
1054 | systemck { | |
1055 | compatible = "atmel,at91rm9200-clk-system"; | |
1056 | #address-cells = <1>; | |
1057 | #size-cells = <0>; | |
1058 | ||
1059 | ddrck: ddrck@2 { | |
1060 | #clock-cells = <0>; | |
1061 | reg = <2>; | |
1062 | clocks = <&mck>; | |
1063 | }; | |
1064 | ||
1065 | smdck: smdck@4 { | |
1066 | #clock-cells = <0>; | |
1067 | reg = <4>; | |
1068 | clocks = <&smd>; | |
1069 | }; | |
1070 | ||
1071 | uhpck: uhpck@6 { | |
1072 | #clock-cells = <0>; | |
1073 | reg = <6>; | |
1074 | clocks = <&usb>; | |
1075 | }; | |
1076 | ||
1077 | udpck: udpck@7 { | |
1078 | #clock-cells = <0>; | |
1079 | reg = <7>; | |
1080 | clocks = <&usb>; | |
1081 | }; | |
1082 | ||
1083 | pck0: pck@8 { | |
1084 | #clock-cells = <0>; | |
1085 | reg = <8>; | |
1086 | clocks = <&prog0>; | |
1087 | }; | |
1088 | ||
1089 | pck1: pck@9 { | |
1090 | #clock-cells = <0>; | |
1091 | reg = <9>; | |
1092 | clocks = <&prog1>; | |
1093 | }; | |
1094 | ||
1095 | pck2: pck@10 { | |
1096 | #clock-cells = <0>; | |
1097 | reg = <10>; | |
1098 | clocks = <&prog2>; | |
1099 | }; | |
1100 | }; | |
1101 | ||
1102 | periphck { | |
1103 | compatible = "atmel,at91sam9x5-clk-peripheral"; | |
1104 | #address-cells = <1>; | |
1105 | #size-cells = <0>; | |
1106 | clocks = <&mck>; | |
1107 | u-boot,dm-pre-reloc; | |
1108 | ||
1109 | dbgu_clk: dbgu_clk@2 { | |
1110 | u-boot,dm-pre-reloc; | |
1111 | #clock-cells = <0>; | |
1112 | reg = <2>; | |
1113 | }; | |
1114 | ||
1115 | hsmc_clk: hsmc_clk@5 { | |
1116 | #clock-cells = <0>; | |
1117 | reg = <5>; | |
1118 | }; | |
1119 | ||
1120 | pioA_clk: pioA_clk@6 { | |
1121 | u-boot,dm-pre-reloc; | |
1122 | #clock-cells = <0>; | |
1123 | reg = <6>; | |
1124 | }; | |
1125 | ||
1126 | pioB_clk: pioB_clk@7 { | |
1127 | u-boot,dm-pre-reloc; | |
1128 | #clock-cells = <0>; | |
1129 | reg = <7>; | |
1130 | }; | |
1131 | ||
1132 | pioC_clk: pioC_clk@8 { | |
1133 | u-boot,dm-pre-reloc; | |
1134 | #clock-cells = <0>; | |
1135 | reg = <8>; | |
1136 | }; | |
1137 | ||
1138 | pioD_clk: pioD_clk@9 { | |
1139 | u-boot,dm-pre-reloc; | |
1140 | #clock-cells = <0>; | |
1141 | reg = <9>; | |
1142 | }; | |
1143 | ||
1144 | pioE_clk: pioE_clk@10 { | |
1145 | u-boot,dm-pre-reloc; | |
1146 | #clock-cells = <0>; | |
1147 | reg = <10>; | |
1148 | }; | |
1149 | ||
1150 | usart0_clk: usart0_clk@12 { | |
1151 | #clock-cells = <0>; | |
1152 | reg = <12>; | |
1153 | atmel,clk-output-range = <0 66000000>; | |
1154 | }; | |
1155 | ||
1156 | usart1_clk: usart1_clk@13 { | |
1157 | #clock-cells = <0>; | |
1158 | reg = <13>; | |
1159 | atmel,clk-output-range = <0 66000000>; | |
1160 | }; | |
1161 | ||
1162 | usart2_clk: usart2_clk@14 { | |
1163 | #clock-cells = <0>; | |
1164 | reg = <14>; | |
1165 | atmel,clk-output-range = <0 66000000>; | |
1166 | }; | |
1167 | ||
1168 | usart3_clk: usart3_clk@15 { | |
1169 | #clock-cells = <0>; | |
1170 | reg = <15>; | |
1171 | atmel,clk-output-range = <0 66000000>; | |
1172 | }; | |
1173 | ||
1174 | uart0_clk: uart0_clk@16 { | |
1175 | #clock-cells = <0>; | |
1176 | reg = <16>; | |
1177 | atmel,clk-output-range = <0 66000000>; | |
1178 | }; | |
1179 | ||
1180 | twi0_clk: twi0_clk@18 { | |
1181 | reg = <18>; | |
1182 | #clock-cells = <0>; | |
1183 | atmel,clk-output-range = <0 16625000>; | |
1184 | }; | |
1185 | ||
1186 | twi1_clk: twi1_clk@19 { | |
1187 | #clock-cells = <0>; | |
1188 | reg = <19>; | |
1189 | atmel,clk-output-range = <0 16625000>; | |
1190 | }; | |
1191 | ||
1192 | twi2_clk: twi2_clk@20 { | |
1193 | #clock-cells = <0>; | |
1194 | reg = <20>; | |
1195 | atmel,clk-output-range = <0 16625000>; | |
1196 | }; | |
1197 | ||
1198 | mci0_clk: mci0_clk@21 { | |
1199 | u-boot,dm-pre-reloc; | |
1200 | #clock-cells = <0>; | |
1201 | reg = <21>; | |
1202 | }; | |
1203 | ||
1204 | mci1_clk: mci1_clk@22 { | |
1205 | u-boot,dm-pre-reloc; | |
1206 | #clock-cells = <0>; | |
1207 | reg = <22>; | |
1208 | }; | |
1209 | ||
1210 | spi0_clk: spi0_clk@24 { | |
1211 | u-boot,dm-pre-reloc; | |
1212 | #clock-cells = <0>; | |
1213 | reg = <24>; | |
1214 | atmel,clk-output-range = <0 133000000>; | |
1215 | }; | |
1216 | ||
1217 | spi1_clk: spi1_clk@25 { | |
1218 | u-boot,dm-pre-reloc; | |
1219 | #clock-cells = <0>; | |
1220 | reg = <25>; | |
1221 | atmel,clk-output-range = <0 133000000>; | |
1222 | }; | |
1223 | ||
1224 | tcb0_clk: tcb0_clk@26 { | |
1225 | #clock-cells = <0>; | |
1226 | reg = <26>; | |
1227 | atmel,clk-output-range = <0 133000000>; | |
1228 | }; | |
1229 | ||
1230 | pwm_clk: pwm_clk@28 { | |
1231 | #clock-cells = <0>; | |
1232 | reg = <28>; | |
1233 | }; | |
1234 | ||
1235 | adc_clk: adc_clk@29 { | |
1236 | #clock-cells = <0>; | |
1237 | reg = <29>; | |
1238 | atmel,clk-output-range = <0 66000000>; | |
1239 | }; | |
1240 | ||
1241 | dma0_clk: dma0_clk@30 { | |
1242 | #clock-cells = <0>; | |
1243 | reg = <30>; | |
1244 | }; | |
1245 | ||
1246 | dma1_clk: dma1_clk@31 { | |
1247 | #clock-cells = <0>; | |
1248 | reg = <31>; | |
1249 | }; | |
1250 | ||
1251 | uhphs_clk: uhphs_clk@32 { | |
1252 | #clock-cells = <0>; | |
1253 | reg = <32>; | |
1254 | }; | |
1255 | ||
1256 | udphs_clk: udphs_clk@33 { | |
1257 | #clock-cells = <0>; | |
1258 | reg = <33>; | |
1259 | }; | |
1260 | ||
1261 | isi_clk: isi_clk@37 { | |
1262 | #clock-cells = <0>; | |
1263 | reg = <37>; | |
1264 | }; | |
1265 | ||
1266 | ssc0_clk: ssc0_clk@38 { | |
1267 | #clock-cells = <0>; | |
1268 | reg = <38>; | |
1269 | atmel,clk-output-range = <0 66000000>; | |
1270 | }; | |
1271 | ||
1272 | ssc1_clk: ssc1_clk@39 { | |
1273 | #clock-cells = <0>; | |
1274 | reg = <39>; | |
1275 | atmel,clk-output-range = <0 66000000>; | |
1276 | }; | |
1277 | ||
1278 | sha_clk: sha_clk@42 { | |
1279 | #clock-cells = <0>; | |
1280 | reg = <42>; | |
1281 | }; | |
1282 | ||
1283 | aes_clk: aes_clk@43 { | |
1284 | #clock-cells = <0>; | |
1285 | reg = <43>; | |
1286 | }; | |
1287 | ||
1288 | tdes_clk: tdes_clk@44 { | |
1289 | #clock-cells = <0>; | |
1290 | reg = <44>; | |
1291 | }; | |
1292 | ||
1293 | trng_clk: trng_clk@45 { | |
1294 | #clock-cells = <0>; | |
1295 | reg = <45>; | |
1296 | }; | |
1297 | ||
1298 | fuse_clk: fuse_clk@48 { | |
1299 | #clock-cells = <0>; | |
1300 | reg = <48>; | |
1301 | }; | |
1302 | ||
1303 | mpddr_clk: mpddr_clk@49 { | |
1304 | #clock-cells = <0>; | |
1305 | reg = <49>; | |
1306 | }; | |
1307 | }; | |
1308 | }; | |
1309 | ||
1310 | rstc@fffffe00 { | |
1311 | compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc"; | |
1312 | reg = <0xfffffe00 0x10>; | |
1313 | clocks = <&clk32k>; | |
1314 | }; | |
1315 | ||
1316 | shutdown-controller@fffffe10 { | |
1317 | compatible = "atmel,at91sam9x5-shdwc"; | |
1318 | reg = <0xfffffe10 0x10>; | |
1319 | clocks = <&clk32k>; | |
1320 | }; | |
1321 | ||
1322 | pit: timer@fffffe30 { | |
1323 | compatible = "atmel,at91sam9260-pit"; | |
1324 | reg = <0xfffffe30 0xf>; | |
1325 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; | |
1326 | clocks = <&mck>; | |
1327 | }; | |
1328 | ||
1329 | watchdog@fffffe40 { | |
1330 | compatible = "atmel,at91sam9260-wdt"; | |
1331 | reg = <0xfffffe40 0x10>; | |
1332 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>; | |
1333 | clocks = <&clk32k>; | |
1334 | atmel,watchdog-type = "hardware"; | |
1335 | atmel,reset-type = "all"; | |
1336 | atmel,dbg-halt; | |
1337 | status = "disabled"; | |
1338 | }; | |
1339 | ||
1340 | sckc@fffffe50 { | |
1341 | compatible = "atmel,at91sam9x5-sckc"; | |
1342 | reg = <0xfffffe50 0x4>; | |
1343 | ||
1344 | slow_rc_osc: slow_rc_osc { | |
1345 | compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; | |
1346 | #clock-cells = <0>; | |
1347 | clock-frequency = <32768>; | |
1348 | clock-accuracy = <50000000>; | |
1349 | atmel,startup-time-usec = <75>; | |
1350 | }; | |
1351 | ||
1352 | slow_osc: slow_osc { | |
1353 | compatible = "atmel,at91sam9x5-clk-slow-osc"; | |
1354 | #clock-cells = <0>; | |
1355 | clocks = <&slow_xtal>; | |
1356 | atmel,startup-time-usec = <1200000>; | |
1357 | }; | |
1358 | ||
1359 | clk32k: slowck { | |
1360 | compatible = "atmel,at91sam9x5-clk-slow"; | |
1361 | #clock-cells = <0>; | |
1362 | clocks = <&slow_rc_osc &slow_osc>; | |
1363 | }; | |
1364 | }; | |
1365 | ||
1366 | rtc@fffffeb0 { | |
1367 | compatible = "atmel,at91rm9200-rtc"; | |
1368 | reg = <0xfffffeb0 0x30>; | |
1369 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
1370 | clocks = <&clk32k>; | |
1371 | }; | |
1372 | }; | |
1373 | ||
1374 | usb0: gadget@00500000 { | |
1375 | #address-cells = <1>; | |
1376 | #size-cells = <0>; | |
1377 | compatible = "atmel,sama5d3-udc"; | |
1378 | reg = <0x00500000 0x100000 | |
1379 | 0xf8030000 0x4000>; | |
1380 | interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>; | |
1381 | clocks = <&udphs_clk>, <&utmi>; | |
1382 | clock-names = "pclk", "hclk"; | |
1383 | status = "disabled"; | |
1384 | ||
1385 | ep0: endpoint@0 { | |
1386 | reg = <0>; | |
1387 | atmel,fifo-size = <64>; | |
1388 | atmel,nb-banks = <1>; | |
1389 | }; | |
1390 | ||
1391 | ep1: endpoint@1 { | |
1392 | reg = <1>; | |
1393 | atmel,fifo-size = <1024>; | |
1394 | atmel,nb-banks = <3>; | |
1395 | atmel,can-dma; | |
1396 | atmel,can-isoc; | |
1397 | }; | |
1398 | ||
1399 | ep2: endpoint@2 { | |
1400 | reg = <2>; | |
1401 | atmel,fifo-size = <1024>; | |
1402 | atmel,nb-banks = <3>; | |
1403 | atmel,can-dma; | |
1404 | atmel,can-isoc; | |
1405 | }; | |
1406 | ||
1407 | ep3: endpoint@3 { | |
1408 | reg = <3>; | |
1409 | atmel,fifo-size = <1024>; | |
1410 | atmel,nb-banks = <2>; | |
1411 | atmel,can-dma; | |
1412 | }; | |
1413 | ||
1414 | ep4: endpoint@4 { | |
1415 | reg = <4>; | |
1416 | atmel,fifo-size = <1024>; | |
1417 | atmel,nb-banks = <2>; | |
1418 | atmel,can-dma; | |
1419 | }; | |
1420 | ||
1421 | ep5: endpoint@5 { | |
1422 | reg = <5>; | |
1423 | atmel,fifo-size = <1024>; | |
1424 | atmel,nb-banks = <2>; | |
1425 | atmel,can-dma; | |
1426 | }; | |
1427 | ||
1428 | ep6: endpoint@6 { | |
1429 | reg = <6>; | |
1430 | atmel,fifo-size = <1024>; | |
1431 | atmel,nb-banks = <2>; | |
1432 | atmel,can-dma; | |
1433 | }; | |
1434 | ||
1435 | ep7i: endpoint@7 { | |
1436 | reg = <7>; | |
1437 | atmel,fifo-size = <1024>; | |
1438 | atmel,nb-banks = <2>; | |
1439 | atmel,can-dma; | |
1440 | }; | |
1441 | ||
1442 | ep8: endpoint@8 { | |
1443 | reg = <8>; | |
1444 | atmel,fifo-size = <1024>; | |
1445 | atmel,nb-banks = <2>; | |
1446 | }; | |
1447 | ||
1448 | ep9: endpoint@9 { | |
1449 | reg = <9>; | |
1450 | atmel,fifo-size = <1024>; | |
1451 | atmel,nb-banks = <2>; | |
1452 | }; | |
1453 | ||
1454 | ep10: endpoint@10 { | |
1455 | reg = <10>; | |
1456 | atmel,fifo-size = <1024>; | |
1457 | atmel,nb-banks = <2>; | |
1458 | }; | |
1459 | ||
1460 | ep11: endpoint@11 { | |
1461 | reg = <11>; | |
1462 | atmel,fifo-size = <1024>; | |
1463 | atmel,nb-banks = <2>; | |
1464 | }; | |
1465 | ||
1466 | ep12: endpoint@12 { | |
1467 | reg = <12>; | |
1468 | atmel,fifo-size = <1024>; | |
1469 | atmel,nb-banks = <2>; | |
1470 | }; | |
1471 | ||
1472 | ep13: endpoint@13 { | |
1473 | reg = <13>; | |
1474 | atmel,fifo-size = <1024>; | |
1475 | atmel,nb-banks = <2>; | |
1476 | }; | |
1477 | ||
1478 | ep14: endpoint@14 { | |
1479 | reg = <14>; | |
1480 | atmel,fifo-size = <1024>; | |
1481 | atmel,nb-banks = <2>; | |
1482 | }; | |
1483 | ||
1484 | ep15: endpoint@15 { | |
1485 | reg = <15>; | |
1486 | atmel,fifo-size = <1024>; | |
1487 | atmel,nb-banks = <2>; | |
1488 | }; | |
1489 | }; | |
1490 | ||
1491 | usb1: ohci@00600000 { | |
1492 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | |
1493 | reg = <0x00600000 0x100000>; | |
1494 | interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; | |
1495 | clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; | |
1496 | clock-names = "ohci_clk", "hclk", "uhpck"; | |
1497 | status = "disabled"; | |
1498 | }; | |
1499 | ||
1500 | usb2: ehci@00700000 { | |
1501 | compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; | |
1502 | reg = <0x00700000 0x100000>; | |
1503 | interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; | |
1504 | clocks = <&utmi>, <&uhphs_clk>; | |
1505 | clock-names = "usb_clk", "ehci_clk"; | |
1506 | status = "disabled"; | |
1507 | }; | |
1508 | ||
1509 | nand0: nand@60000000 { | |
1510 | compatible = "atmel,at91rm9200-nand"; | |
1511 | #address-cells = <1>; | |
1512 | #size-cells = <1>; | |
1513 | ranges; | |
1514 | reg = < 0x60000000 0x01000000 /* EBI CS3 */ | |
1515 | 0xffffc070 0x00000490 /* SMC PMECC regs */ | |
1516 | 0xffffc500 0x00000100 /* SMC PMECC Error Location regs */ | |
1517 | 0x00110000 0x00018000 /* ROM code */ | |
1518 | >; | |
1519 | interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>; | |
1520 | atmel,nand-addr-offset = <21>; | |
1521 | atmel,nand-cmd-offset = <22>; | |
1522 | atmel,nand-has-dma; | |
1523 | pinctrl-names = "default"; | |
1524 | pinctrl-0 = <&pinctrl_nand0_ale_cle>; | |
1525 | atmel,pmecc-lookup-table-offset = <0x0 0x8000>; | |
1526 | status = "disabled"; | |
1527 | ||
1528 | nfc@70000000 { | |
1529 | compatible = "atmel,sama5d3-nfc"; | |
1530 | #address-cells = <1>; | |
1531 | #size-cells = <1>; | |
1532 | reg = < | |
1533 | 0x70000000 0x08000000 /* NFC Command Registers */ | |
1534 | 0xffffc000 0x00000070 /* NFC HSMC regs */ | |
1535 | 0x00200000 0x00100000 /* NFC SRAM banks */ | |
1536 | >; | |
1537 | clocks = <&hsmc_clk>; | |
1538 | }; | |
1539 | }; | |
1540 | }; | |
1541 | }; |