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Commit | Line | Data |
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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
7fb46430 MV |
2 | /* |
3 | * Copyright (C) 2018 Marek Vasut <marex@denx.de> | |
7fb46430 MV |
4 | */ |
5 | ||
6 | #include "socfpga_cyclone5.dtsi" | |
7357c2cb | 7 | #include "socfpga-common-u-boot.dtsi" |
7fb46430 MV |
8 | |
9 | / { | |
10 | model = "Devboards.de DBM-SoC1"; | |
11 | compatible = "altr,socfpga-cyclone5", "altr,socfpga"; | |
12 | ||
13 | chosen { | |
14 | bootargs = "console=ttyS0,115200"; | |
79a436d5 | 15 | stdout-path = "serial0:115200n8"; |
7fb46430 MV |
16 | }; |
17 | ||
18 | aliases { | |
19 | ethernet0 = &gmac1; | |
20 | udc0 = &usb1; | |
21 | }; | |
22 | ||
23 | memory { | |
24 | name = "memory"; | |
25 | device_type = "memory"; | |
26 | reg = <0x0 0x40000000>; /* 1GB */ | |
27 | }; | |
7fb46430 MV |
28 | }; |
29 | ||
30 | &gmac1 { | |
31 | status = "okay"; | |
32 | phy-mode = "rgmii"; | |
33 | }; | |
34 | ||
35 | &gpio0 { | |
36 | status = "okay"; | |
37 | }; | |
38 | ||
39 | &gpio1 { | |
40 | status = "okay"; | |
41 | }; | |
42 | ||
43 | &gpio2 { | |
44 | status = "okay"; | |
45 | }; | |
46 | ||
c402e817 SG |
47 | &porta { |
48 | bank-name = "porta"; | |
49 | }; | |
50 | ||
51 | &portb { | |
52 | bank-name = "portb"; | |
53 | }; | |
54 | ||
55 | &portc { | |
56 | bank-name = "portc"; | |
57 | }; | |
58 | ||
7fb46430 MV |
59 | &mmc0 { |
60 | status = "okay"; | |
8c103c33 | 61 | bootph-all; |
7fb46430 MV |
62 | }; |
63 | ||
64 | &usb1 { | |
65 | disable-over-current; | |
66 | status = "okay"; | |
67 | }; | |
79a436d5 SG |
68 | |
69 | &uart0 { | |
8c103c33 | 70 | bootph-all; |
79a436d5 | 71 | }; |
c402e817 SG |
72 | |
73 | &watchdog0 { | |
74 | status = "disabled"; | |
75 | }; |