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1 | /* |
2 | * Copyright 2012 Maxime Ripard | |
3 | * | |
4 | * Maxime Ripard <maxime.ripard@free-electrons.com> | |
5 | * | |
6 | * This file is dual-licensed: you can use it either under the terms | |
7 | * of the GPL or the X11 license, at your option. Note that this dual | |
8 | * licensing only applies to this file, and not this project as a | |
9 | * whole. | |
10 | * | |
11 | * a) This library is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of the | |
14 | * License, or (at your option) any later version. | |
15 | * | |
16 | * This library is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
53ab4af3 HG |
21 | * Or, alternatively, |
22 | * | |
23 | * b) Permission is hereby granted, free of charge, to any person | |
24 | * obtaining a copy of this software and associated documentation | |
25 | * files (the "Software"), to deal in the Software without | |
26 | * restriction, including without limitation the rights to use, | |
27 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
28 | * sell copies of the Software, and to permit persons to whom the | |
29 | * Software is furnished to do so, subject to the following | |
30 | * conditions: | |
31 | * | |
32 | * The above copyright notice and this permission notice shall be | |
33 | * included in all copies or substantial portions of the Software. | |
34 | * | |
35 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
36 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
37 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
38 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
39 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
40 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
41 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
42 | * OTHER DEALINGS IN THE SOFTWARE. | |
43 | */ | |
44 | ||
45 | #include "skeleton.dtsi" | |
46 | ||
47 | #include "sun5i.dtsi" | |
48 | ||
49 | #include <dt-bindings/pinctrl/sun4i-a10.h> | |
50 | #include <dt-bindings/thermal/thermal.h> | |
51 | ||
52 | / { | |
53 | interrupt-parent = <&intc>; | |
54 | ||
55 | chosen { | |
56 | #address-cells = <1>; | |
57 | #size-cells = <1>; | |
58 | ranges; | |
59 | ||
60 | framebuffer@0 { | |
61 | compatible = "allwinner,simple-framebuffer", | |
62 | "simple-framebuffer"; | |
63 | allwinner,pipeline = "de_be0-lcd0"; | |
64 | clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>; | |
65 | status = "disabled"; | |
66 | }; | |
67 | }; | |
68 | ||
69 | thermal-zones { | |
70 | cpu_thermal { | |
71 | /* milliseconds */ | |
72 | polling-delay-passive = <250>; | |
73 | polling-delay = <1000>; | |
74 | thermal-sensors = <&rtp>; | |
75 | ||
76 | cooling-maps { | |
77 | map0 { | |
78 | trip = <&cpu_alert0>; | |
79 | cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; | |
80 | }; | |
81 | }; | |
82 | ||
83 | trips { | |
84 | cpu_alert0: cpu_alert0 { | |
85 | /* milliCelsius */ | |
86 | temperature = <850000>; | |
87 | hysteresis = <2000>; | |
88 | type = "passive"; | |
89 | }; | |
90 | ||
91 | cpu_crit: cpu_crit { | |
92 | /* milliCelsius */ | |
93 | temperature = <100000>; | |
94 | hysteresis = <2000>; | |
95 | type = "critical"; | |
96 | }; | |
97 | }; | |
98 | }; | |
99 | }; | |
100 | ||
101 | clocks { | |
102 | ahb_gates: clk@01c20060 { | |
103 | #clock-cells = <1>; | |
104 | compatible = "allwinner,sun5i-a13-ahb-gates-clk"; | |
105 | reg = <0x01c20060 0x8>; | |
106 | clocks = <&ahb>; | |
8b1ba941 HG |
107 | clock-output-names = "ahb_usbotg", "ahb_ehci", |
108 | "ahb_ohci", "ahb_ss", "ahb_dma", | |
109 | "ahb_bist", "ahb_mmc0", "ahb_mmc1", | |
110 | "ahb_mmc2", "ahb_nand", | |
111 | "ahb_sdram", "ahb_spi0", | |
112 | "ahb_spi1", "ahb_spi2", | |
113 | "ahb_stimer", "ahb_ve", "ahb_lcd", | |
114 | "ahb_csi", "ahb_de_be", | |
115 | "ahb_de_fe", "ahb_iep", | |
116 | "ahb_mali400"; | |
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117 | }; |
118 | ||
119 | apb0_gates: clk@01c20068 { | |
120 | #clock-cells = <1>; | |
121 | compatible = "allwinner,sun5i-a13-apb0-gates-clk"; | |
122 | reg = <0x01c20068 0x4>; | |
123 | clocks = <&apb0>; | |
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124 | clock-output-names = "apb0_codec", "apb0_pio", |
125 | "apb0_ir"; | |
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126 | }; |
127 | ||
128 | apb1_gates: clk@01c2006c { | |
129 | #clock-cells = <1>; | |
130 | compatible = "allwinner,sun5i-a13-apb1-gates-clk"; | |
131 | reg = <0x01c2006c 0x4>; | |
132 | clocks = <&apb1>; | |
133 | clock-output-names = "apb1_i2c0", "apb1_i2c1", | |
134 | "apb1_i2c2", "apb1_uart1", "apb1_uart3"; | |
135 | }; | |
136 | }; | |
137 | }; | |
138 | ||
139 | &cpu0 { | |
140 | clock-latency = <244144>; /* 8 32k periods */ | |
141 | operating-points = < | |
8b1ba941 | 142 | /* kHz uV */ |
53ab4af3 | 143 | 1008000 1400000 |
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144 | 912000 1350000 |
145 | 864000 1300000 | |
146 | 624000 1200000 | |
147 | 576000 1200000 | |
148 | 432000 1200000 | |
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149 | >; |
150 | #cooling-cells = <2>; | |
151 | cooling-min-level = <0>; | |
152 | cooling-max-level = <5>; | |
153 | }; | |
154 | ||
155 | &pio { | |
156 | compatible = "allwinner,sun5i-a13-pinctrl"; | |
157 | ||
158 | uart1_pins_a: uart1@0 { | |
159 | allwinner,pins = "PE10", "PE11"; | |
160 | allwinner,function = "uart1"; | |
161 | allwinner,drive = <SUN4I_PINCTRL_10_MA>; | |
162 | allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; | |
163 | }; | |
164 | ||
165 | uart1_pins_b: uart1@1 { | |
166 | allwinner,pins = "PG3", "PG4"; | |
167 | allwinner,function = "uart1"; | |
168 | allwinner,drive = <SUN4I_PINCTRL_10_MA>; | |
169 | allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; | |
170 | }; | |
171 | }; |