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10d8bc5a CYT |
1 | /* |
2 | * Copyright 2016 Chen-Yu Tsai | |
3 | * | |
4 | * Chen-Yu Tsai <wens@csie.org> | |
5 | * | |
6 | * This file is dual-licensed: you can use it either under the terms | |
7 | * of the GPL or the X11 license, at your option. Note that this dual | |
8 | * licensing only applies to this file, and not this project as a | |
9 | * whole. | |
10 | * | |
11 | * a) This file is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of the | |
14 | * License, or (at your option) any later version. | |
15 | * | |
16 | * This file is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * Or, alternatively, | |
22 | * | |
23 | * b) Permission is hereby granted, free of charge, to any person | |
24 | * obtaining a copy of this software and associated documentation | |
25 | * files (the "Software"), to deal in the Software without | |
26 | * restriction, including without limitation the rights to use, | |
27 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
28 | * sell copies of the Software, and to permit persons to whom the | |
29 | * Software is furnished to do so, subject to the following | |
30 | * conditions: | |
31 | * | |
32 | * The above copyright notice and this permission notice shall be | |
33 | * included in all copies or substantial portions of the Software. | |
34 | * | |
35 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
36 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
37 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
38 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
39 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
40 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
41 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
42 | * OTHER DEALINGS IN THE SOFTWARE. | |
43 | */ | |
44 | ||
45 | #include <dt-bindings/interrupt-controller/arm-gic.h> | |
46 | ||
47 | / { | |
48 | #address-cells = <1>; | |
49 | #size-cells = <1>; | |
50 | interrupt-parent = <&gic>; | |
51 | ||
52 | aliases { | |
53 | }; | |
54 | ||
55 | chosen { | |
56 | }; | |
57 | ||
58 | clocks { | |
59 | #address-cells = <1>; | |
60 | #size-cells = <1>; | |
61 | ranges; | |
62 | ||
63 | osc24M: osc24M_clk { | |
64 | #clock-cells = <0>; | |
65 | compatible = "fixed-clock"; | |
66 | clock-frequency = <24000000>; | |
67 | }; | |
68 | ||
69 | osc32k: osc32k_clk { | |
70 | #clock-cells = <0>; | |
71 | compatible = "fixed-clock"; | |
72 | clock-frequency = <32768>; | |
73 | clock-output-names = "osc32k"; | |
74 | }; | |
75 | }; | |
76 | ||
77 | cpus { | |
78 | #address-cells = <1>; | |
79 | #size-cells = <0>; | |
80 | ||
81 | cpu0: cpu@0 { | |
82 | compatible = "arm,cortex-a7"; | |
83 | device_type = "cpu"; | |
84 | reg = <0>; | |
85 | }; | |
86 | ||
87 | cpu@1 { | |
88 | compatible = "arm,cortex-a7"; | |
89 | device_type = "cpu"; | |
90 | reg = <1>; | |
91 | }; | |
92 | ||
93 | cpu@2 { | |
94 | compatible = "arm,cortex-a7"; | |
95 | device_type = "cpu"; | |
96 | reg = <2>; | |
97 | }; | |
98 | ||
99 | cpu@3 { | |
100 | compatible = "arm,cortex-a7"; | |
101 | device_type = "cpu"; | |
102 | reg = <3>; | |
103 | }; | |
104 | }; | |
105 | ||
106 | memory@40000000 { | |
107 | device_type = "memory"; | |
108 | reg = <0x40000000 0x80000000>; | |
109 | }; | |
110 | ||
111 | soc { | |
112 | compatible = "simple-bus"; | |
113 | #address-cells = <1>; | |
114 | #size-cells = <1>; | |
115 | ranges; | |
116 | ||
117 | pio: pinctrl@1c20800 { | |
118 | compatible = "allwinner,sun8i-r40-pinctrl"; | |
119 | reg = <0x01c20800 0x400>; | |
120 | interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; | |
121 | /* apb should be replaced once CCU is implemented */ | |
122 | clocks = <&osc24M>, <&osc24M>, <&osc32k>; | |
123 | clock-names = "apb", "hosc", "losc"; | |
124 | gpio-controller; | |
125 | interrupt-controller; | |
126 | #interrupt-cells = <3>; | |
127 | #gpio-cells = <3>; | |
128 | ||
129 | i2c0_pins: i2c0_pins { | |
130 | pins = "PB0", "PB1"; | |
131 | function = "i2c0"; | |
132 | bias-pull-up; | |
133 | }; | |
134 | ||
135 | uart0_pb_pins: uart0_pb_pins { | |
136 | pins = "PB22", "PB23"; | |
137 | function = "uart0"; | |
138 | bias-pull-up; | |
139 | }; | |
140 | }; | |
141 | ||
142 | uart0: serial@1c28000 { | |
143 | compatible = "snps,dw-apb-uart"; | |
144 | reg = <0x01c28000 0x400>; | |
145 | interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; | |
146 | reg-shift = <2>; | |
147 | reg-io-width = <4>; | |
148 | clocks = <&osc24M>; | |
149 | status = "disabled"; | |
150 | }; | |
151 | ||
152 | i2c0: i2c@1c2ac00 { | |
153 | compatible = "allwinner,sun6i-a31-i2c"; | |
154 | reg = <0x01c2ac00 0x400>; | |
155 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
156 | clocks = <&osc24M>; | |
157 | status = "disabled"; | |
158 | #address-cells = <1>; | |
159 | #size-cells = <0>; | |
160 | }; | |
161 | ||
162 | gic: interrupt-controller@1c81000 { | |
163 | compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; | |
164 | reg = <0x01c81000 0x1000>, | |
165 | <0x01c82000 0x1000>, | |
166 | <0x01c84000 0x2000>, | |
167 | <0x01c86000 0x2000>; | |
168 | interrupt-controller; | |
169 | #interrupt-cells = <3>; | |
170 | interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; | |
171 | }; | |
172 | }; | |
173 | ||
174 | timer { | |
175 | compatible = "arm,armv7-timer"; | |
176 | interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
177 | <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
178 | <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
179 | <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; | |
180 | clock-frequency = <24000000>; | |
181 | arm,cpu-registers-not-fw-configured; | |
182 | }; | |
183 | }; |