projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 230ce30a MY |
1 | /* |
| 2 | * Device Tree Source for UniPhier PH1-sLD3 SoC | |
| 3 | * | |
| 64d851bf | 4 | * Copyright (C) 2014-2015 Panasonic Corporation |
| 6462cded MY |
5 | * Copyright (C) 2015 Socionext Inc. |
| 6 | * Author: Masahiro Yamada <yamada.masahiro@socionext.com> | |
| 230ce30a MY |
7 | * |
| 8 | * SPDX-License-Identifier: GPL-2.0+ | |
| 9 | */ | |
| 10 | ||
| 11 | /include/ "skeleton.dtsi" | |
| 12 | ||
| 13 | / { | |
| 6462cded | 14 | compatible = "socionext,ph1-sld3"; |
| 230ce30a MY |
15 | |
| 16 | cpus { | |
| 17 | #address-cells = <1>; | |
| 18 | #size-cells = <0>; | |
| 19 | ||
| 20 | cpu@0 { | |
| 21 | device_type = "cpu"; | |
| 22 | compatible = "arm,cortex-a9"; | |
| 23 | reg = <0>; | |
| 24 | }; | |
| 25 | ||
| 26 | cpu@1 { | |
| 27 | device_type = "cpu"; | |
| 28 | compatible = "arm,cortex-a9"; | |
| 29 | reg = <1>; | |
| 30 | }; | |
| 31 | }; | |
| 32 | ||
| 33 | soc { | |
| 34 | compatible = "simple-bus"; | |
| 35 | #address-cells = <1>; | |
| 36 | #size-cells = <1>; | |
| 37 | ranges; | |
| 38 | ||
| 39 | uart0: serial@54006800 { | |
| 6462cded | 40 | compatible = "socionext,uniphier-uart"; |
| 230ce30a MY |
41 | status = "disabled"; |
| 42 | reg = <0x54006800 0x20>; | |
| 43 | clock-frequency = <36864000>; | |
| 44 | }; | |
| 45 | ||
| 46 | uart1: serial@54006900 { | |
| 6462cded | 47 | compatible = "socionext,uniphier-uart"; |
| 230ce30a MY |
48 | status = "disabled"; |
| 49 | reg = <0x54006900 0x20>; | |
| 50 | clock-frequency = <36864000>; | |
| 51 | }; | |
| 52 | ||
| 53 | uart2: serial@54006a00 { | |
| 6462cded | 54 | compatible = "socionext,uniphier-uart"; |
| 230ce30a MY |
55 | status = "disabled"; |
| 56 | reg = <0x54006a00 0x20>; | |
| 57 | clock-frequency = <36864000>; | |
| 58 | }; | |
| 59 | ||
| 60 | i2c0: i2c@58400000 { | |
| 6462cded | 61 | compatible = "socionext,uniphier-i2c"; |
| 230ce30a MY |
62 | #address-cells = <1>; |
| 63 | #size-cells = <0>; | |
| 64 | reg = <0x58400000 0x40>; | |
| 65 | clock-frequency = <100000>; | |
| 66 | status = "disabled"; | |
| 67 | }; | |
| 68 | ||
| 69 | i2c1: i2c@58480000 { | |
| 6462cded | 70 | compatible = "socionext,uniphier-i2c"; |
| 230ce30a MY |
71 | #address-cells = <1>; |
| 72 | #size-cells = <0>; | |
| 73 | reg = <0x58480000 0x40>; | |
| 74 | clock-frequency = <100000>; | |
| 75 | status = "disabled"; | |
| 76 | }; | |
| 77 | ||
| 78 | i2c2: i2c@58500000 { | |
| 6462cded | 79 | compatible = "socionext,uniphier-i2c"; |
| 230ce30a MY |
80 | #address-cells = <1>; |
| 81 | #size-cells = <0>; | |
| 82 | reg = <0x58500000 0x40>; | |
| 83 | clock-frequency = <100000>; | |
| 84 | status = "disabled"; | |
| 85 | }; | |
| 86 | ||
| 87 | i2c3: i2c@58580000 { | |
| 6462cded | 88 | compatible = "socionext,uniphier-i2c"; |
| 230ce30a MY |
89 | #address-cells = <1>; |
| 90 | #size-cells = <0>; | |
| 91 | reg = <0x58580000 0x40>; | |
| 92 | clock-frequency = <100000>; | |
| 93 | status = "disabled"; | |
| 94 | }; | |
| 95 | ||
| 96 | usb0: usb@5a800100 { | |
| 6462cded | 97 | compatible = "socionext,uniphier-ehci", "generic-ehci"; |
| 230ce30a MY |
98 | status = "disabled"; |
| 99 | reg = <0x5a800100 0x100>; | |
| 100 | }; | |
| 101 | ||
| 102 | usb1: usb@5a810100 { | |
| 6462cded | 103 | compatible = "socionext,uniphier-ehci", "generic-ehci"; |
| 230ce30a MY |
104 | status = "disabled"; |
| 105 | reg = <0x5a810100 0x100>; | |
| 106 | }; | |
| 107 | ||
| 108 | usb2: usb@5a820100 { | |
| 6462cded | 109 | compatible = "socionext,uniphier-ehci", "generic-ehci"; |
| 230ce30a MY |
110 | status = "disabled"; |
| 111 | reg = <0x5a820100 0x100>; | |
| 112 | }; | |
| 113 | ||
| 114 | usb3: usb@5a830100 { | |
| 6462cded | 115 | compatible = "socionext,uniphier-ehci", "generic-ehci"; |
| 230ce30a MY |
116 | status = "disabled"; |
| 117 | reg = <0x5a830100 0x100>; | |
| 118 | }; | |
| 119 | ||
| 120 | nand: nand@f8000000 { | |
| 121 | compatible = "denali,denali-nand-dt"; | |
| 122 | reg = <0xf8000000 0x20>, <0xf8100000 0x1000>; | |
| 123 | reg-names = "nand_data", "denali_reg"; | |
| 124 | }; | |
| 125 | }; | |
| 126 | }; |