projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 509eb678 MY |
1 | /* |
| 2 | * Device Tree Source for UniPhier PH1-sLD8 SoC | |
| 3 | * | |
| edcfaeb8 | 4 | * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com> |
| 509eb678 | 5 | * |
| 13b2ba1a | 6 | * SPDX-License-Identifier: GPL-2.0+ X11 |
| 509eb678 MY |
7 | */ |
| 8 | ||
| 8f06243a | 9 | /include/ "uniphier-common32.dtsi" |
| 509eb678 MY |
10 | |
| 11 | / { | |
| 6462cded | 12 | compatible = "socionext,ph1-sld8"; |
| 509eb678 MY |
13 | |
| 14 | cpus { | |
| 509eb678 | 15 | #address-cells = <1>; |
| f5fd7afc | 16 | #size-cells = <0>; |
| 509eb678 MY |
17 | |
| 18 | cpu@0 { | |
| 19 | device_type = "cpu"; | |
| 20 | compatible = "arm,cortex-a9"; | |
| 21 | reg = <0>; | |
| 4e1f81d4 | 22 | next-level-cache = <&l2>; |
| 509eb678 MY |
23 | }; |
| 24 | }; | |
| 25 | ||
| edcfaeb8 MY |
26 | clocks { |
| 27 | arm_timer_clk: arm_timer_clk { | |
| 28 | #clock-cells = <0>; | |
| 29 | compatible = "fixed-clock"; | |
| 30 | clock-frequency = <50000000>; | |
| 31 | }; | |
| d243c186 MY |
32 | |
| 33 | uart_clk: uart_clk { | |
| 34 | #clock-cells = <0>; | |
| 35 | compatible = "fixed-clock"; | |
| 36 | clock-frequency = <80000000>; | |
| 37 | }; | |
| 38 | ||
| 39 | iobus_clk: iobus_clk { | |
| 40 | #clock-cells = <0>; | |
| 41 | compatible = "fixed-clock"; | |
| 42 | clock-frequency = <100000000>; | |
| 43 | }; | |
| edcfaeb8 | 44 | }; |
| 8f06243a | 45 | }; |
| edcfaeb8 | 46 | |
| 8f06243a | 47 | &soc { |
| 4e1f81d4 MY |
48 | l2: l2-cache@500c0000 { |
| 49 | compatible = "socionext,uniphier-system-cache"; | |
| 50 | reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>; | |
| 51 | interrupts = <0 174 4>, <0 175 4>; | |
| 52 | cache-unified; | |
| 53 | cache-size = <(256 * 1024)>; | |
| 54 | cache-sets = <256>; | |
| 55 | cache-line-size = <128>; | |
| 56 | cache-level = <2>; | |
| 57 | }; | |
| 58 | ||
| 8f06243a MY |
59 | i2c0: i2c@58400000 { |
| 60 | compatible = "socionext,uniphier-i2c"; | |
| 61 | status = "disabled"; | |
| 62 | reg = <0x58400000 0x40>; | |
| 509eb678 | 63 | #address-cells = <1>; |
| 8f06243a MY |
64 | #size-cells = <0>; |
| 65 | interrupts = <0 41 1>; | |
| 66 | pinctrl-names = "default"; | |
| 67 | pinctrl-0 = <&pinctrl_i2c0>; | |
| 68 | clocks = <&iobus_clk>; | |
| 69 | clock-frequency = <100000>; | |
| 70 | }; | |
| f5fd7afc | 71 | |
| 8f06243a MY |
72 | i2c1: i2c@58480000 { |
| 73 | compatible = "socionext,uniphier-i2c"; | |
| 74 | status = "disabled"; | |
| 75 | reg = <0x58480000 0x40>; | |
| 76 | #address-cells = <1>; | |
| 77 | #size-cells = <0>; | |
| 78 | interrupts = <0 42 1>; | |
| 79 | pinctrl-names = "default"; | |
| 80 | pinctrl-0 = <&pinctrl_i2c1>; | |
| 81 | clocks = <&iobus_clk>; | |
| 82 | clock-frequency = <100000>; | |
| 83 | }; | |
| f5fd7afc | 84 | |
| 8f06243a MY |
85 | /* chip-internal connection for DMD */ |
| 86 | i2c2: i2c@58500000 { | |
| 87 | compatible = "socionext,uniphier-i2c"; | |
| 88 | reg = <0x58500000 0x40>; | |
| 89 | #address-cells = <1>; | |
| 90 | #size-cells = <0>; | |
| 91 | interrupts = <0 43 1>; | |
| 92 | pinctrl-names = "default"; | |
| 93 | pinctrl-0 = <&pinctrl_i2c2>; | |
| 94 | clocks = <&iobus_clk>; | |
| 95 | clock-frequency = <400000>; | |
| 96 | }; | |
| edcfaeb8 | 97 | |
| 8f06243a MY |
98 | i2c3: i2c@58580000 { |
| 99 | compatible = "socionext,uniphier-i2c"; | |
| 100 | status = "disabled"; | |
| 101 | reg = <0x58580000 0x40>; | |
| 102 | #address-cells = <1>; | |
| 103 | #size-cells = <0>; | |
| 104 | interrupts = <0 44 1>; | |
| 105 | pinctrl-names = "default"; | |
| 106 | pinctrl-0 = <&pinctrl_i2c3>; | |
| 107 | clocks = <&iobus_clk>; | |
| 108 | clock-frequency = <100000>; | |
| 109 | }; | |
| 149c751d | 110 | |
| 8f06243a MY |
111 | usb0: usb@5a800100 { |
| 112 | compatible = "socionext,uniphier-ehci", "generic-ehci"; | |
| 113 | status = "disabled"; | |
| 114 | reg = <0x5a800100 0x100>; | |
| 115 | interrupts = <0 80 4>; | |
| 116 | pinctrl-names = "default"; | |
| 117 | pinctrl-0 = <&pinctrl_usb0>; | |
| 118 | }; | |
| 149c751d | 119 | |
| 8f06243a MY |
120 | usb1: usb@5a810100 { |
| 121 | compatible = "socionext,uniphier-ehci", "generic-ehci"; | |
| 122 | status = "disabled"; | |
| 123 | reg = <0x5a810100 0x100>; | |
| 124 | interrupts = <0 81 4>; | |
| 125 | pinctrl-names = "default"; | |
| 126 | pinctrl-0 = <&pinctrl_usb1>; | |
| 127 | }; | |
| d243c186 | 128 | |
| 8f06243a MY |
129 | usb2: usb@5a820100 { |
| 130 | compatible = "socionext,uniphier-ehci", "generic-ehci"; | |
| 131 | status = "disabled"; | |
| 132 | reg = <0x5a820100 0x100>; | |
| 133 | interrupts = <0 82 4>; | |
| 134 | pinctrl-names = "default"; | |
| 135 | pinctrl-0 = <&pinctrl_usb2>; | |
| 136 | }; | |
| 137 | }; | |
| f5fd7afc | 138 | |
| 8f06243a MY |
139 | &serial0 { |
| 140 | clock-frequency = <80000000>; | |
| 141 | }; | |
| edcfaeb8 | 142 | |
| 8f06243a MY |
143 | &serial1 { |
| 144 | clock-frequency = <80000000>; | |
| 145 | }; | |
| edcfaeb8 | 146 | |
| 8f06243a MY |
147 | &serial2 { |
| 148 | clock-frequency = <80000000>; | |
| 149 | }; | |
| edcfaeb8 | 150 | |
| 8f06243a MY |
151 | &serial3 { |
| 152 | interrupts = <0 29 4>; | |
| 153 | clock-frequency = <80000000>; | |
| 509eb678 | 154 | }; |
| d243c186 | 155 | |
| 8f06243a MY |
156 | &pinctrl { |
| 157 | compatible = "socionext,ph1-sld8-pinctrl", "syscon"; | |
| 158 | }; |