[people/ms/u-boot.git] / arch / arm / dts / zynq-zc770-xm013.dts

/*
 * Xilinx ZC770 XM013 board DTS
 *
 * Copyright (C) 2013 Xilinx, Inc.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
/dts-v1/;
#include "zynq-7000.dtsi"

/ {
	compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
	model = "Xilinx Zynq";

	aliases {
		ethernet0 = &gem1;
		i2c0 = &i2c1;
		serial0 = &uart0;
		spi0 = &qspi;
		spi1 = &spi0;
	};

	chosen {
		bootargs = "";
		stdout-path = "serial0:115200n8";
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x40000000>;
	};
};

&can1 {
	status = "okay";
};

&gem1 {
	status = "okay";
	phy-mode = "rgmii-id";
	phy-handle = <&ethernet_phy>;

	ethernet_phy: ethernet-phy@7 {
		reg = <7>;
		device_type = "ethernet-phy";
	};
};

&i2c1 {
	status = "okay";
	clock-frequency = <400000>;

	si570: clock-generator@55 {
		#clock-cells = <0>;
		compatible = "silabs,si570";
		temperature-stability = <50>;
		reg = <0x55>;
		factory-fout = <156250000>;
		clock-frequency = <148500000>;
	};
};

&qspi {
	status = "okay";
};

&spi0 {
	status = "okay";
	num-cs = <4>;
	is-decoded-cs = <0>;
	eeprom: at25@0 {
		at25,byte-len = <8192>;
		at25,addr-mode = <2>;
		at25,page-size = <32>;

		compatible = "atmel,at25";
		reg = <2>;
		spi-max-frequency = <1000000>;
	};
};

&uart0 {
	u-boot,dm-pre-reloc;
	status = "okay";
};
Commit	Line	Data
9e0802bf JT	1	/*
	2	* Xilinx ZC770 XM013 board DTS
	3	*
	4	* Copyright (C) 2013 Xilinx, Inc.
	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8	/dts-v1/;
	9	#include "zynq-7000.dtsi"
	10
	11	/ {
9e0802bf	12	compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
5c45b166	13	model = "Xilinx Zynq";
7d34c5de	14
9f9d41ba	15	aliases {
5c45b166 MS	16	ethernet0 = &gem1;
5c45b166 MS	17	i2c0 = &i2c1;
9f9d41ba	18	serial0 = &uart0;
74720dc3 MS	19	spi0 = &qspi;
74720dc3 MS	20	spi1 = &spi0;
9f9d41ba MY	21	};
9f9d41ba MY	22
5c45b166	23	chosen {
936bbc5d	24	bootargs = "";
4691941b	25	stdout-path = "serial0:115200n8";
5c45b166 MS	26	};
5c45b166 MS	27
cc7978be	28	memory@0 {
7d34c5de	29	device_type = "memory";
5c45b166 MS	30	reg = <0x0 0x40000000>;
	31	};
	32	};
	33
5c45b166 MS	34	&can1 {
	35	status = "okay";
	36	};
	37
	38	&gem1 {
	39	status = "okay";
	40	phy-mode = "rgmii-id";
	41	phy-handle = <&ethernet_phy>;
	42
	43	ethernet_phy: ethernet-phy@7 {
	44	reg = <7>;
5fad1ab3	45	device_type = "ethernet-phy";
7d34c5de	46	};
9e0802bf	47	};
5c45b166 MS	48
	49	&i2c1 {
	50	status = "okay";
	51	clock-frequency = <400000>;
	52
	53	si570: clock-generator@55 {
	54	#clock-cells = <0>;
	55	compatible = "silabs,si570";
	56	temperature-stability = <50>;
	57	reg = <0x55>;
	58	factory-fout = <156250000>;
	59	clock-frequency = <148500000>;
	60	};
	61	};
	62
74720dc3 MS	63	&qspi {
	64	status = "okay";
	65	};
	66
7ebf67a3 MS	67	&spi0 {
	68	status = "okay";
	69	num-cs = <4>;
	70	is-decoded-cs = <0>;
	71	eeprom: at25@0 {
	72	at25,byte-len = <8192>;
	73	at25,addr-mode = <2>;
	74	at25,page-size = <32>;
	75
	76	compatible = "atmel,at25";
	77	reg = <2>;
	78	spi-max-frequency = <1000000>;
	79	};
	80	};
	81
5c45b166	82	&uart0 {
035c6b27	83	u-boot,dm-pre-reloc;
5c45b166 MS	84	status = "okay";
5c45b166 MS	85	};