[people/ms/u-boot.git] / arch / arm / dts / zynq-zybo.dts

/*
 * Digilent ZYBO board DTS
 *
 *  Copyright (C) 2011 - 2015 Xilinx
 *  Copyright (C) 2012 National Instruments Corp.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
/dts-v1/;
#include "zynq-7000.dtsi"

/ {
	model = "Zynq ZYBO Development Board";
	compatible = "digilent,zynq-zybo", "xlnx,zynq-7000";

	aliases {
		ethernet0 = &gem0;
		serial0 = &uart1;
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x20000000>;
	};

	chosen {
		bootargs = "earlyprintk";
		stdout-path = "serial0:115200n8";
	};

};

&clkc {
	ps-clk-frequency = <50000000>;
};

&gem0 {
	status = "okay";
	phy-mode = "rgmii-id";
	phy-handle = <&ethernet_phy>;

	ethernet_phy: ethernet-phy@0 {
		reg = <0>;
	};
};

&sdhci0 {
	status = "okay";
};

&uart1 {
	u-boot,dm-pre-reloc;
	status = "okay";
};
Commit	Line	Data
9757b65b PC	1	/*
	2	* Digilent ZYBO board DTS
	3	*
999667ca MS	4	* Copyright (C) 2011 - 2015 Xilinx
999667ca MS	5	* Copyright (C) 2012 National Instruments Corp.
9757b65b PC	6	*
	7	* SPDX-License-Identifier: GPL-2.0+
	8	*/
	9	/dts-v1/;
	10	#include "zynq-7000.dtsi"
	11
	12	/ {
999667ca MS	13	model = "Zynq ZYBO Development Board";
999667ca MS	14	compatible = "digilent,zynq-zybo", "xlnx,zynq-7000";
9757b65b PC	15
9757b65b PC	16	aliases {
999667ca	17	ethernet0 = &gem0;
9757b65b PC	18	serial0 = &uart1;
	19	};
	20
	21	memory {
	22	device_type = "memory";
999667ca	23	reg = <0x0 0x20000000>;
9757b65b	24	};
999667ca MS	25
	26	chosen {
	27	bootargs = "earlyprintk";
	28	stdout-path = "serial0:115200n8";
	29	};
	30
	31	};
	32
	33	&clkc {
	34	ps-clk-frequency = <50000000>;
	35	};
	36
	37	&gem0 {
	38	status = "okay";
	39	phy-mode = "rgmii-id";
	40	phy-handle = <&ethernet_phy>;
	41
	42	ethernet_phy: ethernet-phy@0 {
	43	reg = <0>;
	44	};
	45	};
	46
	47	&sdhci0 {
	48	status = "okay";
	49	};
	50
	51	&uart1 {
035c6b27	52	u-boot,dm-pre-reloc;
999667ca	53	status = "okay";
9757b65b	54	};