projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 8a8f084e CN |
1 | /* |
| 2 | * omap.h | |
| 3 | * | |
| 4 | * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ | |
| 5 | * | |
| 6 | * Author: | |
| 7 | * Chandan Nath <chandan.nath@ti.com> | |
| 8 | * | |
| 9 | * Derived from OMAP4 work by | |
| 10 | * Aneesh V <aneesh@ti.com> | |
| 11 | * | |
| 1a459660 | 12 | * SPDX-License-Identifier: GPL-2.0+ |
| 8a8f084e CN |
13 | */ |
| 14 | ||
| 15 | #ifndef _OMAP_H_ | |
| 16 | #define _OMAP_H_ | |
| 17 | ||
| 18 | /* | |
| 19 | * Non-secure SRAM Addresses | |
| 20 | * Non-secure RAM starts at 0x40300000 for GP devices. But we keep SRAM_BASE | |
| 21 | * at 0x40304000(EMU base) so that our code works for both EMU and GP | |
| 22 | */ | |
| 8b029f22 | 23 | #ifdef CONFIG_AM33XX |
| 320d9746 TR |
24 | #define NON_SECURE_SRAM_START 0x402F0400 |
| 25 | #define NON_SECURE_SRAM_END 0x40310000 | |
| edfcf85a | 26 | #define SRAM_SCRATCH_SPACE_ADDR 0x4030C000 |
| 8b029f22 MP |
27 | #elif defined(CONFIG_TI814X) |
| 28 | #define NON_SECURE_SRAM_START 0x40300000 | |
| 29 | #define NON_SECURE_SRAM_END 0x40320000 | |
| edfcf85a | 30 | #define SRAM_SCRATCH_SPACE_ADDR 0x4031B800 |
| 8b029f22 | 31 | #endif |
| 8a8f084e | 32 | #endif |