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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
55cdbb8d TR |
2 | /* |
3 | * (C) Copyright 2012 | |
4 | * Texas Instruments, <www.ti.com> | |
55cdbb8d TR |
5 | */ |
6 | #ifndef _ASM_ARCH_SPL_H_ | |
463bb19e | 7 | #define _ASM_ARCH_SPL_H_ |
55cdbb8d | 8 | |
62c5674e PK |
9 | #define BOOT_DEVICE_NONE 0x00 |
10 | #define BOOT_DEVICE_MMC2_2 0xFF | |
11 | ||
12 | #if defined(CONFIG_TI814X) | |
13 | #define BOOT_DEVICE_XIP 0x01 | |
14 | #define BOOT_DEVICE_XIPWAIT 0x02 | |
15 | #define BOOT_DEVICE_NAND 0x05 | |
16 | #define BOOT_DEVICE_NAND_I2C 0x06 | |
17 | #define BOOT_DEVICE_MMC2 0x08 /* ROM only supports 2nd instance. */ | |
18 | #define BOOT_DEVICE_MMC1 0x09 | |
19 | #define BOOT_DEVICE_SPI 0x15 | |
20 | #define BOOT_DEVICE_UART 0x41 | |
21 | #define BOOT_DEVICE_USBETH 0x44 | |
22 | #define BOOT_DEVICE_CPGMAC 0x46 | |
23 | ||
24 | #define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2 | |
25 | #define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1 | |
26 | #elif defined(CONFIG_TI816X) | |
27 | #define BOOT_DEVICE_XIP 0x01 | |
28 | #define BOOT_DEVICE_XIPWAIT 0x02 | |
29 | #define BOOT_DEVICE_NAND 0x03 | |
df9f07fa | 30 | #define BOOT_DEVICE_ONENAND 0x04 |
62c5674e PK |
31 | #define BOOT_DEVICE_MMC2 0x05 /* ROM only supports 2nd instance. */ |
32 | #define BOOT_DEVICE_MMC1 0x06 | |
dcf846d5 | 33 | #define BOOT_DEVICE_UART 0x43 |
62c5674e | 34 | #define BOOT_DEVICE_USB 0x45 |
c3d2c24f | 35 | |
62c5674e PK |
36 | #define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2 |
37 | #define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1 | |
38 | #elif defined(CONFIG_AM33XX) | |
39 | #define BOOT_DEVICE_XIP 0x01 | |
40 | #define BOOT_DEVICE_XIPWAIT 0x02 | |
41 | #define BOOT_DEVICE_NAND 0x05 | |
42 | #define BOOT_DEVICE_NAND_I2C 0x06 | |
43 | #define BOOT_DEVICE_MMC1 0x08 | |
44 | #define BOOT_DEVICE_MMC2 0x09 | |
7f961c90 | 45 | #define BOOT_DEVICE_SPI 0x0B |
62c5674e PK |
46 | #define BOOT_DEVICE_UART 0x41 |
47 | #define BOOT_DEVICE_USBETH 0x44 | |
48 | #define BOOT_DEVICE_CPGMAC 0x46 | |
bf863922 | 49 | #define BOOT_DEVICE_ONENAND 0xFF /* ROM does not support OneNAND. */ |
62c5674e PK |
50 | |
51 | #define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1 | |
52 | #define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2 | |
8cffe5bd | 53 | #elif defined(CONFIG_AM43XX) |
62c5674e PK |
54 | #define BOOT_DEVICE_NOR 0x01 |
55 | #define BOOT_DEVICE_NAND 0x05 | |
56 | #define BOOT_DEVICE_MMC1 0x07 | |
57 | #define BOOT_DEVICE_MMC2 0x08 | |
58 | #define BOOT_DEVICE_SPI 0x0A | |
bd716dd0 | 59 | #define BOOT_DEVICE_USB 0x0D |
62c5674e | 60 | #define BOOT_DEVICE_UART 0x41 |
bd716dd0 | 61 | #define BOOT_DEVICE_USBETH 0x45 |
62c5674e PK |
62 | #define BOOT_DEVICE_CPGMAC 0x47 |
63 | ||
64 | #define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1 | |
8cffe5bd | 65 | #ifdef CONFIG_SPL_USB_SUPPORT |
62c5674e | 66 | #define MMC_BOOT_DEVICES_END BOOT_DEVICE_USB |
8cffe5bd | 67 | #else |
62c5674e | 68 | #define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2 |
8cffe5bd | 69 | #endif |
74f40ea1 | 70 | #endif |
62c5674e | 71 | |
55cdbb8d | 72 | #endif |