[people/ms/u-boot.git] / arch / arm / include / asm / arch-at91 / at91_emac.h

/*
 * Copyright (C) 2009 Jens Scharsig (js_at_ng@scharsoft.de)
 *
 * based on AT91RM9200 datasheet revision I (36. Ethernet MAC (EMAC))
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef AT91_H
#define AT91_H

typedef struct at91_emac {
	u32	 ctl;
	u32	 cfg;
	u32	 sr;
	u32	 tar;
	u32	 tcr;
	u32	 tsr;
	u32	 rbqp;
	u32	 reserved0;
	u32	 rsr;
	u32	 isr;
	u32	 ier;
	u32	 idr;
	u32	 imr;
	u32	 man;
	u32	 reserved1[2];
	u32	 fra;
	u32	 scol;
	u32	 mocl;
	u32	 ok;
	u32	 seqe;
	u32	 ale;
	u32	 dte;
	u32	 lcol;
	u32	 ecol;
	u32	 cse;
	u32	 tue;
	u32	 cde;
	u32	 elr;
	u32	 rjb;
	u32	 usf;
	u32	 sqee;
	u32	 drfc;
	u32	 reserved2[3];
	u32	 hsh;
	u32	 hsl;
	u32	 sa1l;
	u32	 sa1h;
	u32	 sa2l;
	u32	 sa2h;
	u32	 sa3l;
	u32	 sa3h;
	u32	 sa4l;
	u32	 sa4h;
} at91_emac_t;

#define AT91_EMAC_CTL_LB	0x0001
#define AT91_EMAC_CTL_LBL	0x0002
#define AT91_EMAC_CTL_RE	0x0004
#define AT91_EMAC_CTL_TE	0x0008
#define AT91_EMAC_CTL_MPE	0x0010
#define AT91_EMAC_CTL_CSR	0x0020
#define AT91_EMAC_CTL_ISR	0x0040
#define AT91_EMAC_CTL_WES	0x0080
#define AT91_EMAC_CTL_BP	0x1000

#define AT91_EMAC_CFG_SPD	0x0001
#define AT91_EMAC_CFG_FD	0x0002
#define AT91_EMAC_CFG_BR	0x0004
#define AT91_EMAC_CFG_CAF	0x0010
#define AT91_EMAC_CFG_NBC	0x0020
#define AT91_EMAC_CFG_MTI	0x0040
#define AT91_EMAC_CFG_UNI	0x0080
#define AT91_EMAC_CFG_BIG	0x0100
#define AT91_EMAC_CFG_EAE	0x0200
#define AT91_EMAC_CFG_CLK_MASK	0xFFFFF3FF
#define AT91_EMAC_CFG_MCLK_8	0x0000
#define AT91_EMAC_CFG_MCLK_16	0x0400
#define AT91_EMAC_CFG_MCLK_32	0x0800
#define AT91_EMAC_CFG_MCLK_64	0x0C00
#define AT91_EMAC_CFG_RTY	0x1000
#define AT91_EMAC_CFG_RMII	0x2000

#define AT91_EMAC_SR_LINK	0x0001
#define AT91_EMAC_SR_MDIO	0x0002
#define AT91_EMAC_SR_IDLE	0x0004

#define AT91_EMAC_TCR_LEN(x)	(x & 0x7FF)
#define AT91_EMAC_TCR_NCRC	0x8000

#define AT91_EMAC_TSR_OVR	0x0001
#define AT91_EMAC_TSR_COL	0x0002
#define AT91_EMAC_TSR_RLE	0x0004
#define AT91_EMAC_TSR_TXIDLE	0x0008
#define AT91_EMAC_TSR_BNQ	0x0010
#define AT91_EMAC_TSR_COMP	0x0020
#define AT91_EMAC_TSR_UND	0x0040

#define AT91_EMAC_RSR_BNA	0x0001
#define AT91_EMAC_RSR_REC	0x0002
#define AT91_EMAC_RSR_OVR	0x0004

/*  ISR, IER, IDR, IMR use the same bits */
#define AT91_EMAC_IxR_DONE	0x0001
#define AT91_EMAC_IxR_RCOM	0x0002
#define AT91_EMAC_IxR_RBNA	0x0004
#define AT91_EMAC_IxR_TOVR	0x0008
#define AT91_EMAC_IxR_TUND	0x0010
#define AT91_EMAC_IxR_RTRY	0x0020
#define AT91_EMAC_IxR_TBRE	0x0040
#define AT91_EMAC_IxR_TCOM	0x0080
#define AT91_EMAC_IxR_TIDLE	0x0100
#define AT91_EMAC_IxR_LINK	0x0200
#define AT91_EMAC_IxR_ROVR	0x0400
#define AT91_EMAC_IxR_HRESP	0x0800

#define AT91_EMAC_MAN_DATA_MASK		0xFFFF
#define AT91_EMAC_MAN_CODE_802_3	0x00020000
#define AT91_EMAC_MAN_REGA(reg)		((reg & 0x1F) << 18)
#define AT91_EMAC_MAN_PHYA(phy)		((phy & 0x1F) << 23)
#define AT91_EMAC_MAN_RW_R		0x20000000
#define AT91_EMAC_MAN_RW_W		0x10000000
#define AT91_EMAC_MAN_HIGH		0x40000000
#define AT91_EMAC_MAN_LOW		0x80000000

#endif
Commit	Line	Data
c041e9d2	1	/*
c041e9d2 JS	2	* Copyright (C) 2009 Jens Scharsig (js_at_ng@scharsoft.de)
	3	*
	4	* based on AT91RM9200 datasheet revision I (36. Ethernet MAC (EMAC))
	5	*
	6	* See file CREDITS for list of people who contributed to this
	7	* project.
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation; either version 2 of
	12	* the License, or (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
6799a80f	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
c041e9d2 JS	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	22	* MA 02111-1307 USA
	23	*/
	24
	25	#ifndef AT91_H
	26	#define AT91_H
	27
	28	typedef struct at91_emac {
	29	u32 ctl;
	30	u32 cfg;
	31	u32 sr;
	32	u32 tar;
	33	u32 tcr;
	34	u32 tsr;
	35	u32 rbqp;
	36	u32 reserved0;
	37	u32 rsr;
	38	u32 isr;
	39	u32 ier;
	40	u32 idr;
	41	u32 imr;
	42	u32 man;
	43	u32 reserved1[2];
	44	u32 fra;
	45	u32 scol;
	46	u32 mocl;
	47	u32 ok;
	48	u32 seqe;
	49	u32 ale;
	50	u32 dte;
	51	u32 lcol;
	52	u32 ecol;
	53	u32 cse;
	54	u32 tue;
	55	u32 cde;
	56	u32 elr;
	57	u32 rjb;
	58	u32 usf;
	59	u32 sqee;
	60	u32 drfc;
	61	u32 reserved2[3];
	62	u32 hsh;
	63	u32 hsl;
b944ad22	64	u32 sa1l;
c041e9d2 JS	65	u32 sa1h;
	66	u32 sa2l;
	67	u32 sa2h;
	68	u32 sa3l;
	69	u32 sa3h;
	70	u32 sa4l;
	71	u32 sa4h;
	72	} at91_emac_t;
	73
	74	#define AT91_EMAC_CTL_LB 0x0001
	75	#define AT91_EMAC_CTL_LBL 0x0002
	76	#define AT91_EMAC_CTL_RE 0x0004
	77	#define AT91_EMAC_CTL_TE 0x0008
	78	#define AT91_EMAC_CTL_MPE 0x0010
	79	#define AT91_EMAC_CTL_CSR 0x0020
	80	#define AT91_EMAC_CTL_ISR 0x0040
	81	#define AT91_EMAC_CTL_WES 0x0080
	82	#define AT91_EMAC_CTL_BP 0x1000
	83
	84	#define AT91_EMAC_CFG_SPD 0x0001
	85	#define AT91_EMAC_CFG_FD 0x0002
	86	#define AT91_EMAC_CFG_BR 0x0004
	87	#define AT91_EMAC_CFG_CAF 0x0010
	88	#define AT91_EMAC_CFG_NBC 0x0020
	89	#define AT91_EMAC_CFG_MTI 0x0040
	90	#define AT91_EMAC_CFG_UNI 0x0080
	91	#define AT91_EMAC_CFG_BIG 0x0100
	92	#define AT91_EMAC_CFG_EAE 0x0200
	93	#define AT91_EMAC_CFG_CLK_MASK 0xFFFFF3FF
	94	#define AT91_EMAC_CFG_MCLK_8 0x0000
	95	#define AT91_EMAC_CFG_MCLK_16 0x0400
	96	#define AT91_EMAC_CFG_MCLK_32 0x0800
	97	#define AT91_EMAC_CFG_MCLK_64 0x0C00
	98	#define AT91_EMAC_CFG_RTY 0x1000
	99	#define AT91_EMAC_CFG_RMII 0x2000
	100
	101	#define AT91_EMAC_SR_LINK 0x0001
	102	#define AT91_EMAC_SR_MDIO 0x0002
	103	#define AT91_EMAC_SR_IDLE 0x0004
	104
	105	#define AT91_EMAC_TCR_LEN(x) (x & 0x7FF)
	106	#define AT91_EMAC_TCR_NCRC 0x8000
	107
	108	#define AT91_EMAC_TSR_OVR 0x0001
	109	#define AT91_EMAC_TSR_COL 0x0002
	110	#define AT91_EMAC_TSR_RLE 0x0004
	111	#define AT91_EMAC_TSR_TXIDLE 0x0008
	112	#define AT91_EMAC_TSR_BNQ 0x0010
	113	#define AT91_EMAC_TSR_COMP 0x0020
	114	#define AT91_EMAC_TSR_UND 0x0040
	115
	116	#define AT91_EMAC_RSR_BNA 0x0001
	117	#define AT91_EMAC_RSR_REC 0x0002
	118	#define AT91_EMAC_RSR_OVR 0x0004
	119
	120	/* ISR, IER, IDR, IMR use the same bits */
	121	#define AT91_EMAC_IxR_DONE 0x0001
	122	#define AT91_EMAC_IxR_RCOM 0x0002
	123	#define AT91_EMAC_IxR_RBNA 0x0004
	124	#define AT91_EMAC_IxR_TOVR 0x0008
	125	#define AT91_EMAC_IxR_TUND 0x0010
	126	#define AT91_EMAC_IxR_RTRY 0x0020
	127	#define AT91_EMAC_IxR_TBRE 0x0040
	128	#define AT91_EMAC_IxR_TCOM 0x0080
129	#define AT91_EMAC_IxR_TIDLE 0x0100
130	#define AT91_EMAC_IxR_LINK 0x0200
131	#define AT91_EMAC_IxR_ROVR 0x0400
132	#define AT91_EMAC_IxR_HRESP 0x0800
133
134	#define AT91_EMAC_MAN_DATA_MASK 0xFFFF
135	#define AT91_EMAC_MAN_CODE_802_3 0x00020000
136	#define AT91_EMAC_MAN_REGA(reg) ((reg & 0x1F) << 18)
137	#define AT91_EMAC_MAN_PHYA(phy) ((phy & 0x1F) << 23)
138	#define AT91_EMAC_MAN_RW_R 0x20000000
139	#define AT91_EMAC_MAN_RW_W 0x10000000
140	#define AT91_EMAC_MAN_HIGH 0x40000000
141	#define AT91_EMAC_MAN_LOW 0x80000000
142
143	#endif