[thirdparty/u-boot.git] / arch / arm / include / asm / arch-mxs / iomux.h

/*
 * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
 *			<armlinux@phytec.de>
 * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __MACH_MXS_IOMUX_H__
#define __MACH_MXS_IOMUX_H__

#ifndef __ASSEMBLY__

#include <asm/types.h>

/*
 * IOMUX/PAD Bit field definitions
 *
 * PAD_BANK:		 0..2	(3)
 * PAD_PIN:		 3..7	(5)
 * PAD_MUXSEL:		 8..9	(2)
 * PAD_MA:		10..11	(2)
 * PAD_MA_VALID:	12	(1)
 * PAD_VOL:		13	(1)
 * PAD_VOL_VALID:	14	(1)
 * PAD_PULL:		15	(1)
 * PAD_PULL_VALID:	16	(1)
 * RESERVED:		17..31	(15)
 */
typedef u32 iomux_cfg_t;

#define MXS_PAD_BANK_SHIFT	0
#define MXS_PAD_BANK_MASK	((iomux_cfg_t)0x7 << MXS_PAD_BANK_SHIFT)
#define MXS_PAD_PIN_SHIFT	3
#define MXS_PAD_PIN_MASK	((iomux_cfg_t)0x1f << MXS_PAD_PIN_SHIFT)
#define MXS_PAD_MUXSEL_SHIFT	8
#define MXS_PAD_MUXSEL_MASK	((iomux_cfg_t)0x3 << MXS_PAD_MUXSEL_SHIFT)
#define MXS_PAD_MA_SHIFT	10
#define MXS_PAD_MA_MASK		((iomux_cfg_t)0x3 << MXS_PAD_MA_SHIFT)
#define MXS_PAD_MA_VALID_SHIFT	12
#define MXS_PAD_MA_VALID_MASK	((iomux_cfg_t)0x1 << MXS_PAD_MA_VALID_SHIFT)
#define MXS_PAD_VOL_SHIFT	13
#define MXS_PAD_VOL_MASK	((iomux_cfg_t)0x1 << MXS_PAD_VOL_SHIFT)
#define MXS_PAD_VOL_VALID_SHIFT	14
#define MXS_PAD_VOL_VALID_MASK	((iomux_cfg_t)0x1 << MXS_PAD_VOL_VALID_SHIFT)
#define MXS_PAD_PULL_SHIFT	15
#define MXS_PAD_PULL_MASK	((iomux_cfg_t)0x1 << MXS_PAD_PULL_SHIFT)
#define MXS_PAD_PULL_VALID_SHIFT 16
#define MXS_PAD_PULL_VALID_MASK	((iomux_cfg_t)0x1 << MXS_PAD_PULL_VALID_SHIFT)

#define PAD_MUXSEL_0		0
#define PAD_MUXSEL_1		1
#define PAD_MUXSEL_2		2
#define PAD_MUXSEL_GPIO		3

#define PAD_4MA			0
#define PAD_8MA			1
#define PAD_12MA		2
#define PAD_16MA		3

#define PAD_1V8			0
#if defined(CONFIG_MX28)
#define PAD_3V3			1
#else
#define PAD_3V3			0
#endif

#define PAD_NOPULL		0
#define PAD_PULLUP		1

#define MXS_PAD_4MA	((PAD_4MA << MXS_PAD_MA_SHIFT) | \
					MXS_PAD_MA_VALID_MASK)
#define MXS_PAD_8MA	((PAD_8MA << MXS_PAD_MA_SHIFT) | \
					MXS_PAD_MA_VALID_MASK)
#define MXS_PAD_12MA	((PAD_12MA << MXS_PAD_MA_SHIFT) | \
					MXS_PAD_MA_VALID_MASK)
#define MXS_PAD_16MA	((PAD_16MA << MXS_PAD_MA_SHIFT) | \
					MXS_PAD_MA_VALID_MASK)

#define MXS_PAD_1V8	((PAD_1V8 << MXS_PAD_VOL_SHIFT) | \
					MXS_PAD_VOL_VALID_MASK)
#define MXS_PAD_3V3	((PAD_3V3 << MXS_PAD_VOL_SHIFT) | \
					MXS_PAD_VOL_VALID_MASK)

#define MXS_PAD_NOPULL	((PAD_NOPULL << MXS_PAD_PULL_SHIFT) | \
					MXS_PAD_PULL_VALID_MASK)
#define MXS_PAD_PULLUP	((PAD_PULLUP << MXS_PAD_PULL_SHIFT) | \
					MXS_PAD_PULL_VALID_MASK)

/* generic pad control used in most cases */
#define MXS_PAD_CTRL	(MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL)

#define MXS_IOMUX_PAD(_bank, _pin, _muxsel, _ma, _vol, _pull)		\
		(((iomux_cfg_t)(_bank) << MXS_PAD_BANK_SHIFT) |		\
		((iomux_cfg_t)(_pin) << MXS_PAD_PIN_SHIFT) |		\
		((iomux_cfg_t)(_muxsel) << MXS_PAD_MUXSEL_SHIFT) |	\
		((iomux_cfg_t)(_ma) << MXS_PAD_MA_SHIFT) |		\
		((iomux_cfg_t)(_vol) << MXS_PAD_VOL_SHIFT) |		\
		((iomux_cfg_t)(_pull) << MXS_PAD_PULL_SHIFT))

/*
 * A pad becomes naked, when none of mA, vol or pull
 * validity bits is set.
 */
#define MXS_IOMUX_PAD_NAKED(_bank, _pin, _muxsel) \
		MXS_IOMUX_PAD(_bank, _pin, _muxsel, 0, 0, 0)

static inline unsigned int PAD_BANK(iomux_cfg_t pad)
{
	return (pad & MXS_PAD_BANK_MASK) >> MXS_PAD_BANK_SHIFT;
}

static inline unsigned int PAD_PIN(iomux_cfg_t pad)
{
	return (pad & MXS_PAD_PIN_MASK) >> MXS_PAD_PIN_SHIFT;
}

static inline unsigned int PAD_MUXSEL(iomux_cfg_t pad)
{
	return (pad & MXS_PAD_MUXSEL_MASK) >> MXS_PAD_MUXSEL_SHIFT;
}

static inline unsigned int PAD_MA(iomux_cfg_t pad)
{
	return (pad & MXS_PAD_MA_MASK) >> MXS_PAD_MA_SHIFT;
}

static inline unsigned int PAD_MA_VALID(iomux_cfg_t pad)
{
	return (pad & MXS_PAD_MA_VALID_MASK) >> MXS_PAD_MA_VALID_SHIFT;
}

static inline unsigned int PAD_VOL(iomux_cfg_t pad)
{
	return (pad & MXS_PAD_VOL_MASK) >> MXS_PAD_VOL_SHIFT;
}

static inline unsigned int PAD_VOL_VALID(iomux_cfg_t pad)
{
	return (pad & MXS_PAD_VOL_VALID_MASK) >> MXS_PAD_VOL_VALID_SHIFT;
}

static inline unsigned int PAD_PULL(iomux_cfg_t pad)
{
	return (pad & MXS_PAD_PULL_MASK) >> MXS_PAD_PULL_SHIFT;
}

static inline unsigned int PAD_PULL_VALID(iomux_cfg_t pad)
{
	return (pad & MXS_PAD_PULL_VALID_MASK) >> MXS_PAD_PULL_VALID_SHIFT;
}

/*
 * configures a single pad in the iomuxer
 */
int mxs_iomux_setup_pad(iomux_cfg_t pad);

/*
 * configures multiple pads
 * convenient way to call the above function with tables
 */
int mxs_iomux_setup_multiple_pads(const iomux_cfg_t *pad_list, unsigned count);

#endif /* __ASSEMBLY__ */
#endif /* __MACH_MXS_IOMUX_H__*/
Commit	Line	Data
d91a672b MV	1	/*
	2	* Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
	3	* <armlinux@phytec.de>
	4	* Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
d91a672b MV	7	*/
	8
	9	#ifndef __MACH_MXS_IOMUX_H__
	10	#define __MACH_MXS_IOMUX_H__
	11
eb299602 OS	12	#ifndef __ASSEMBLY__
	13
	14	#include <asm/types.h>
	15
d91a672b MV	16	/*
	17	* IOMUX/PAD Bit field definitions
	18	*
	19	* PAD_BANK: 0..2 (3)
	20	* PAD_PIN: 3..7 (5)
	21	* PAD_MUXSEL: 8..9 (2)
	22	* PAD_MA: 10..11 (2)
	23	* PAD_MA_VALID: 12 (1)
	24	* PAD_VOL: 13 (1)
	25	* PAD_VOL_VALID: 14 (1)
	26	* PAD_PULL: 15 (1)
	27	* PAD_PULL_VALID: 16 (1)
	28	* RESERVED: 17..31 (15)
	29	*/
	30	typedef u32 iomux_cfg_t;
	31
	32	#define MXS_PAD_BANK_SHIFT 0
	33	#define MXS_PAD_BANK_MASK ((iomux_cfg_t)0x7 << MXS_PAD_BANK_SHIFT)
	34	#define MXS_PAD_PIN_SHIFT 3
	35	#define MXS_PAD_PIN_MASK ((iomux_cfg_t)0x1f << MXS_PAD_PIN_SHIFT)
	36	#define MXS_PAD_MUXSEL_SHIFT 8
	37	#define MXS_PAD_MUXSEL_MASK ((iomux_cfg_t)0x3 << MXS_PAD_MUXSEL_SHIFT)
	38	#define MXS_PAD_MA_SHIFT 10
	39	#define MXS_PAD_MA_MASK ((iomux_cfg_t)0x3 << MXS_PAD_MA_SHIFT)
	40	#define MXS_PAD_MA_VALID_SHIFT 12
	41	#define MXS_PAD_MA_VALID_MASK ((iomux_cfg_t)0x1 << MXS_PAD_MA_VALID_SHIFT)
	42	#define MXS_PAD_VOL_SHIFT 13
	43	#define MXS_PAD_VOL_MASK ((iomux_cfg_t)0x1 << MXS_PAD_VOL_SHIFT)
	44	#define MXS_PAD_VOL_VALID_SHIFT 14
	45	#define MXS_PAD_VOL_VALID_MASK ((iomux_cfg_t)0x1 << MXS_PAD_VOL_VALID_SHIFT)
	46	#define MXS_PAD_PULL_SHIFT 15
	47	#define MXS_PAD_PULL_MASK ((iomux_cfg_t)0x1 << MXS_PAD_PULL_SHIFT)
	48	#define MXS_PAD_PULL_VALID_SHIFT 16
	49	#define MXS_PAD_PULL_VALID_MASK ((iomux_cfg_t)0x1 << MXS_PAD_PULL_VALID_SHIFT)
	50
	51	#define PAD_MUXSEL_0 0
	52	#define PAD_MUXSEL_1 1
	53	#define PAD_MUXSEL_2 2
	54	#define PAD_MUXSEL_GPIO 3
	55
	56	#define PAD_4MA 0
	57	#define PAD_8MA 1
	58	#define PAD_12MA 2
	59	#define PAD_16MA 3
	60
	61	#define PAD_1V8 0
9aee34ec	62	#if defined(CONFIG_MX28)
d91a672b	63	#define PAD_3V3 1
9aee34ec FE	64	#else
	65	#define PAD_3V3 0
	66	#endif
d91a672b MV	67
	68	#define PAD_NOPULL 0
	69	#define PAD_PULLUP 1
	70
	71	#define MXS_PAD_4MA ((PAD_4MA << MXS_PAD_MA_SHIFT) \| \
	72	MXS_PAD_MA_VALID_MASK)
	73	#define MXS_PAD_8MA ((PAD_8MA << MXS_PAD_MA_SHIFT) \| \
	74	MXS_PAD_MA_VALID_MASK)
	75	#define MXS_PAD_12MA ((PAD_12MA << MXS_PAD_MA_SHIFT) \| \
	76	MXS_PAD_MA_VALID_MASK)
	77	#define MXS_PAD_16MA ((PAD_16MA << MXS_PAD_MA_SHIFT) \| \
	78	MXS_PAD_MA_VALID_MASK)
	79
	80	#define MXS_PAD_1V8 ((PAD_1V8 << MXS_PAD_VOL_SHIFT) \| \
	81	MXS_PAD_VOL_VALID_MASK)
	82	#define MXS_PAD_3V3 ((PAD_3V3 << MXS_PAD_VOL_SHIFT) \| \
	83	MXS_PAD_VOL_VALID_MASK)
	84
	85	#define MXS_PAD_NOPULL ((PAD_NOPULL << MXS_PAD_PULL_SHIFT) \| \
	86	MXS_PAD_PULL_VALID_MASK)
	87	#define MXS_PAD_PULLUP ((PAD_PULLUP << MXS_PAD_PULL_SHIFT) \| \
	88	MXS_PAD_PULL_VALID_MASK)
	89
	90	/* generic pad control used in most cases */
	91	#define MXS_PAD_CTRL (MXS_PAD_4MA \| MXS_PAD_3V3 \| MXS_PAD_NOPULL)
	92
	93	#define MXS_IOMUX_PAD(_bank, _pin, _muxsel, _ma, _vol, _pull) \
	94	(((iomux_cfg_t)(_bank) << MXS_PAD_BANK_SHIFT) \| \
	95	((iomux_cfg_t)(_pin) << MXS_PAD_PIN_SHIFT) \| \
	96	((iomux_cfg_t)(_muxsel) << MXS_PAD_MUXSEL_SHIFT) \| \
	97	((iomux_cfg_t)(_ma) << MXS_PAD_MA_SHIFT) \| \
	98	((iomux_cfg_t)(_vol) << MXS_PAD_VOL_SHIFT) \| \
	99	((iomux_cfg_t)(_pull) << MXS_PAD_PULL_SHIFT))
	100
	101	/*
	102	* A pad becomes naked, when none of mA, vol or pull
	103	* validity bits is set.
	104	*/
	105	#define MXS_IOMUX_PAD_NAKED(_bank, _pin, _muxsel) \
	106	MXS_IOMUX_PAD(_bank, _pin, _muxsel, 0, 0, 0)
	107
	108	static inline unsigned int PAD_BANK(iomux_cfg_t pad)
	109	{
	110	return (pad & MXS_PAD_BANK_MASK) >> MXS_PAD_BANK_SHIFT;
	111	}
	112
	113	static inline unsigned int PAD_PIN(iomux_cfg_t pad)
	114	{
	115	return (pad & MXS_PAD_PIN_MASK) >> MXS_PAD_PIN_SHIFT;
	116	}
	117
	118	static inline unsigned int PAD_MUXSEL(iomux_cfg_t pad)
	119	{
	120	return (pad & MXS_PAD_MUXSEL_MASK) >> MXS_PAD_MUXSEL_SHIFT;
	121	}
	122
	123	static inline unsigned int PAD_MA(iomux_cfg_t pad)
	124	{
	125	return (pad & MXS_PAD_MA_MASK) >> MXS_PAD_MA_SHIFT;
	126	}
	127
	128	static inline unsigned int PAD_MA_VALID(iomux_cfg_t pad)
	129	{
	130	return (pad & MXS_PAD_MA_VALID_MASK) >> MXS_PAD_MA_VALID_SHIFT;
131	}
132
133	static inline unsigned int PAD_VOL(iomux_cfg_t pad)
134	{
135	return (pad & MXS_PAD_VOL_MASK) >> MXS_PAD_VOL_SHIFT;
136	}
137
138	static inline unsigned int PAD_VOL_VALID(iomux_cfg_t pad)
139	{
140	return (pad & MXS_PAD_VOL_VALID_MASK) >> MXS_PAD_VOL_VALID_SHIFT;
141	}
142
143	static inline unsigned int PAD_PULL(iomux_cfg_t pad)
144	{
145	return (pad & MXS_PAD_PULL_MASK) >> MXS_PAD_PULL_SHIFT;
146	}
147
148	static inline unsigned int PAD_PULL_VALID(iomux_cfg_t pad)
149	{
150	return (pad & MXS_PAD_PULL_VALID_MASK) >> MXS_PAD_PULL_VALID_SHIFT;
151	}
152
153	/*
154	* configures a single pad in the iomuxer
155	*/
156	int mxs_iomux_setup_pad(iomux_cfg_t pad);
157
158	/*
159	* configures multiple pads
160	* convenient way to call the above function with tables
161	*/
162	int mxs_iomux_setup_multiple_pads(const iomux_cfg_t *pad_list, unsigned count);
163
eb299602	164	#endif /* __ASSEMBLY__ */
d91a672b	165	#endif /* __MACH_MXS_IOMUX_H__*/