[people/ms/u-boot.git] / arch / arm / include / asm / arch-zynqmp / sys_proto.h

/*
 * (C) Copyright 2014 - 2015 Xilinx, Inc.
 * Michal Simek <michal.simek@xilinx.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _ASM_ARCH_SYS_PROTO_H
#define _ASM_ARCH_SYS_PROTO_H

#ifndef CONFIG_CLK_ZYNQMP
/* Setup clk for network */
static inline void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate)
{
}
#endif

int zynq_slcr_get_mio_pin_status(const char *periph);

unsigned int zynqmp_get_silicon_version(void);

void psu_init(void);

#endif /* _ASM_ARCH_SYS_PROTO_H */
Commit	Line	Data
84c7204b MS	1	/*
	2	* (C) Copyright 2014 - 2015 Xilinx, Inc.
	3	* Michal Simek <michal.simek@xilinx.com>
	4	*
	5	* SPDX-License-Identifier: GPL-2.0+
	6	*/
	7
	8	#ifndef _ASM_ARCH_SYS_PROTO_H
	9	#define _ASM_ARCH_SYS_PROTO_H
	10
a765bdd1	11	#ifndef CONFIG_CLK_ZYNQMP
cb7ea820 MS	12	/* Setup clk for network */
	13	static inline void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate)
	14	{
	15	}
a765bdd1	16	#endif
cb7ea820	17
225bf9aa	18	int zynq_slcr_get_mio_pin_status(const char *periph);
84c7204b MS	19
	20	unsigned int zynqmp_get_silicon_version(void);
	21
e6a9ed04 MS	22	void psu_init(void);
e6a9ed04 MS	23
84c7204b	24	#endif /* _ASM_ARCH_SYS_PROTO_H */