]> git.ipfire.org Git - people/ms/u-boot.git/blame - arch/arm/include/asm/fsl_secure_boot.h
Merge git://git.denx.de/u-boot-spi
[people/ms/u-boot.git] / arch / arm / include / asm / fsl_secure_boot.h
CommitLineData
98cb0efd 1/*
2 * Copyright 2015 Freescale Semiconductor, Inc.
06fb06f6 3 * Copyright 2017 NXP
98cb0efd 4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __FSL_SECURE_BOOT_H
9#define __FSL_SECURE_BOOT_H
10
bdc22074 11#ifdef CONFIG_CHAIN_OF_TRUST
2ed948f4 12#define CONFIG_FSL_SEC_MON
2ed948f4 13
b63f8a43 14#ifdef CONFIG_SPL_BUILD
028ac8c7
SG
15/*
16 * Define the key hash for U-Boot here if public/private key pair used to
17 * sign U-boot are different from the SRK hash put in the fuse
18 * Example of defining KEY_HASH is
19 * #define CONFIG_SPL_UBOOT_KEY_HASH \
20 * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
21 * else leave it defined as NULL
22 */
23
24#define CONFIG_SPL_UBOOT_KEY_HASH NULL
25#endif /* ifdef CONFIG_SPL_BUILD */
26
70f9661c
RG
27#define CONFIG_KEY_REVOCATION
28
028ac8c7 29#ifndef CONFIG_SPL_BUILD
2ed948f4
AB
30#ifndef CONFIG_SYS_RAMBOOT
31/* The key used for verification of next level images
32 * is picked up from an Extension Table which has
33 * been verified by the ISBC (Internal Secure boot Code)
34 * in boot ROM of the SoC.
35 * The feature is only applicable in case of NOR boot and is
36 * not applicable in case of RAMBOOT (NAND, SD, SPI).
ac55dadb
UA
37 * For LS, this feature is available for all device if IE Table
38 * is copied to XIP memory
39 * Also, for LS, ISBC doesn't verify this table.
2ed948f4
AB
40 */
41#define CONFIG_FSL_ISBC_KEY_EXT
2ed948f4 42
fd6dbc98
SJ
43#endif
44
b3635f57
VPB
45#if defined(CONFIG_FSL_LAYERSCAPE)
46/*
47 * For fsl layerscape based platforms, ESBC image Address in Header
48 * is 64 bit.
fcfdb6d5 49 */
ef6c55a2
AB
50#define CONFIG_ESBC_ADDR_64BIT
51#endif
52
4a3ab193 53#ifdef CONFIG_ARCH_LS2080A
bef238cb
SJ
54#define CONFIG_EXTRA_ENV \
55 "setenv fdt_high 0xa0000000;" \
56 "setenv initrd_high 0xcfffffff;" \
57 "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
58#else
98cb0efd 59#define CONFIG_EXTRA_ENV \
69d4b48c
SG
60 "setenv fdt_high 0xffffffff;" \
61 "setenv initrd_high 0xffffffff;" \
98cb0efd 62 "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
bef238cb 63#endif
98cb0efd 64
3f701cc5
SJ
65/* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from
66 * Non-XIP Memory (Nand/SD)*/
39199356 67#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \
762f92a6 68 defined(CONFIG_SD_BOOT) || defined(CONFIG_NAND_BOOT)
3f701cc5
SJ
69#define CONFIG_BOOTSCRIPT_COPY_RAM
70#endif
69d4b48c
SG
71/* The address needs to be modified according to NOR, NAND, SD and
72 * DDR memory map
73 */
39199356 74#ifdef CONFIG_FSL_LSCH3
15e7c681
UA
75#ifdef CONFIG_QSPI_BOOT
76#define CONFIG_BS_ADDR_DEVICE 0x20600000
77#define CONFIG_BS_HDR_ADDR_DEVICE 0x20640000
78#else /* NOR BOOT */
06fb06f6
SG
79#define CONFIG_BS_ADDR_DEVICE 0x580600000
80#define CONFIG_BS_HDR_ADDR_DEVICE 0x580640000
15e7c681 81#endif /*ifdef CONFIG_QSPI_BOOT */
69d4b48c 82#define CONFIG_BS_SIZE 0x00001000
06fb06f6
SG
83#define CONFIG_BS_HDR_SIZE 0x00004000
84#define CONFIG_BS_ADDR_RAM 0xa0600000
85#define CONFIG_BS_HDR_ADDR_RAM 0xa0640000
69d4b48c
SG
86#else
87#ifdef CONFIG_SD_BOOT
88/* For SD boot address and size are assigned in terms of sector
89 * offset and no. of sectors respectively.
90 */
06fb06f6
SG
91#define CONFIG_BS_ADDR_DEVICE 0x00003000
92#define CONFIG_BS_HDR_ADDR_DEVICE 0x00003200
69d4b48c 93#define CONFIG_BS_SIZE 0x00000008
06fb06f6 94#define CONFIG_BS_HDR_SIZE 0x00000010
762f92a6 95#elif defined(CONFIG_NAND_BOOT)
06fb06f6
SG
96#define CONFIG_BS_ADDR_DEVICE 0x00600000
97#define CONFIG_BS_HDR_ADDR_DEVICE 0x00640000
98#define CONFIG_BS_SIZE 0x00001000
b3635f57 99#define CONFIG_BS_HDR_SIZE 0x00002000
06fb06f6
SG
100#elif defined(CONFIG_QSPI_BOOT)
101#define CONFIG_BS_ADDR_DEVICE 0x40600000
102#define CONFIG_BS_HDR_ADDR_DEVICE 0x40640000
b3635f57 103#define CONFIG_BS_SIZE 0x00001000
69d4b48c 104#define CONFIG_BS_HDR_SIZE 0x00002000
06fb06f6
SG
105#else /* Default NOR Boot */
106#define CONFIG_BS_ADDR_DEVICE 0x60600000
107#define CONFIG_BS_HDR_ADDR_DEVICE 0x60640000
69d4b48c 108#define CONFIG_BS_SIZE 0x00001000
06fb06f6 109#define CONFIG_BS_HDR_SIZE 0x00002000
b3635f57 110#endif
06fb06f6
SG
111#define CONFIG_BS_ADDR_RAM 0x81000000
112#define CONFIG_BS_HDR_ADDR_RAM 0x81020000
3f701cc5
SJ
113#endif
114
115#ifdef CONFIG_BOOTSCRIPT_COPY_RAM
3f701cc5 116#define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM
06fb06f6 117#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM
216e93a1 118#else
69d4b48c
SG
119#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_DEVICE
120/* BOOTSCRIPT_ADDR is not required */
216e93a1 121#endif
98cb0efd 122
07806e62 123#ifdef CONFIG_FSL_LS_PPA
07806e62
SG
124/* Define the key hash here if SRK used for signing PPA image is
125 * different from SRK hash put in SFP used for U-Boot.
126 * Example
d1a795ac 127 * #define PPA_KEY_HASH \
07806e62
SG
128 * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
129 */
d1a795ac 130#define PPA_KEY_HASH NULL
07806e62
SG
131#endif /* ifdef CONFIG_FSL_LS_PPA */
132
bdc22074 133#include <config_fsl_chain_trust.h>
028ac8c7 134#endif /* #ifndef CONFIG_SPL_BUILD */
bdc22074 135#endif /* #ifdef CONFIG_CHAIN_OF_TRUST */
98cb0efd 136#endif