[people/ms/u-boot.git] / arch / arm / include / asm / imx-common / iomux-v3.h

/*
 * Based on Linux i.MX iomux-v3.h file:
 * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
 *			<armlinux@phytec.de>
 *
 * Copyright (C) 2011 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#ifndef __MACH_IOMUX_V3_H__
#define __MACH_IOMUX_V3_H__

/*
 *	build IOMUX_PAD structure
 *
 * This iomux scheme is based around pads, which are the physical balls
 * on the processor.
 *
 * - Each pad has a pad control register (IOMUXC_SW_PAD_CTRL_x) which controls
 *   things like driving strength and pullup/pulldown.
 * - Each pad can have but not necessarily does have an output routing register
 *   (IOMUXC_SW_MUX_CTL_PAD_x).
 * - Each pad can have but not necessarily does have an input routing register
 *   (IOMUXC_x_SELECT_INPUT)
 *
 * The three register sets do not have a fixed offset to each other,
 * hence we order this table by pad control registers (which all pads
 * have) and put the optional i/o routing registers into additional
 * fields.
 *
 * The naming convention for the pad modes is SOC_PAD_<padname>__<padmode>
 * If <padname> or <padmode> refers to a GPIO, it is named GPIO_<unit>_<num>
 *
 * IOMUX/PAD Bit field definitions
 *
 * MUX_CTRL_OFS:	    0..11 (12)
 * PAD_CTRL_OFS:	   12..23 (12)
 * SEL_INPUT_OFS:	   24..35 (12)
 * MUX_MODE + SION:	   36..40  (5)
 * PAD_CTRL + NO_PAD_CTRL: 41..58 (18)
 * SEL_INP:		   59..62  (4)
 * reserved:		     63    (1)
*/

typedef u64 iomux_v3_cfg_t;

#define MUX_CTRL_OFS_SHIFT	0
#define MUX_CTRL_OFS_MASK	((iomux_v3_cfg_t)0xfff << MUX_CTRL_OFS_SHIFT)
#define MUX_PAD_CTRL_OFS_SHIFT	12
#define MUX_PAD_CTRL_OFS_MASK	((iomux_v3_cfg_t)0xfff << \
	MUX_PAD_CTRL_OFS_SHIFT)
#define MUX_SEL_INPUT_OFS_SHIFT	24
#define MUX_SEL_INPUT_OFS_MASK	((iomux_v3_cfg_t)0xfff << \
	MUX_SEL_INPUT_OFS_SHIFT)

#define MUX_MODE_SHIFT		36
#define MUX_MODE_MASK		((iomux_v3_cfg_t)0x1f << MUX_MODE_SHIFT)
#define MUX_PAD_CTRL_SHIFT	41
#define MUX_PAD_CTRL_MASK	((iomux_v3_cfg_t)0x3ffff << MUX_PAD_CTRL_SHIFT)
#define MUX_SEL_INPUT_SHIFT	59
#define MUX_SEL_INPUT_MASK	((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT)

#define MUX_PAD_CTRL(x)		((iomux_v3_cfg_t)(x) << MUX_PAD_CTRL_SHIFT)

#define IOMUX_PAD(pad_ctrl_ofs, mux_ctrl_ofs, mux_mode, sel_input_ofs,	\
		sel_input, pad_ctrl)					\
	(((iomux_v3_cfg_t)(mux_ctrl_ofs) << MUX_CTRL_OFS_SHIFT)     |	\
	((iomux_v3_cfg_t)(mux_mode)      << MUX_MODE_SHIFT)         |	\
	((iomux_v3_cfg_t)(pad_ctrl_ofs)  << MUX_PAD_CTRL_OFS_SHIFT) |	\
	((iomux_v3_cfg_t)(pad_ctrl)      << MUX_PAD_CTRL_SHIFT)     |	\
	((iomux_v3_cfg_t)(sel_input_ofs) << MUX_SEL_INPUT_OFS_SHIFT)|	\
	((iomux_v3_cfg_t)(sel_input)     << MUX_SEL_INPUT_SHIFT))

#define NO_PAD_CTRL		(1 << 17)
#define GPIO_PIN_MASK		0x1f
#define GPIO_PORT_SHIFT		5
#define GPIO_PORT_MASK		(0x7 << GPIO_PORT_SHIFT)
#define GPIO_PORTA		(0 << GPIO_PORT_SHIFT)
#define GPIO_PORTB		(1 << GPIO_PORT_SHIFT)
#define GPIO_PORTC		(2 << GPIO_PORT_SHIFT)
#define GPIO_PORTD		(3 << GPIO_PORT_SHIFT)
#define GPIO_PORTE		(4 << GPIO_PORT_SHIFT)
#define GPIO_PORTF		(5 << GPIO_PORT_SHIFT)

#define MUX_CONFIG_SION		(0x1 << 4)

void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad);
void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
				     unsigned count);

#endif	/* __MACH_IOMUX_V3_H__*/
Commit	Line	Data
23608e23 JL	1	/*
	2	* Based on Linux i.MX iomux-v3.h file:
	3	* Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
	4	* <armlinux@phytec.de>
	5	*
	6	* Copyright (C) 2011 Freescale Semiconductor, Inc.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* as published by the Free Software Foundation; either version 2
	11	* of the License, or (at your option) any later version.
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	20	* MA 02110-1301, USA.
	21	*/
	22
	23	#ifndef __MACH_IOMUX_V3_H__
	24	#define __MACH_IOMUX_V3_H__
	25
	26	/*
	27	* build IOMUX_PAD structure
	28	*
	29	* This iomux scheme is based around pads, which are the physical balls
	30	* on the processor.
	31	*
	32	* - Each pad has a pad control register (IOMUXC_SW_PAD_CTRL_x) which controls
	33	* things like driving strength and pullup/pulldown.
	34	* - Each pad can have but not necessarily does have an output routing register
	35	* (IOMUXC_SW_MUX_CTL_PAD_x).
	36	* - Each pad can have but not necessarily does have an input routing register
	37	* (IOMUXC_x_SELECT_INPUT)
	38	*
	39	* The three register sets do not have a fixed offset to each other,
	40	* hence we order this table by pad control registers (which all pads
	41	* have) and put the optional i/o routing registers into additional
	42	* fields.
	43	*
	44	* The naming convention for the pad modes is SOC_PAD_<padname>__<padmode>
	45	* If <padname> or <padmode> refers to a GPIO, it is named GPIO_<unit>_<num>
	46	*
	47	* IOMUX/PAD Bit field definitions
	48	*
	49	* MUX_CTRL_OFS: 0..11 (12)
	50	* PAD_CTRL_OFS: 12..23 (12)
	51	* SEL_INPUT_OFS: 24..35 (12)
	52	* MUX_MODE + SION: 36..40 (5)
	53	* PAD_CTRL + NO_PAD_CTRL: 41..58 (18)
	54	* SEL_INP: 59..62 (4)
	55	* reserved: 63 (1)
	56	*/
	57
	58	typedef u64 iomux_v3_cfg_t;
	59
	60	#define MUX_CTRL_OFS_SHIFT 0
	61	#define MUX_CTRL_OFS_MASK ((iomux_v3_cfg_t)0xfff << MUX_CTRL_OFS_SHIFT)
	62	#define MUX_PAD_CTRL_OFS_SHIFT 12
	63	#define MUX_PAD_CTRL_OFS_MASK ((iomux_v3_cfg_t)0xfff << \
	64	MUX_PAD_CTRL_OFS_SHIFT)
65	#define MUX_SEL_INPUT_OFS_SHIFT 24
66	#define MUX_SEL_INPUT_OFS_MASK ((iomux_v3_cfg_t)0xfff << \
67	MUX_SEL_INPUT_OFS_SHIFT)
68
69	#define MUX_MODE_SHIFT 36
70	#define MUX_MODE_MASK ((iomux_v3_cfg_t)0x1f << MUX_MODE_SHIFT)
71	#define MUX_PAD_CTRL_SHIFT 41
72	#define MUX_PAD_CTRL_MASK ((iomux_v3_cfg_t)0x3ffff << MUX_PAD_CTRL_SHIFT)
73	#define MUX_SEL_INPUT_SHIFT 59
74	#define MUX_SEL_INPUT_MASK ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT)
75
76	#define MUX_PAD_CTRL(x) ((iomux_v3_cfg_t)(x) << MUX_PAD_CTRL_SHIFT)
77
78	#define IOMUX_PAD(pad_ctrl_ofs, mux_ctrl_ofs, mux_mode, sel_input_ofs, \
79	sel_input, pad_ctrl) \
80	(((iomux_v3_cfg_t)(mux_ctrl_ofs) << MUX_CTRL_OFS_SHIFT) \| \
81	((iomux_v3_cfg_t)(mux_mode) << MUX_MODE_SHIFT) \| \
82	((iomux_v3_cfg_t)(pad_ctrl_ofs) << MUX_PAD_CTRL_OFS_SHIFT) \| \
83	((iomux_v3_cfg_t)(pad_ctrl) << MUX_PAD_CTRL_SHIFT) \| \
84	((iomux_v3_cfg_t)(sel_input_ofs) << MUX_SEL_INPUT_OFS_SHIFT)\| \
85	((iomux_v3_cfg_t)(sel_input) << MUX_SEL_INPUT_SHIFT))
86
87	#define NO_PAD_CTRL (1 << 17)
88	#define GPIO_PIN_MASK 0x1f
89	#define GPIO_PORT_SHIFT 5
90	#define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT)
91	#define GPIO_PORTA (0 << GPIO_PORT_SHIFT)
92	#define GPIO_PORTB (1 << GPIO_PORT_SHIFT)
93	#define GPIO_PORTC (2 << GPIO_PORT_SHIFT)
94	#define GPIO_PORTD (3 << GPIO_PORT_SHIFT)
95	#define GPIO_PORTE (4 << GPIO_PORT_SHIFT)
96	#define GPIO_PORTF (5 << GPIO_PORT_SHIFT)
97
98	#define MUX_CONFIG_SION (0x1 << 4)
99
59efa051 SR	100	void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad);
59efa051 SR	101	void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
5ae28d2d	102	unsigned count);
23608e23 JL	103
23608e23 JL	104	#endif /* __MACH_IOMUX_V3_H__*/