projects / people / arne_f / kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /* |
| 2 | * linux/arch/arm/lib/delay.S | |
| 3 | * | |
| 4 | * Copyright (C) 1995, 1996 Russell King | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify | |
| 7 | * it under the terms of the GNU General Public License version 2 as | |
| 8 | * published by the Free Software Foundation. | |
| 9 | */ | |
| 10 | #include <linux/linkage.h> | |
| 11 | #include <asm/assembler.h> | |
| d0a533b1 | 12 | #include <asm/delay.h> |
| 1da177e4 LT |
13 | .text |
| 14 | ||
| 8adbb371 | 15 | .LC0: .word loops_per_jiffy |
| d0a533b1 | 16 | .LC1: .word UDELAY_MULT |
| 1da177e4 LT |
17 | |
| 18 | /* | |
| 6d4518d7 PT |
19 | * r0 <= 2000 |
| 20 | * lpj <= 0x01ffffff (max. 3355 bogomips) | |
| 21 | * HZ <= 1000 | |
| 1da177e4 | 22 | */ |
| 6d4518d7 | 23 | |
| d0a533b1 | 24 | ENTRY(__loop_udelay) |
| 6d4518d7 | 25 | ldr r2, .LC1 |
| 1da177e4 | 26 | mul r0, r2, r0 |
| d0a533b1 | 27 | ENTRY(__loop_const_udelay) @ 0 <= r0 <= 0x7fffff06 |
| 56949d41 | 28 | mov r1, #-1 |
| 8adbb371 | 29 | ldr r2, .LC0 |
| 6d4518d7 | 30 | ldr r2, [r2] @ max = 0x01ffffff |
| 56949d41 | 31 | add r0, r0, r1, lsr #32-14 |
| 6d4518d7 | 32 | mov r0, r0, lsr #14 @ max = 0x0001ffff |
| 56949d41 | 33 | add r2, r2, r1, lsr #32-10 |
| 6d4518d7 | 34 | mov r2, r2, lsr #10 @ max = 0x00007fff |
| 1da177e4 | 35 | mul r0, r2, r0 @ max = 2^32-1 |
| 56949d41 | 36 | add r0, r0, r1, lsr #32-6 |
| 1da177e4 | 37 | movs r0, r0, lsr #6 |
| 7999d8d7 | 38 | moveq pc, lr |
| 1da177e4 LT |
39 | |
| 40 | /* | |
| 6d4518d7 | 41 | * loops = r0 * HZ * loops_per_jiffy / 1000000 |
| 1da177e4 | 42 | */ |
| 11d4bb1b | 43 | .align 3 |
| 1da177e4 LT |
44 | |
| 45 | @ Delay routine | |
| d0a533b1 | 46 | ENTRY(__loop_delay) |
| 1da177e4 LT |
47 | subs r0, r0, #1 |
| 48 | #if 0 | |
| 7999d8d7 | 49 | movls pc, lr |
| 1da177e4 | 50 | subs r0, r0, #1 |
| 7999d8d7 | 51 | movls pc, lr |
| 1da177e4 | 52 | subs r0, r0, #1 |
| 7999d8d7 | 53 | movls pc, lr |
| 1da177e4 | 54 | subs r0, r0, #1 |
| 7999d8d7 | 55 | movls pc, lr |
| 1da177e4 | 56 | subs r0, r0, #1 |
| 7999d8d7 | 57 | movls pc, lr |
| 1da177e4 | 58 | subs r0, r0, #1 |
| 7999d8d7 | 59 | movls pc, lr |
| 1da177e4 | 60 | subs r0, r0, #1 |
| 7999d8d7 | 61 | movls pc, lr |
| 1da177e4 LT |
62 | subs r0, r0, #1 |
| 63 | #endif | |
| d0a533b1 | 64 | bhi __loop_delay |
| 7999d8d7 | 65 | mov pc, lr |
| d0a533b1 WD |
66 | ENDPROC(__loop_udelay) |
| 67 | ENDPROC(__loop_const_udelay) | |
| 68 | ENDPROC(__loop_delay) |