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Commit | Line | Data |
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a53c997d | 1 | /* |
6341c5cf RM |
2 | * (C) Copyright 2010 |
3 | * Reinhard Meyer, reinhard.meyer@emk-elektronik.de | |
a53c997d JCPV |
4 | * (C) Copyright 2009 |
5 | * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | |
6 | * | |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
a53c997d JCPV |
8 | */ |
9 | ||
b2403589 | 10 | #include <common.h> |
86592f60 | 11 | #include <asm/io.h> |
dc39ae95 JCPV |
12 | #include <asm/arch/hardware.h> |
13 | #include <asm/arch/at91_pmc.h> | |
c8f6d84d | 14 | #include <asm/arch/at91_pit.h> |
6341c5cf | 15 | #include <asm/arch/at91_gpbr.h> |
dc39ae95 | 16 | #include <asm/arch/clk.h> |
dc39ae95 | 17 | |
7c966a8b AE |
18 | #ifndef CONFIG_SYS_AT91_MAIN_CLOCK |
19 | #define CONFIG_SYS_AT91_MAIN_CLOCK 0 | |
b2403589 JCPV |
20 | #endif |
21 | ||
dc39ae95 JCPV |
22 | int arch_cpu_init(void) |
23 | { | |
7c966a8b | 24 | return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK); |
dc39ae95 | 25 | } |
b2403589 | 26 | |
c8f6d84d AS |
27 | void arch_preboot_os(void) |
28 | { | |
29 | ulong cpiv; | |
9f3fe90f | 30 | at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT; |
c8f6d84d AS |
31 | |
32 | cpiv = AT91_PIT_MR_PIV_MASK(readl(&pit->piir)); | |
33 | ||
34 | /* | |
35 | * Disable PITC | |
36 | * Add 0x1000 to current counter to stop it faster | |
37 | * without waiting for wrapping back to 0 | |
38 | */ | |
39 | writel(cpiv + 0x1000, &pit->mr); | |
40 | } | |
41 | ||
b2403589 JCPV |
42 | #if defined(CONFIG_DISPLAY_CPUINFO) |
43 | int print_cpuinfo(void) | |
44 | { | |
80402f34 | 45 | char __maybe_unused buf[32]; |
b2403589 | 46 | |
9f3fe90f | 47 | printf("CPU: %s\n", ATMEL_CPU_NAME); |
b2403589 JCPV |
48 | printf("Crystal frequency: %8s MHz\n", |
49 | strmhz(buf, get_main_clk_rate())); | |
50 | printf("CPU clock : %8s MHz\n", | |
51 | strmhz(buf, get_cpu_clk_rate())); | |
52 | printf("Master clock : %8s MHz\n", | |
53 | strmhz(buf, get_mck_clk_rate())); | |
54 | ||
55 | return 0; | |
56 | } | |
57 | #endif |