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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
5bb59b3c JCPV |
2 | /* |
3 | * (C) Copyright 2007-2008 | |
c9e798d3 | 4 | * Stelian Pop <stelian@popies.net> |
5bb59b3c | 5 | * Lead Tech Design <www.leadtechdesign.com> |
5bb59b3c JCPV |
6 | */ |
7 | ||
8 | #include <common.h> | |
86592f60 | 9 | #include <asm/io.h> |
5bb59b3c JCPV |
10 | #include <asm/arch/hardware.h> |
11 | #include <asm/arch/at91_rstc.h> | |
5bb59b3c | 12 | |
e0cd44c3 | 13 | /* Reset the cpu by telling the reset controller to do so */ |
5bb59b3c JCPV |
14 | void reset_cpu(ulong ignored) |
15 | { | |
9f3fe90f | 16 | at91_rstc_t *rstc = (at91_rstc_t *) ATMEL_BASE_RSTC; |
0cf0b931 | 17 | |
e0cd44c3 RM |
18 | writel(AT91_RSTC_KEY |
19 | | AT91_RSTC_CR_PROCRST /* Processor Reset */ | |
20 | | AT91_RSTC_CR_PERRST /* Peripheral Reset */ | |
21 | #ifdef CONFIG_AT91RESET_EXTRST | |
22 | | AT91_RSTC_CR_EXTRST /* External Reset (assert nRST pin) */ | |
23 | #endif | |
24 | , &rstc->cr); | |
25 | /* never reached */ | |
26 | while (1) | |
27 | ; | |
5bb59b3c | 28 | } |