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[people/ms/u-boot.git] / arch / arm / mach-at91 / arm926ejs / timer.c
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1/*
2 * (C) Copyright 2007-2008
c9e798d3 3 * Stelian Pop <stelian@popies.net>
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4 * Lead Tech Design <www.leadtechdesign.com>
5 *
1a459660 6 * SPDX-License-Identifier: GPL-2.0+
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7 */
8
9#include <common.h>
86592f60 10#include <asm/io.h>
fefb6c10 11#include <asm/arch/hardware.h>
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12#include <asm/arch/at91_pit.h>
13#include <asm/arch/at91_pmc.h>
6ebff365 14#include <asm/arch/clk.h>
6ebff365 15#include <div64.h>
fefb6c10 16
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17#if !defined(CONFIG_AT91FAMILY)
18# error You need to define CONFIG_AT91FAMILY in your board config!
19#endif
20
21DECLARE_GLOBAL_DATA_PTR;
22
fefb6c10 23/*
a8a78f2d 24 * We're using the AT91CAP9/SAM9 PITC in 32 bit mode, by
fefb6c10 25 * setting the 20 bit counter period to its maximum (0xfffff).
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26 * (See the relevant data sheets to understand that this really works)
27 *
28 * We do also mimic the typical powerpc way of incrementing
29 * two 32 bit registers called tbl and tbu.
30 *
31 * Those registers increment at 1/16 the main clock rate.
fefb6c10 32 */
fefb6c10 33
5dca710a 34#define TIMER_LOAD_VAL 0xfffff
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35
36static inline unsigned long long tick_to_time(unsigned long long tick)
37{
38 tick *= CONFIG_SYS_HZ;
b339051c 39 do_div(tick, gd->arch.timer_rate_hz);
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40
41 return tick;
42}
43
44static inline unsigned long long usec_to_tick(unsigned long long usec)
45{
b339051c 46 usec *= gd->arch.timer_rate_hz;
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47 do_div(usec, 1000000);
48
49 return usec;
50}
fefb6c10 51
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52/*
53 * Use the PITC in full 32 bit incrementing mode
54 */
61106a56 55int timer_init(void)
fefb6c10 56{
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57 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
58 at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT;
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59
60 /* Enable PITC Clock */
9f3fe90f 61 writel(1 << ATMEL_ID_SYS, &pmc->pcer);
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62
63 /* Enable PITC */
0cf0b931 64 writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);
fefb6c10 65
b339051c 66 gd->arch.timer_rate_hz = gd->arch.mck_rate_hz / 16;
66ee6923 67 gd->arch.tbu = gd->arch.tbl = 0;
6ebff365 68
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69 return 0;
70}
71
72/*
5dca710a 73 * Get the current 64 bit timer tick count
fefb6c10 74 */
6ebff365 75unsigned long long get_ticks(void)
fefb6c10 76{
9f3fe90f 77 at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT;
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78
79 ulong now = readl(&pit->piir);
983c1db0 80
5dca710a 81 /* increment tbu if tbl has rolled over */
66ee6923 82 if (now < gd->arch.tbl)
8ff43b03 83 gd->arch.tbu++;
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84 gd->arch.tbl = now;
85 return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
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86}
87
3eb90bad 88void __udelay(unsigned long usec)
fefb6c10 89{
cfff263f 90 unsigned long long start;
6ebff365 91 ulong tmo;
fefb6c10 92
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93 start = get_ticks(); /* get current timestamp */
94 tmo = usec_to_tick(usec); /* convert usecs to ticks */
95 while ((get_ticks() - start) < tmo)
96 ; /* loop till time has passed */
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97}
98
5dca710a 99/*
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100 * get_timer(base) can be used to check for timeouts or
101 * to measure elasped time relative to an event:
5dca710a 102 *
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103 * ulong start_time = get_timer(0) sets start_time to the current
104 * time value.
105 * get_timer(start_time) returns the time elapsed since then.
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106 *
107 * The time is used in CONFIG_SYS_HZ units!
108 */
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109ulong get_timer(ulong base)
110{
cfff263f 111 return tick_to_time(get_ticks()) - base;
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112}
113
114/*
5dca710a 115 * Return the number of timer ticks per second.
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116 */
117ulong get_tbclk(void)
118{
b339051c 119 return gd->arch.timer_rate_hz;
fefb6c10 120}