[thirdparty/linux.git] / arch / arm / mach-at91 / at91x40_time.c

/*
 * arch/arm/mach-at91/at91x40_time.c
 *
 * (C) Copyright 2007, Greg Ungerer <gerg@snapgear.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/time.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/mach/time.h>

#include "at91_tc.h"

#define at91_tc_read(field) \
	__raw_readl(AT91_IO_P2V(AT91_TC) + field)

#define at91_tc_write(field, value) \
	__raw_writel(value, AT91_IO_P2V(AT91_TC) + field);

/*
 *	3 counter/timer units present.
 */
#define	AT91_TC_CLK0BASE	0
#define	AT91_TC_CLK1BASE	0x40
#define	AT91_TC_CLK2BASE	0x80

static u32 at91x40_gettimeoffset(void)
{
	return (at91_tc_read(AT91_TC_CLK1BASE + AT91_TC_CV) * 1000000 /
		(AT91X40_MASTER_CLOCK / 128)) * 1000;
}

static irqreturn_t at91x40_timer_interrupt(int irq, void *dev_id)
{
	at91_tc_read(AT91_TC_CLK1BASE + AT91_TC_SR);
	timer_tick();
	return IRQ_HANDLED;
}

static struct irqaction at91x40_timer_irq = {
	.name		= "at91_tick",
	.flags		= IRQF_DISABLED | IRQF_TIMER,
	.handler	= at91x40_timer_interrupt
};

void __init at91x40_timer_init(void)
{
	unsigned int v;

	arch_gettimeoffset = at91x40_gettimeoffset;

	at91_tc_write(AT91_TC_BCR, 0);
	v = at91_tc_read(AT91_TC_BMR);
	v = (v & ~AT91_TC_TC1XC1S) | AT91_TC_TC1XC1S_NONE;
	at91_tc_write(AT91_TC_BMR, v);

	at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CCR, AT91_TC_CLKDIS);
	at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CMR, (AT91_TC_TIMER_CLOCK4 | AT91_TC_CPCTRG));
	at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_IDR, 0xffffffff);
	at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_RC, (AT91X40_MASTER_CLOCK / 128) / HZ - 1);
	at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_IER, (1<<4));

	setup_irq(AT91X40_ID_TC1, &at91x40_timer_irq);

	at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CCR, (AT91_TC_SWTRG | AT91_TC_CLKEN));
}
Commit	Line	Data
699a7145 GU	1	/*
	2	* arch/arm/mach-at91/at91x40_time.c
	3	*
	4	* (C) Copyright 2007, Greg Ungerer <gerg@snapgear.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*/
	20
	21	#include <linux/kernel.h>
	22	#include <linux/init.h>
	23	#include <linux/interrupt.h>
	24	#include <linux/irq.h>
	25	#include <linux/time.h>
fced80c7	26	#include <linux/io.h>
a09e64fb	27	#include <mach/hardware.h>
699a7145	28	#include <asm/mach/time.h>
d6ca436e JCPV	29
d6ca436e JCPV	30	#include "at91_tc.h"
699a7145	31
fac36a5a	32	#define at91_tc_read(field) \
dca4ba41	33	__raw_readl(AT91_IO_P2V(AT91_TC) + field)
fac36a5a JCPV	34
fac36a5a JCPV	35	#define at91_tc_write(field, value) \
dca4ba41	36	__raw_writel(value, AT91_IO_P2V(AT91_TC) + field);
fac36a5a	37
699a7145 GU	38	/*
	39	* 3 counter/timer units present.
	40	*/
	41	#define AT91_TC_CLK0BASE 0
	42	#define AT91_TC_CLK1BASE 0x40
	43	#define AT91_TC_CLK2BASE 0x80
	44
23c197b7	45	static u32 at91x40_gettimeoffset(void)
699a7145	46	{
23c197b7 SW	47	return (at91_tc_read(AT91_TC_CLK1BASE + AT91_TC_CV) * 1000000 /
23c197b7 SW	48	(AT91X40_MASTER_CLOCK / 128)) * 1000;
699a7145 GU	49	}
	50
	51	static irqreturn_t at91x40_timer_interrupt(int irq, void *dev_id)
	52	{
fac36a5a	53	at91_tc_read(AT91_TC_CLK1BASE + AT91_TC_SR);
699a7145 GU	54	timer_tick();
	55	return IRQ_HANDLED;
	56	}
	57
	58	static struct irqaction at91x40_timer_irq = {
	59	.name = "at91_tick",
	60	.flags = IRQF_DISABLED \| IRQF_TIMER,
	61	.handler = at91x40_timer_interrupt
	62	};
	63
	64	void __init at91x40_timer_init(void)
	65	{
	66	unsigned int v;
	67
23c197b7 SW	68	arch_gettimeoffset = at91x40_gettimeoffset;
23c197b7 SW	69
fac36a5a JCPV	70	at91_tc_write(AT91_TC_BCR, 0);
fac36a5a JCPV	71	v = at91_tc_read(AT91_TC_BMR);
699a7145	72	v = (v & ~AT91_TC_TC1XC1S) \| AT91_TC_TC1XC1S_NONE;
fac36a5a	73	at91_tc_write(AT91_TC_BMR, v);
699a7145	74
fac36a5a JCPV	75	at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CCR, AT91_TC_CLKDIS);
	76	at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CMR, (AT91_TC_TIMER_CLOCK4 \| AT91_TC_CPCTRG));
	77	at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_IDR, 0xffffffff);
	78	at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_RC, (AT91X40_MASTER_CLOCK / 128) / HZ - 1);
	79	at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_IER, (1<<4));
699a7145 GU	80
	81	setup_irq(AT91X40_ID_TC1, &at91x40_timer_irq);
	82
fac36a5a	83	at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CCR, (AT91_TC_SWTRG \| AT91_TC_CLKEN));
699a7145	84	}