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common: Pass the boot device into spl_boot_mode()
[people/ms/u-boot.git] / arch / arm / mach-davinci / misc.c
CommitLineData
264bbdd1
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1/*
2 * Miscelaneous DaVinci functions.
3 *
ca8480d4 4 * Copyright (C) 2009 Nick Thompson, GE Fanuc Ltd, <nick.thompson@gefanuc.com>
264bbdd1
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5 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
6 * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
7 * Copyright (C) 2004 Texas Instruments.
8 *
1a459660 9 * SPDX-License-Identifier: GPL-2.0+
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10 */
11
12#include <common.h>
13#include <i2c.h>
641e0925 14#include <net.h>
264bbdd1 15#include <asm/arch/hardware.h>
ca8480d4 16#include <asm/io.h>
d7f9b503 17#include <asm/arch/davinci_misc.h>
7a4f511b 18
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19DECLARE_GLOBAL_DATA_PTR;
20
eb40d05f 21#ifndef CONFIG_SPL_BUILD
97003756
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22int dram_init(void)
23{
24 /* dram_init must store complete ramsize in gd->ram_size */
25 gd->ram_size = get_ram_size(
a55d23cc 26 (void *)CONFIG_SYS_SDRAM_BASE,
97003756
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27 CONFIG_MAX_RAM_BANK_SIZE);
28 return 0;
29}
30
31void dram_init_banksize(void)
32{
33 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
34 gd->bd->bi_dram[0].size = gd->ram_size;
35}
6d1c649f 36#endif
264bbdd1 37
641e0925 38#ifdef CONFIG_DRIVER_TI_EMAC
8a73e561
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39/*
40 * Read ethernet MAC address from EEPROM for DVEVM compatible boards.
264bbdd1
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41 * Returns 1 if found, 0 otherwise.
42 */
43int dvevm_read_mac_address(uint8_t *buf)
44{
6d0f6bcf 45#ifdef CONFIG_SYS_I2C_EEPROM_ADDR
264bbdd1 46 /* Read MAC address. */
8a73e561
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47 if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x7F00,
48 CONFIG_SYS_I2C_EEPROM_ADDR_LEN, (uint8_t *) &buf[0], 6))
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49 goto i2cerr;
50
641e0925 51 /* Check that MAC address is valid. */
0adb5b76 52 if (!is_valid_ethaddr(buf))
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53 goto err;
54
55 return 1; /* Found */
56
57i2cerr:
8a73e561
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58 printf("Read from EEPROM @ 0x%02x failed\n",
59 CONFIG_SYS_I2C_EEPROM_ADDR);
264bbdd1 60err:
6d0f6bcf 61#endif /* CONFIG_SYS_I2C_EEPROM_ADDR */
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62
63 return 0;
64}
65
6d1c649f
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66/*
67 * Set the mii mode as MII or RMII
68 */
99e4c754 69#if defined(CONFIG_SOC_DA8XX)
6d1c649f
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70void davinci_emac_mii_mode_sel(int mode_sel)
71{
72 int val;
73
74 val = readl(&davinci_syscfg_regs->cfgchip3);
75 if (mode_sel == 0)
76 val &= ~(1 << 8);
77 else
78 val |= (1 << 8);
79 writel(val, &davinci_syscfg_regs->cfgchip3);
80}
81#endif
7b37a27e 82/*
264bbdd1 83 * If there is no MAC address in the environment, then it will be initialized
641e0925 84 * (silently) from the value in the EEPROM.
264bbdd1 85 */
7b37a27e 86void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr)
264bbdd1 87{
7b37a27e 88 uint8_t env_enetaddr[6];
826e9913 89 int ret;
264bbdd1 90
826e9913 91 ret = eth_getenv_enetaddr_by_index("eth", 0, env_enetaddr);
c8876f1c 92 if (!ret) {
8a73e561
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93 /*
94 * There is no MAC address in the environment, so we
95 * initialize it from the value in the EEPROM.
96 */
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97 debug("### Setting environment from EEPROM MAC address = "
98 "\"%pM\"\n",
99 env_enetaddr);
826e9913 100 ret = !eth_setenv_enetaddr("ethaddr", rom_enetaddr);
264bbdd1 101 }
826e9913 102 if (!ret)
c8876f1c 103 printf("Failed to set mac address from EEPROM: %d\n", ret);
264bbdd1 104}
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105#endif /* CONFIG_DRIVER_TI_EMAC */
106
107#if defined(CONFIG_SOC_DA8XX)
108#ifndef CONFIG_USE_IRQ
109void irq_init(void)
110{
111 /*
112 * Mask all IRQs by clearing the global enable and setting
113 * the enable clear for all the 90 interrupts.
114 */
6d1c649f
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115 writel(0, &davinci_aintc_regs->ger);
116
117 writel(0, &davinci_aintc_regs->hier);
118
119 writel(0xffffffff, &davinci_aintc_regs->ecr1);
120 writel(0xffffffff, &davinci_aintc_regs->ecr2);
121 writel(0xffffffff, &davinci_aintc_regs->ecr3);
122}
123#endif
124
125/*
126 * Enable PSC for various peripherals.
127 */
128int da8xx_configure_lpsc_items(const struct lpsc_resource *item,
129 const int n_items)
130{
131 int i;
132
133 for (i = 0; i < n_items; i++)
134 lpsc_on(item[i].lpsc_no);
135
136 return 0;
137}
138#endif