[thirdparty/linux.git] / arch / arm / mach-ep93xx / include / mach / uncompress.h

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * arch/arm/mach-ep93xx/include/mach/uncompress.h
 *
 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
 */

#include <mach/ep93xx-regs.h>
#include <asm/mach-types.h>

static unsigned char __raw_readb(unsigned int ptr)
{
	return *((volatile unsigned char *)ptr);
}

static unsigned int __raw_readl(unsigned int ptr)
{
	return *((volatile unsigned int *)ptr);
}

static void __raw_writeb(unsigned char value, unsigned int ptr)
{
	*((volatile unsigned char *)ptr) = value;
}

static void __raw_writel(unsigned int value, unsigned int ptr)
{
	*((volatile unsigned int *)ptr) = value;
}

#define PHYS_UART_DATA		(CONFIG_DEBUG_UART_PHYS + 0x00)
#define PHYS_UART_FLAG		(CONFIG_DEBUG_UART_PHYS + 0x18)
#define UART_FLAG_TXFF		0x20

static inline void putc(int c)
{
	int i;

	for (i = 0; i < 10000; i++) {
		/* Transmit fifo not full? */
		if (!(__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF))
			break;
	}

	__raw_writeb(c, PHYS_UART_DATA);
}

static inline void flush(void)
{
}


/*
 * Some bootloaders don't turn off DMA from the ethernet MAC before
 * jumping to linux, which means that we might end up with bits of RX
 * status and packet data scribbled over the uncompressed kernel image.
 * Work around this by resetting the ethernet MAC before we uncompress.
 */
#define PHYS_ETH_SELF_CTL		0x80010020
#define ETH_SELF_CTL_RESET		0x00000001

static void ethernet_reset(void)
{
	unsigned int v;

	/* Reset the ethernet MAC.  */
	v = __raw_readl(PHYS_ETH_SELF_CTL);
	__raw_writel(v | ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL);

	/* Wait for reset to finish.  */
	while (__raw_readl(PHYS_ETH_SELF_CTL) & ETH_SELF_CTL_RESET)
		;
}

#define TS72XX_WDT_CONTROL_PHYS_BASE	0x23800000
#define TS72XX_WDT_FEED_PHYS_BASE	0x23c00000
#define TS72XX_WDT_FEED_VAL		0x05

static void __maybe_unused ts72xx_watchdog_disable(void)
{
	__raw_writeb(TS72XX_WDT_FEED_VAL, TS72XX_WDT_FEED_PHYS_BASE);
	__raw_writeb(0, TS72XX_WDT_CONTROL_PHYS_BASE);
}

static void arch_decomp_setup(void)
{
	if (machine_is_ts72xx())
		ts72xx_watchdog_disable();
	ethernet_reset();
}
Commit	Line	Data
2874c5fd	1	/* SPDX-License-Identifier: GPL-2.0-or-later */
e7736d47	2	/*
a09e64fb	3	* arch/arm/mach-ep93xx/include/mach/uncompress.h
e7736d47 LB	4	*
e7736d47 LB	5	* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
e7736d47 LB	6	*/
e7736d47 LB	7
a09e64fb	8	#include <mach/ep93xx-regs.h>
7781e61b	9	#include <asm/mach-types.h>
e7736d47 LB	10
	11	static unsigned char __raw_readb(unsigned int ptr)
	12	{
	13	return ((volatile unsigned char )ptr);
	14	}
	15
c9b4470e LB	16	static unsigned int __raw_readl(unsigned int ptr)
	17	{
	18	return ((volatile unsigned int )ptr);
	19	}
	20
e7736d47 LB	21	static void __raw_writeb(unsigned char value, unsigned int ptr)
	22	{
	23	((volatile unsigned char )ptr) = value;
	24	}
	25
c9b4470e LB	26	static void __raw_writel(unsigned int value, unsigned int ptr)
	27	{
	28	((volatile unsigned int )ptr) = value;
	29	}
	30
d2c215aa HS	31	#define PHYS_UART_DATA (CONFIG_DEBUG_UART_PHYS + 0x00)
d2c215aa HS	32	#define PHYS_UART_FLAG (CONFIG_DEBUG_UART_PHYS + 0x18)
92e88aa7	33	#define UART_FLAG_TXFF 0x20
e7736d47	34
a081568d	35	static inline void putc(int c)
e7736d47	36	{
605c357b HS	37	int i;
	38
	39	for (i = 0; i < 10000; i++) {
	40	/* Transmit fifo not full? */
	41	if (!(__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF))
	42	break;
	43	}
e7736d47	44
92e88aa7	45	__raw_writeb(c, PHYS_UART_DATA);
e7736d47 LB	46	}
e7736d47 LB	47
a081568d	48	static inline void flush(void)
e7736d47	49	{
e7736d47 LB	50	}
e7736d47 LB	51
c9b4470e LB	52
	53	/*
	54	* Some bootloaders don't turn off DMA from the ethernet MAC before
	55	* jumping to linux, which means that we might end up with bits of RX
	56	* status and packet data scribbled over the uncompressed kernel image.
	57	* Work around this by resetting the ethernet MAC before we uncompress.
	58	*/
	59	#define PHYS_ETH_SELF_CTL 0x80010020
	60	#define ETH_SELF_CTL_RESET 0x00000001
	61
	62	static void ethernet_reset(void)
	63	{
	64	unsigned int v;
	65
	66	/* Reset the ethernet MAC. */
	67	v = __raw_readl(PHYS_ETH_SELF_CTL);
	68	__raw_writel(v \| ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL);
	69
	70	/* Wait for reset to finish. */
	71	while (__raw_readl(PHYS_ETH_SELF_CTL) & ETH_SELF_CTL_RESET)
	72	;
	73	}
	74
7781e61b FF	75	#define TS72XX_WDT_CONTROL_PHYS_BASE 0x23800000
	76	#define TS72XX_WDT_FEED_PHYS_BASE 0x23c00000
	77	#define TS72XX_WDT_FEED_VAL 0x05
	78
	79	static void __maybe_unused ts72xx_watchdog_disable(void)
	80	{
	81	__raw_writeb(TS72XX_WDT_FEED_VAL, TS72XX_WDT_FEED_PHYS_BASE);
	82	__raw_writeb(0, TS72XX_WDT_CONTROL_PHYS_BASE);
	83	}
c9b4470e LB	84
	85	static void arch_decomp_setup(void)
	86	{
7781e61b FF	87	if (machine_is_ts72xx())
7781e61b FF	88	ts72xx_watchdog_disable();
c9b4470e LB	89	ethernet_reset();
c9b4470e LB	90	}