[thirdparty/kernel/stable.git] / arch / arm / mach-imx / mach-mx21ads.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 *  Copyright (C) 2000 Deep Blue Solutions Ltd
 *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
 *  Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
 */

#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/physmap.h>
#include <linux/gpio/driver.h>
#include <linux/gpio/machine.h>
#include <linux/gpio.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>

#include "common.h"
#include "devices-imx21.h"
#include "hardware.h"
#include "iomux-mx21.h"

#define MX21ADS_CS8900A_REG		(MX21_CS1_BASE_ADDR + 0x000000)
#define MX21ADS_ST16C255_IOBASE_REG	(MX21_CS1_BASE_ADDR + 0x200000)
#define MX21ADS_VERSION_REG		(MX21_CS1_BASE_ADDR + 0x400000)
#define MX21ADS_IO_REG			(MX21_CS1_BASE_ADDR + 0x800000)

#define MX21ADS_MMC_CD			IMX_GPIO_NR(4, 25)
#define MX21ADS_CS8900A_IRQ_GPIO	IMX_GPIO_NR(5, 11)
#define MX21ADS_MMGPIO_BASE		(6 * 32)

/* MX21ADS_IO_REG bit definitions */
#define MX21ADS_IO_SD_WP		(MX21ADS_MMGPIO_BASE + 0)
#define MX21ADS_IO_TP6			(MX21ADS_IO_SD_WP)
#define MX21ADS_IO_SW_SEL		(MX21ADS_MMGPIO_BASE + 1)
#define MX21ADS_IO_TP7			(MX21ADS_IO_SW_SEL)
#define MX21ADS_IO_RESET_E_UART		(MX21ADS_MMGPIO_BASE + 2)
#define MX21ADS_IO_RESET_BASE		(MX21ADS_MMGPIO_BASE + 3)
#define MX21ADS_IO_CSI_CTL2		(MX21ADS_MMGPIO_BASE + 4)
#define MX21ADS_IO_CSI_CTL1		(MX21ADS_MMGPIO_BASE + 5)
#define MX21ADS_IO_CSI_CTL0		(MX21ADS_MMGPIO_BASE + 6)
#define MX21ADS_IO_UART1_EN		(MX21ADS_MMGPIO_BASE + 7)
#define MX21ADS_IO_UART4_EN		(MX21ADS_MMGPIO_BASE + 8)
#define MX21ADS_IO_LCDON		(MX21ADS_MMGPIO_BASE + 9)
#define MX21ADS_IO_IRDA_EN		(MX21ADS_MMGPIO_BASE + 10)
#define MX21ADS_IO_IRDA_FIR_SEL		(MX21ADS_MMGPIO_BASE + 11)
#define MX21ADS_IO_IRDA_MD0_B		(MX21ADS_MMGPIO_BASE + 12)
#define MX21ADS_IO_IRDA_MD1		(MX21ADS_MMGPIO_BASE + 13)
#define MX21ADS_IO_LED4_ON		(MX21ADS_MMGPIO_BASE + 14)
#define MX21ADS_IO_LED3_ON		(MX21ADS_MMGPIO_BASE + 15)

static const int mx21ads_pins[] __initconst = {

	/* CS8900A */
	(GPIO_PORTE | GPIO_GPIO | GPIO_IN | 11),

	/* UART1 */
	PE12_PF_UART1_TXD,
	PE13_PF_UART1_RXD,
	PE14_PF_UART1_CTS,
	PE15_PF_UART1_RTS,

	/* UART3 (IrDA) - only TXD and RXD */
	PE8_PF_UART3_TXD,
	PE9_PF_UART3_RXD,

	/* UART4 */
	PB26_AF_UART4_RTS,
	PB28_AF_UART4_TXD,
	PB29_AF_UART4_CTS,
	PB31_AF_UART4_RXD,

	/* LCDC */
	PA5_PF_LSCLK,
	PA6_PF_LD0,
	PA7_PF_LD1,
	PA8_PF_LD2,
	PA9_PF_LD3,
	PA10_PF_LD4,
	PA11_PF_LD5,
	PA12_PF_LD6,
	PA13_PF_LD7,
	PA14_PF_LD8,
	PA15_PF_LD9,
	PA16_PF_LD10,
	PA17_PF_LD11,
	PA18_PF_LD12,
	PA19_PF_LD13,
	PA20_PF_LD14,
	PA21_PF_LD15,
	PA22_PF_LD16,
	PA24_PF_REV,     /* Sharp panel dedicated signal */
	PA25_PF_CLS,     /* Sharp panel dedicated signal */
	PA26_PF_PS,      /* Sharp panel dedicated signal */
	PA27_PF_SPL_SPR, /* Sharp panel dedicated signal */
	PA28_PF_HSYNC,
	PA29_PF_VSYNC,
	PA30_PF_CONTRAST,
	PA31_PF_OE_ACD,

	/* MMC/SDHC */
	PE18_PF_SD1_D0,
	PE19_PF_SD1_D1,
	PE20_PF_SD1_D2,
	PE21_PF_SD1_D3,
	PE22_PF_SD1_CMD,
	PE23_PF_SD1_CLK,

	/* NFC */
	PF0_PF_NRFB,
	PF1_PF_NFCE,
	PF2_PF_NFWP,
	PF3_PF_NFCLE,
	PF4_PF_NFALE,
	PF5_PF_NFRE,
	PF6_PF_NFWE,
	PF7_PF_NFIO0,
	PF8_PF_NFIO1,
	PF9_PF_NFIO2,
	PF10_PF_NFIO3,
	PF11_PF_NFIO4,
	PF12_PF_NFIO5,
	PF13_PF_NFIO6,
	PF14_PF_NFIO7,
};

/* ADS's NOR flash: 2x AM29BDS128HE9VKI on 32-bit bus */
static struct physmap_flash_data mx21ads_flash_data = {
	.width = 4,
};

static struct resource mx21ads_flash_resource =
	DEFINE_RES_MEM(MX21_CS0_BASE_ADDR, SZ_32M);

static struct platform_device mx21ads_nor_mtd_device = {
	.name = "physmap-flash",
	.id = 0,
	.dev = {
		.platform_data = &mx21ads_flash_data,
	},
	.num_resources = 1,
	.resource = &mx21ads_flash_resource,
};

static struct resource mx21ads_cs8900_resources[] __initdata = {
	DEFINE_RES_MEM(MX21ADS_CS8900A_REG, SZ_1K),
	/* irq number is run-time assigned */
	DEFINE_RES_IRQ(-1),
};

static const struct platform_device_info mx21ads_cs8900_devinfo __initconst = {
	.name = "cs89x0",
	.id = 0,
	.res = mx21ads_cs8900_resources,
	.num_res = ARRAY_SIZE(mx21ads_cs8900_resources),
};

static const struct imxuart_platform_data uart_pdata_rts __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

static const struct imxuart_platform_data uart_pdata_norts __initconst = {
};

static struct resource mx21ads_mmgpio_resource =
	DEFINE_RES_MEM_NAMED(MX21ADS_IO_REG, SZ_2, "dat");

static struct bgpio_pdata mx21ads_mmgpio_pdata = {
	.label	= "mx21ads-mmgpio",
	.base	= MX21ADS_MMGPIO_BASE,
	.ngpio	= 16,
};

static struct platform_device mx21ads_mmgpio = {
	.name = "basic-mmio-gpio",
	.id = PLATFORM_DEVID_AUTO,
	.resource = &mx21ads_mmgpio_resource,
	.num_resources = 1,
	.dev = {
		.platform_data = &mx21ads_mmgpio_pdata,
	},
};

static struct regulator_consumer_supply mx21ads_lcd_regulator_consumer =
	REGULATOR_SUPPLY("lcd", "imx-fb.0");

static struct regulator_init_data mx21ads_lcd_regulator_init_data = {
	.constraints = {
		.valid_ops_mask	= REGULATOR_CHANGE_STATUS,
	},
	.consumer_supplies	= &mx21ads_lcd_regulator_consumer,
	.num_consumer_supplies	= 1,
};

static struct fixed_voltage_config mx21ads_lcd_regulator_pdata = {
	.supply_name	= "LCD",
	.microvolts	= 3300000,
	.init_data	= &mx21ads_lcd_regulator_init_data,
};

static struct platform_device mx21ads_lcd_regulator = {
	.name = "reg-fixed-voltage",
	.id = PLATFORM_DEVID_AUTO,
	.dev = {
		.platform_data = &mx21ads_lcd_regulator_pdata,
	},
};

static struct gpiod_lookup_table mx21ads_lcd_regulator_gpiod_table = {
	.dev_id = "reg-fixed-voltage.0", /* Let's hope ID 0 is what we get */
	.table = {
		GPIO_LOOKUP("mx21ads-mmgpio", 9, NULL, GPIO_ACTIVE_HIGH),
		{ },
	},
};

/*
 * Connected is a portrait Sharp-QVGA display
 * of type: LQ035Q7DB02
 */
static struct imx_fb_videomode mx21ads_modes[] = {
	{
		.mode = {
			.name		= "Sharp-LQ035Q7",
			.refresh	= 60,
			.xres		= 240,
			.yres		= 320,
			.pixclock	= 188679, /* in ps (5.3MHz) */
			.hsync_len	= 2,
			.left_margin	= 6,
			.right_margin	= 16,
			.vsync_len	= 1,
			.upper_margin	= 8,
			.lower_margin	= 10,
		},
		.pcr		= 0xfb108bc7,
		.bpp		= 16,
	},
};

static const struct imx_fb_platform_data mx21ads_fb_data __initconst = {
	.mode = mx21ads_modes,
	.num_modes = ARRAY_SIZE(mx21ads_modes),

	.pwmr		= 0x00a903ff,
	.lscr1		= 0x00120300,
	.dmacr		= 0x00020008,
};

static int mx21ads_sdhc_get_ro(struct device *dev)
{
	return gpio_get_value(MX21ADS_IO_SD_WP);
}

static int mx21ads_sdhc_init(struct device *dev, irq_handler_t detect_irq,
	void *data)
{
	int ret;

	ret = gpio_request(MX21ADS_IO_SD_WP, "mmc-ro");
	if (ret)
		return ret;

	return request_irq(gpio_to_irq(MX21ADS_MMC_CD), detect_irq,
			   IRQF_TRIGGER_FALLING, "mmc-detect", data);
}

static void mx21ads_sdhc_exit(struct device *dev, void *data)
{
	free_irq(gpio_to_irq(MX21ADS_MMC_CD), data);
	gpio_free(MX21ADS_IO_SD_WP);
}

static const struct imxmmc_platform_data mx21ads_sdhc_pdata __initconst = {
	.ocr_avail = MMC_VDD_29_30 | MMC_VDD_30_31, /* 3.0V */
	.get_ro = mx21ads_sdhc_get_ro,
	.init = mx21ads_sdhc_init,
	.exit = mx21ads_sdhc_exit,
};

static const struct mxc_nand_platform_data
mx21ads_nand_board_info __initconst = {
	.width = 1,
	.hw_ecc = 1,
};

static struct platform_device *platform_devices[] __initdata = {
	&mx21ads_mmgpio,
	&mx21ads_lcd_regulator,
	&mx21ads_nor_mtd_device,
};

static void __init mx21ads_board_init(void)
{
	imx21_soc_init();

	mxc_gpio_setup_multiple_pins(mx21ads_pins, ARRAY_SIZE(mx21ads_pins),
			"mx21ads");

	imx21_add_imx_uart0(&uart_pdata_rts);
	imx21_add_imx_uart2(&uart_pdata_norts);
	imx21_add_imx_uart3(&uart_pdata_rts);
	imx21_add_mxc_nand(&mx21ads_nand_board_info);

	imx21_add_imx_fb(&mx21ads_fb_data);
}

static void __init mx21ads_late_init(void)
{
	imx21_add_mxc_mmc(0, &mx21ads_sdhc_pdata);

	gpiod_add_lookup_table(&mx21ads_lcd_regulator_gpiod_table);
	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));

	mx21ads_cs8900_resources[1].start =
			gpio_to_irq(MX21ADS_CS8900A_IRQ_GPIO);
	mx21ads_cs8900_resources[1].end =
			gpio_to_irq(MX21ADS_CS8900A_IRQ_GPIO);
	platform_device_register_full(&mx21ads_cs8900_devinfo);
}

static void __init mx21ads_timer_init(void)
{
	mx21_clocks_init(32768, 26000000);
}

MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
	/* maintainer: Freescale Semiconductor, Inc. */
	.atag_offset = 0x100,
	.map_io		= mx21_map_io,
	.init_early = imx21_init_early,
	.init_irq = mx21_init_irq,
	.init_time	= mx21ads_timer_init,
	.init_machine	= mx21ads_board_init,
	.init_late	= mx21ads_late_init,
	.restart	= mxc_restart,
MACHINE_END
Commit	Line	Data
c942fddf	1	// SPDX-License-Identifier: GPL-2.0-or-later
6b91edde IC	2	/*
	3	* Copyright (C) 2000 Deep Blue Solutions Ltd
	4	* Copyright (C) 2002 Shane Nay (shane@minirl.com)
	5	* Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
6b91edde IC	6	*/
	7
	8	#include <linux/platform_device.h>
	9	#include <linux/mtd/mtd.h>
	10	#include <linux/mtd/physmap.h>
0f4630f3	11	#include <linux/gpio/driver.h>
efdfeb07	12	#include <linux/gpio/machine.h>
6b91edde	13	#include <linux/gpio.h>
6b961bad AS	14	#include <linux/regulator/fixed.h>
6b961bad AS	15	#include <linux/regulator/machine.h>
6b91edde IC	16	#include <asm/mach-types.h>
6b91edde IC	17	#include <asm/mach/arch.h>
6b91edde	18
e3372474	19	#include "common.h"
1f8d721c	20	#include "devices-imx21.h"
50f2de61	21	#include "hardware.h"
267dd34c	22	#include "iomux-mx21.h"
6b91edde	23
477fbf1d AS	24	#define MX21ADS_CS8900A_REG (MX21_CS1_BASE_ADDR + 0x000000)
	25	#define MX21ADS_ST16C255_IOBASE_REG (MX21_CS1_BASE_ADDR + 0x200000)
	26	#define MX21ADS_VERSION_REG (MX21_CS1_BASE_ADDR + 0x400000)
	27	#define MX21ADS_IO_REG (MX21_CS1_BASE_ADDR + 0x800000)
d393d43f	28
477fbf1d AS	29	#define MX21ADS_MMC_CD IMX_GPIO_NR(4, 25)
	30	#define MX21ADS_CS8900A_IRQ_GPIO IMX_GPIO_NR(5, 11)
	31	#define MX21ADS_MMGPIO_BASE (6 * 32)
d393d43f UKK	32
d393d43f UKK	33	/* MX21ADS_IO_REG bit definitions */
477fbf1d AS	34	#define MX21ADS_IO_SD_WP (MX21ADS_MMGPIO_BASE + 0)
	35	#define MX21ADS_IO_TP6 (MX21ADS_IO_SD_WP)
	36	#define MX21ADS_IO_SW_SEL (MX21ADS_MMGPIO_BASE + 1)
	37	#define MX21ADS_IO_TP7 (MX21ADS_IO_SW_SEL)
	38	#define MX21ADS_IO_RESET_E_UART (MX21ADS_MMGPIO_BASE + 2)
	39	#define MX21ADS_IO_RESET_BASE (MX21ADS_MMGPIO_BASE + 3)
	40	#define MX21ADS_IO_CSI_CTL2 (MX21ADS_MMGPIO_BASE + 4)
	41	#define MX21ADS_IO_CSI_CTL1 (MX21ADS_MMGPIO_BASE + 5)
	42	#define MX21ADS_IO_CSI_CTL0 (MX21ADS_MMGPIO_BASE + 6)
	43	#define MX21ADS_IO_UART1_EN (MX21ADS_MMGPIO_BASE + 7)
	44	#define MX21ADS_IO_UART4_EN (MX21ADS_MMGPIO_BASE + 8)
	45	#define MX21ADS_IO_LCDON (MX21ADS_MMGPIO_BASE + 9)
	46	#define MX21ADS_IO_IRDA_EN (MX21ADS_MMGPIO_BASE + 10)
	47	#define MX21ADS_IO_IRDA_FIR_SEL (MX21ADS_MMGPIO_BASE + 11)
	48	#define MX21ADS_IO_IRDA_MD0_B (MX21ADS_MMGPIO_BASE + 12)
	49	#define MX21ADS_IO_IRDA_MD1 (MX21ADS_MMGPIO_BASE + 13)
	50	#define MX21ADS_IO_LED4_ON (MX21ADS_MMGPIO_BASE + 14)
	51	#define MX21ADS_IO_LED3_ON (MX21ADS_MMGPIO_BASE + 15)
d393d43f	52
6c80ee51	53	static const int mx21ads_pins[] __initconst = {
6b91edde IC	54
	55	/* CS8900A */
	56	(GPIO_PORTE \| GPIO_GPIO \| GPIO_IN \| 11),
	57
	58	/* UART1 */
	59	PE12_PF_UART1_TXD,
	60	PE13_PF_UART1_RXD,
	61	PE14_PF_UART1_CTS,
	62	PE15_PF_UART1_RTS,
	63
	64	/* UART3 (IrDA) - only TXD and RXD */
	65	PE8_PF_UART3_TXD,
	66	PE9_PF_UART3_RXD,
	67
	68	/* UART4 */
	69	PB26_AF_UART4_RTS,
	70	PB28_AF_UART4_TXD,
	71	PB29_AF_UART4_CTS,
	72	PB31_AF_UART4_RXD,
	73
	74	/* LCDC */
	75	PA5_PF_LSCLK,
	76	PA6_PF_LD0,
	77	PA7_PF_LD1,
	78	PA8_PF_LD2,
	79	PA9_PF_LD3,
	80	PA10_PF_LD4,
	81	PA11_PF_LD5,
	82	PA12_PF_LD6,
	83	PA13_PF_LD7,
	84	PA14_PF_LD8,
	85	PA15_PF_LD9,
	86	PA16_PF_LD10,
	87	PA17_PF_LD11,
	88	PA18_PF_LD12,
	89	PA19_PF_LD13,
	90	PA20_PF_LD14,
	91	PA21_PF_LD15,
	92	PA22_PF_LD16,
	93	PA24_PF_REV, /* Sharp panel dedicated signal */
	94	PA25_PF_CLS, /* Sharp panel dedicated signal */
	95	PA26_PF_PS, /* Sharp panel dedicated signal */
	96	PA27_PF_SPL_SPR, /* Sharp panel dedicated signal */
	97	PA28_PF_HSYNC,
	98	PA29_PF_VSYNC,
	99	PA30_PF_CONTRAST,
	100	PA31_PF_OE_ACD,
	101
	102	/* MMC/SDHC */
	103	PE18_PF_SD1_D0,
	104	PE19_PF_SD1_D1,
	105	PE20_PF_SD1_D2,
	106	PE21_PF_SD1_D3,
	107	PE22_PF_SD1_CMD,
	108	PE23_PF_SD1_CLK,
	109
	110	/* NFC */
	111	PF0_PF_NRFB,
	112	PF1_PF_NFCE,
	113	PF2_PF_NFWP,
	114	PF3_PF_NFCLE,
	115	PF4_PF_NFALE,
	116	PF5_PF_NFRE,
	117	PF6_PF_NFWE,
118	PF7_PF_NFIO0,
119	PF8_PF_NFIO1,
120	PF9_PF_NFIO2,
121	PF10_PF_NFIO3,
122	PF11_PF_NFIO4,
123	PF12_PF_NFIO5,
124	PF13_PF_NFIO6,
125	PF14_PF_NFIO7,
126	};
127
128	/* ADS's NOR flash: 2x AM29BDS128HE9VKI on 32-bit bus */
129	static struct physmap_flash_data mx21ads_flash_data = {
130	.width = 4,
131	};
132
ddeef94e AS	133	static struct resource mx21ads_flash_resource =
ddeef94e AS	134	DEFINE_RES_MEM(MX21_CS0_BASE_ADDR, SZ_32M);
6b91edde IC	135
	136	static struct platform_device mx21ads_nor_mtd_device = {
	137	.name = "physmap-flash",
	138	.id = 0,
	139	.dev = {
	140	.platform_data = &mx21ads_flash_data,
	141	},
	142	.num_resources = 1,
	143	.resource = &mx21ads_flash_resource,
	144	};
	145
438196c3	146	static struct resource mx21ads_cs8900_resources[] __initdata = {
ddeef94e	147	DEFINE_RES_MEM(MX21ADS_CS8900A_REG, SZ_1K),
438196c3 SG	148	/* irq number is run-time assigned */
438196c3 SG	149	DEFINE_RES_IRQ(-1),
c8c9e837 JB	150	};
	151
	152	static const struct platform_device_info mx21ads_cs8900_devinfo __initconst = {
	153	.name = "cs89x0",
	154	.id = 0,
	155	.res = mx21ads_cs8900_resources,
	156	.num_res = ARRAY_SIZE(mx21ads_cs8900_resources),
	157	};
	158
3c5227fd	159	static const struct imxuart_platform_data uart_pdata_rts __initconst = {
6b91edde IC	160	.flags = IMXUART_HAVE_RTSCTS,
	161	};
	162
3c5227fd	163	static const struct imxuart_platform_data uart_pdata_norts __initconst = {
6b91edde IC	164	};
6b91edde IC	165
477fbf1d AS	166	static struct resource mx21ads_mmgpio_resource =
	167	DEFINE_RES_MEM_NAMED(MX21ADS_IO_REG, SZ_2, "dat");
	168
	169	static struct bgpio_pdata mx21ads_mmgpio_pdata = {
efdfeb07	170	.label = "mx21ads-mmgpio",
477fbf1d AS	171	.base = MX21ADS_MMGPIO_BASE,
	172	.ngpio = 16,
	173	};
	174
	175	static struct platform_device mx21ads_mmgpio = {
	176	.name = "basic-mmio-gpio",
	177	.id = PLATFORM_DEVID_AUTO,
	178	.resource = &mx21ads_mmgpio_resource,
	179	.num_resources = 1,
	180	.dev = {
	181	.platform_data = &mx21ads_mmgpio_pdata,
	182	},
	183	};
	184
6b961bad AS	185	static struct regulator_consumer_supply mx21ads_lcd_regulator_consumer =
6b961bad AS	186	REGULATOR_SUPPLY("lcd", "imx-fb.0");
6b91edde	187
6b961bad AS	188	static struct regulator_init_data mx21ads_lcd_regulator_init_data = {
	189	.constraints = {
	190	.valid_ops_mask = REGULATOR_CHANGE_STATUS,
	191	},
	192	.consumer_supplies = &mx21ads_lcd_regulator_consumer,
	193	.num_consumer_supplies = 1,
	194	};
477fbf1d	195
6b961bad AS	196	static struct fixed_voltage_config mx21ads_lcd_regulator_pdata = {
	197	.supply_name = "LCD",
	198	.microvolts = 3300000,
6b961bad AS	199	.init_data = &mx21ads_lcd_regulator_init_data,
6b961bad AS	200	};
6b91edde	201
6b961bad AS	202	static struct platform_device mx21ads_lcd_regulator = {
	203	.name = "reg-fixed-voltage",
	204	.id = PLATFORM_DEVID_AUTO,
	205	.dev = {
	206	.platform_data = &mx21ads_lcd_regulator_pdata,
	207	},
	208	};
6b91edde	209
efdfeb07 LW	210	static struct gpiod_lookup_table mx21ads_lcd_regulator_gpiod_table = {
	211	.dev_id = "reg-fixed-voltage.0", /* Let's hope ID 0 is what we get */
	212	.table = {
	213	GPIO_LOOKUP("mx21ads-mmgpio", 9, NULL, GPIO_ACTIVE_HIGH),
	214	{ },
	215	},
	216	};
	217
6b91edde IC	218	/*
	219	* Connected is a portrait Sharp-QVGA display
	220	* of type: LQ035Q7DB02
	221	*/
c35d3a41 SH	222	static struct imx_fb_videomode mx21ads_modes[] = {
	223	{
	224	.mode = {
	225	.name = "Sharp-LQ035Q7",
	226	.refresh = 60,
	227	.xres = 240,
	228	.yres = 320,
	229	.pixclock = 188679, /* in ps (5.3MHz) */
	230	.hsync_len = 2,
	231	.left_margin = 6,
	232	.right_margin = 16,
	233	.vsync_len = 1,
	234	.upper_margin = 8,
	235	.lower_margin = 10,
	236	},
	237	.pcr = 0xfb108bc7,
	238	.bpp = 16,
	239	},
	240	};
	241
ad851bff	242	static const struct imx_fb_platform_data mx21ads_fb_data __initconst = {
c35d3a41 SH	243	.mode = mx21ads_modes,
	244	.num_modes = ARRAY_SIZE(mx21ads_modes),
	245
	246	.pwmr = 0x00a903ff,
	247	.lscr1 = 0x00120300,
	248	.dmacr = 0x00020008,
6b91edde IC	249	};
	250
	251	static int mx21ads_sdhc_get_ro(struct device *dev)
	252	{
477fbf1d	253	return gpio_get_value(MX21ADS_IO_SD_WP);
6b91edde IC	254	}
	255
	256	static int mx21ads_sdhc_init(struct device *dev, irq_handler_t detect_irq,
	257	void *data)
	258	{
477fbf1d AS	259	int ret;
	260
	261	ret = gpio_request(MX21ADS_IO_SD_WP, "mmc-ro");
	262	if (ret)
	263	return ret;
	264
	265	return request_irq(gpio_to_irq(MX21ADS_MMC_CD), detect_irq,
	266	IRQF_TRIGGER_FALLING, "mmc-detect", data);
6b91edde IC	267	}
	268
	269	static void mx21ads_sdhc_exit(struct device dev, void data)
	270	{
477fbf1d AS	271	free_irq(gpio_to_irq(MX21ADS_MMC_CD), data);
477fbf1d AS	272	gpio_free(MX21ADS_IO_SD_WP);
6b91edde IC	273	}
6b91edde IC	274
9d3d945a	275	static const struct imxmmc_platform_data mx21ads_sdhc_pdata __initconst = {
6b91edde IC	276	.ocr_avail = MMC_VDD_29_30 \| MMC_VDD_30_31, /* 3.0V */
	277	.get_ro = mx21ads_sdhc_get_ro,
	278	.init = mx21ads_sdhc_init,
	279	.exit = mx21ads_sdhc_exit,
	280	};
	281
1f8d721c UKK	282	static const struct mxc_nand_platform_data
1f8d721c UKK	283	mx21ads_nand_board_info __initconst = {
6b91edde IC	284	.width = 1,
	285	.hw_ecc = 1,
	286	};
	287
6b91edde	288	static struct platform_device *platform_devices[] __initdata = {
477fbf1d	289	&mx21ads_mmgpio,
6b961bad	290	&mx21ads_lcd_regulator,
6b91edde IC	291	&mx21ads_nor_mtd_device,
	292	};
	293
	294	static void __init mx21ads_board_init(void)
	295	{
b78d8e59 SG	296	imx21_soc_init();
b78d8e59 SG	297
6b91edde IC	298	mxc_gpio_setup_multiple_pins(mx21ads_pins, ARRAY_SIZE(mx21ads_pins),
	299	"mx21ads");
	300
3c5227fd UKK	301	imx21_add_imx_uart0(&uart_pdata_rts);
	302	imx21_add_imx_uart2(&uart_pdata_norts);
	303	imx21_add_imx_uart3(&uart_pdata_rts);
1f8d721c	304	imx21_add_mxc_nand(&mx21ads_nand_board_info);
6b91edde	305
6b961bad	306	imx21_add_imx_fb(&mx21ads_fb_data);
bfe16c89 VZ	307	}
	308
	309	static void __init mx21ads_late_init(void)
	310	{
	311	imx21_add_mxc_mmc(0, &mx21ads_sdhc_pdata);
	312
efdfeb07	313	gpiod_add_lookup_table(&mx21ads_lcd_regulator_gpiod_table);
bfe16c89	314	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
6b961bad	315
438196c3 SG	316	mx21ads_cs8900_resources[1].start =
	317	gpio_to_irq(MX21ADS_CS8900A_IRQ_GPIO);
	318	mx21ads_cs8900_resources[1].end =
	319	gpio_to_irq(MX21ADS_CS8900A_IRQ_GPIO);
d5be0d73	320	platform_device_register_full(&mx21ads_cs8900_devinfo);
6b91edde IC	321	}
	322
	323	static void __init mx21ads_timer_init(void)
	324	{
	325	mx21_clocks_init(32768, 26000000);
	326	}
	327
6b91edde IC	328	MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
6b91edde IC	329	/* maintainer: Freescale Semiconductor, Inc. */
dc8f1907	330	.atag_offset = 0x100,
477fbf1d	331	.map_io = mx21_map_io,
3dac2196 UKK	332	.init_early = imx21_init_early,
3dac2196 UKK	333	.init_irq = mx21_init_irq,
6bb27d73	334	.init_time = mx21ads_timer_init,
bfe16c89 VZ	335	.init_machine = mx21ads_board_init,
bfe16c89 VZ	336	.init_late = mx21ads_late_init,
65ea7884	337	.restart = mxc_restart,
6b91edde	338	MACHINE_END