projects / thirdparty / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 28bd3a0d MLJ |
1 | /* |
| 2 | * DSM-G600 board-level PCI initialization | |
| 3 | * | |
| 4 | * Copyright (C) 2006 Tower Technologies | |
| 5 | * Author: Alessandro Zummo <a.zummo@towertech.it> | |
| 6 | * | |
| 7 | * based on ixdp425-pci.c: | |
| 8 | * Copyright (C) 2002 Intel Corporation. | |
| 9 | * Copyright (C) 2003-2004 MontaVista Software, Inc. | |
| 10 | * | |
| 11 | * Maintainer: http://www.nslu2-linux.org/ | |
| 12 | * | |
| 13 | * This program is free software; you can redistribute it and/or modify | |
| 14 | * it under the terms of the GNU General Public License version 2 as | |
| 15 | * published by the Free Software Foundation. | |
| 16 | * | |
| 17 | */ | |
| 18 | ||
| 19 | #include <linux/pci.h> | |
| 20 | #include <linux/init.h> | |
| 21 | #include <linux/irq.h> | |
| 28bd3a0d MLJ |
22 | #include <asm/mach/pci.h> |
| 23 | #include <asm/mach-types.h> | |
| 24 | ||
| 8d3fdf31 KH |
25 | #define MAX_DEV 4 |
| 26 | #define IRQ_LINES 3 | |
| 395e7127 KH |
27 | |
| 28 | /* PCI controller GPIO to IRQ pin mappings */ | |
| 8d3fdf31 KH |
29 | #define INTA 11 |
| 30 | #define INTB 10 | |
| 31 | #define INTC 9 | |
| 32 | #define INTD 8 | |
| 33 | #define INTE 7 | |
| 34 | #define INTF 6 | |
| 395e7127 | 35 | |
| 28bd3a0d MLJ |
36 | void __init dsmg600_pci_preinit(void) |
| 37 | { | |
| 6845664a TG |
38 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); |
| 39 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); | |
| 40 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); | |
| 41 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); | |
| 42 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW); | |
| 43 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTF), IRQ_TYPE_LEVEL_LOW); | |
| 28bd3a0d MLJ |
44 | ixp4xx_pci_preinit(); |
| 45 | } | |
| 46 | ||
| d5341942 | 47 | static int __init dsmg600_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
| 28bd3a0d | 48 | { |
| 8d3fdf31 KH |
49 | static int pci_irq_table[MAX_DEV][IRQ_LINES] = { |
| 50 | { IXP4XX_GPIO_IRQ(INTE), -1, -1 }, | |
| 51 | { IXP4XX_GPIO_IRQ(INTA), -1, -1 }, | |
| 52 | { IXP4XX_GPIO_IRQ(INTB), IXP4XX_GPIO_IRQ(INTC), | |
| 53 | IXP4XX_GPIO_IRQ(INTD) }, | |
| 54 | { IXP4XX_GPIO_IRQ(INTF), -1, -1 }, | |
| 28bd3a0d MLJ |
55 | }; |
| 56 | ||
| 8d3fdf31 KH |
57 | if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES) |
| 58 | return pci_irq_table[slot - 1][pin - 1]; | |
| 28bd3a0d | 59 | |
| 8d3fdf31 | 60 | return -1; |
| 28bd3a0d MLJ |
61 | } |
| 62 | ||
| 63 | struct hw_pci __initdata dsmg600_pci = { | |
| 64 | .nr_controllers = 1, | |
| c23bfc38 | 65 | .ops = &ixp4xx_ops, |
| 28bd3a0d | 66 | .preinit = dsmg600_pci_preinit, |
| 28bd3a0d | 67 | .setup = ixp4xx_setup, |
| 28bd3a0d MLJ |
68 | .map_irq = dsmg600_map_irq, |
| 69 | }; | |
| 70 | ||
| 71 | int __init dsmg600_pci_init(void) | |
| 72 | { | |
| 73 | if (machine_is_dsmg600()) | |
| 74 | pci_common_init(&dsmg600_pci); | |
| 75 | ||
| 76 | return 0; | |
| 77 | } | |
| 78 | ||
| 79 | subsys_initcall(dsmg600_pci_init); |