[thirdparty/linux.git] / arch / arm / mach-ixp4xx / fsg-setup.c

// SPDX-License-Identifier: GPL-2.0
/*
 * arch/arm/mach-ixp4xx/fsg-setup.c
 *
 * FSG board-setup
 *
 * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
 *
 * based on ixdp425-setup.c:
 *	Copyright (C) 2003-2004 MontaVista Software, Inc.
 * based on nslu2-power.c
 *	Copyright (C) 2005 Tower Technologies
 *
 * Author: Rod Whitby <rod@whitby.id.au>
 * Maintainers: http://www.nslu2-linux.org/
 *
 */
#include <linux/gpio.h>
#include <linux/if_ether.h>
#include <linux/irq.h>
#include <linux/serial.h>
#include <linux/serial_8250.h>
#include <linux/leds.h>
#include <linux/reboot.h>
#include <linux/i2c.h>
#include <linux/gpio/machine.h>
#include <linux/io.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>

#include "irqs.h"

#define FSG_SDA_PIN		12
#define FSG_SCL_PIN		13

#define FSG_SB_GPIO		4	/* sync button */
#define FSG_RB_GPIO		9	/* reset button */
#define FSG_UB_GPIO		10	/* usb button */

static struct flash_platform_data fsg_flash_data = {
	.map_name		= "cfi_probe",
	.width			= 2,
};

static struct resource fsg_flash_resource = {
	.flags			= IORESOURCE_MEM,
};

static struct platform_device fsg_flash = {
	.name			= "IXP4XX-Flash",
	.id			= 0,
	.dev = {
		.platform_data	= &fsg_flash_data,
	},
	.num_resources		= 1,
	.resource		= &fsg_flash_resource,
};

static struct gpiod_lookup_table fsg_i2c_gpiod_table = {
	.dev_id		= "i2c-gpio.0",
	.table		= {
		GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", FSG_SDA_PIN,
				NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
		GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", FSG_SCL_PIN,
				NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
	},
};

static struct platform_device fsg_i2c_gpio = {
	.name			= "i2c-gpio",
	.id			= 0,
	.dev = {
		.platform_data	= NULL,
	},
};

static struct i2c_board_info __initdata fsg_i2c_board_info [] = {
	{
		I2C_BOARD_INFO("isl1208", 0x6f),
	},
};

static struct resource fsg_uart_resources[] = {
	{
		.start		= IXP4XX_UART1_BASE_PHYS,
		.end		= IXP4XX_UART1_BASE_PHYS + 0x0fff,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= IXP4XX_UART2_BASE_PHYS,
		.end		= IXP4XX_UART2_BASE_PHYS + 0x0fff,
		.flags		= IORESOURCE_MEM,
	}
};

static struct plat_serial8250_port fsg_uart_data[] = {
	{
		.mapbase	= IXP4XX_UART1_BASE_PHYS,
		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
		.irq		= IRQ_IXP4XX_UART1,
		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
		.iotype		= UPIO_MEM,
		.regshift	= 2,
		.uartclk	= IXP4XX_UART_XTAL,
	},
	{
		.mapbase	= IXP4XX_UART2_BASE_PHYS,
		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
		.irq		= IRQ_IXP4XX_UART2,
		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
		.iotype		= UPIO_MEM,
		.regshift	= 2,
		.uartclk	= IXP4XX_UART_XTAL,
	},
	{ }
};

static struct platform_device fsg_uart = {
	.name			= "serial8250",
	.id			= PLAT8250_DEV_PLATFORM,
	.dev = {
		.platform_data	= fsg_uart_data,
	},
	.num_resources		= ARRAY_SIZE(fsg_uart_resources),
	.resource		= fsg_uart_resources,
};

static struct platform_device fsg_leds = {
	.name		= "fsg-led",
	.id		= -1,
};

/* Built-in 10/100 Ethernet MAC interfaces */
static struct eth_plat_info fsg_plat_eth[] = {
	{
		.phy		= 5,
		.rxq		= 3,
		.txreadyq	= 20,
	}, {
		.phy		= 4,
		.rxq		= 4,
		.txreadyq	= 21,
	}
};

static struct platform_device fsg_eth[] = {
	{
		.name			= "ixp4xx_eth",
		.id			= IXP4XX_ETH_NPEB,
		.dev = {
			.platform_data	= fsg_plat_eth,
		},
	}, {
		.name			= "ixp4xx_eth",
		.id			= IXP4XX_ETH_NPEC,
		.dev = {
			.platform_data	= fsg_plat_eth + 1,
		},
	}
};

static struct platform_device *fsg_devices[] __initdata = {
	&fsg_i2c_gpio,
	&fsg_flash,
	&fsg_leds,
	&fsg_eth[0],
	&fsg_eth[1],
};

static irqreturn_t fsg_power_handler(int irq, void *dev_id)
{
	/* Signal init to do the ctrlaltdel action, this will bypass init if
	 * it hasn't started and do a kernel_restart.
	 */
	ctrl_alt_del();

	return IRQ_HANDLED;
}

static irqreturn_t fsg_reset_handler(int irq, void *dev_id)
{
	/* This is the paper-clip reset which does an emergency reboot. */
	printk(KERN_INFO "Restarting system.\n");
	machine_restart(NULL);

	/* This should never be reached. */
	return IRQ_HANDLED;
}

static void __init fsg_init(void)
{
	uint8_t __iomem *f;

	ixp4xx_sys_init();

	fsg_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
	fsg_flash_resource.end =
		IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;

	*IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
	*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;

	/* Configure CS2 for operation, 8bit and writable */
	*IXP4XX_EXP_CS2 = 0xbfff0002;

	gpiod_add_lookup_table(&fsg_i2c_gpiod_table);
	i2c_register_board_info(0, fsg_i2c_board_info,
				ARRAY_SIZE(fsg_i2c_board_info));

	/* This is only useful on a modified machine, but it is valuable
	 * to have it first in order to see debug messages, and so that
	 * it does *not* get removed if platform_add_devices fails!
	 */
	(void)platform_device_register(&fsg_uart);

	platform_add_devices(fsg_devices, ARRAY_SIZE(fsg_devices));

	if (request_irq(gpio_to_irq(FSG_RB_GPIO), &fsg_reset_handler,
			IRQF_TRIGGER_LOW, "FSG reset button", NULL) < 0) {

		printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
			gpio_to_irq(FSG_RB_GPIO));
	}

	if (request_irq(gpio_to_irq(FSG_SB_GPIO), &fsg_power_handler,
			IRQF_TRIGGER_LOW, "FSG power button", NULL) < 0) {

		printk(KERN_DEBUG "Power Button IRQ %d not available\n",
			gpio_to_irq(FSG_SB_GPIO));
	}

	/*
	 * Map in a portion of the flash and read the MAC addresses.
	 * Since it is stored in BE in the flash itself, we need to
	 * byteswap it if we're in LE mode.
	 */
	f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x400000);
	if (f) {
#ifdef __ARMEB__
		int i;
		for (i = 0; i < 6; i++) {
			fsg_plat_eth[0].hwaddr[i] = readb(f + 0x3C0422 + i);
			fsg_plat_eth[1].hwaddr[i] = readb(f + 0x3C043B + i);
		}
#else

		/*
		  Endian-swapped reads from unaligned addresses are
		  required to extract the two MACs from the big-endian
		  Redboot config area in flash.
		*/

		fsg_plat_eth[0].hwaddr[0] = readb(f + 0x3C0421);
		fsg_plat_eth[0].hwaddr[1] = readb(f + 0x3C0420);
		fsg_plat_eth[0].hwaddr[2] = readb(f + 0x3C0427);
		fsg_plat_eth[0].hwaddr[3] = readb(f + 0x3C0426);
		fsg_plat_eth[0].hwaddr[4] = readb(f + 0x3C0425);
		fsg_plat_eth[0].hwaddr[5] = readb(f + 0x3C0424);

		fsg_plat_eth[1].hwaddr[0] = readb(f + 0x3C0439);
		fsg_plat_eth[1].hwaddr[1] = readb(f + 0x3C043F);
		fsg_plat_eth[1].hwaddr[2] = readb(f + 0x3C043E);
		fsg_plat_eth[1].hwaddr[3] = readb(f + 0x3C043D);
		fsg_plat_eth[1].hwaddr[4] = readb(f + 0x3C043C);
		fsg_plat_eth[1].hwaddr[5] = readb(f + 0x3C0443);
#endif
		iounmap(f);
	}
	printk(KERN_INFO "FSG: Using MAC address %pM for port 0\n",
	       fsg_plat_eth[0].hwaddr);
	printk(KERN_INFO "FSG: Using MAC address %pM for port 1\n",
	       fsg_plat_eth[1].hwaddr);

}

MACHINE_START(FSG, "Freecom FSG-3")
	/* Maintainer: www.nslu2-linux.org */
	.map_io		= ixp4xx_map_io,
	.init_early	= ixp4xx_init_early,
	.init_irq	= ixp4xx_init_irq,
	.init_time	= ixp4xx_timer_init,
	.atag_offset	= 0x100,
	.init_machine	= fsg_init,
#if defined(CONFIG_PCI)
	.dma_zone_size	= SZ_64M,
#endif
	.restart	= ixp4xx_restart,
MACHINE_END
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
7e36e2f5 RW	2	/*
	3	* arch/arm/mach-ixp4xx/fsg-setup.c
	4	*
	5	* FSG board-setup
	6	*
	7	* Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
	8	*
	9	* based on ixdp425-setup.c:
	10	* Copyright (C) 2003-2004 MontaVista Software, Inc.
	11	* based on nslu2-power.c
	12	* Copyright (C) 2005 Tower Technologies
	13	*
	14	* Author: Rod Whitby <rod@whitby.id.au>
	15	* Maintainers: http://www.nslu2-linux.org/
	16	*
	17	*/
2f8163ba	18	#include <linux/gpio.h>
7e36e2f5 RW	19	#include <linux/if_ether.h>
	20	#include <linux/irq.h>
	21	#include <linux/serial.h>
	22	#include <linux/serial_8250.h>
	23	#include <linux/leds.h>
	24	#include <linux/reboot.h>
	25	#include <linux/i2c.h>
b2e63555	26	#include <linux/gpio/machine.h>
fced80c7	27	#include <linux/io.h>
7e36e2f5 RW	28	#include <asm/mach-types.h>
	29	#include <asm/mach/arch.h>
	30	#include <asm/mach/flash.h>
7e36e2f5	31
dc8ef8cd LW	32	#include "irqs.h"
dc8ef8cd LW	33
914e7bc2 KH	34	#define FSG_SDA_PIN 12
	35	#define FSG_SCL_PIN 13
	36
	37	#define FSG_SB_GPIO 4 /* sync button */
	38	#define FSG_RB_GPIO 9 /* reset button */
	39	#define FSG_UB_GPIO 10 /* usb button */
	40
7e36e2f5 RW	41	static struct flash_platform_data fsg_flash_data = {
	42	.map_name = "cfi_probe",
	43	.width = 2,
	44	};
	45
	46	static struct resource fsg_flash_resource = {
	47	.flags = IORESOURCE_MEM,
	48	};
	49
	50	static struct platform_device fsg_flash = {
	51	.name = "IXP4XX-Flash",
	52	.id = 0,
	53	.dev = {
	54	.platform_data = &fsg_flash_data,
	55	},
	56	.num_resources = 1,
	57	.resource = &fsg_flash_resource,
	58	};
	59
b2e63555	60	static struct gpiod_lookup_table fsg_i2c_gpiod_table = {
f59c303b	61	.dev_id = "i2c-gpio.0",
b2e63555 LW	62	.table = {
b2e63555 LW	63	GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", FSG_SDA_PIN,
4d0ce62c	64	NULL, 0, GPIO_ACTIVE_HIGH \| GPIO_OPEN_DRAIN),
b2e63555	65	GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", FSG_SCL_PIN,
4d0ce62c	66	NULL, 1, GPIO_ACTIVE_HIGH \| GPIO_OPEN_DRAIN),
b2e63555	67	},
7e36e2f5 RW	68	};
	69
	70	static struct platform_device fsg_i2c_gpio = {
	71	.name = "i2c-gpio",
	72	.id = 0,
	73	.dev = {
b2e63555	74	.platform_data = NULL,
7e36e2f5 RW	75	},
	76	};
	77
	78	static struct i2c_board_info __initdata fsg_i2c_board_info [] = {
	79	{
d90c1add	80	I2C_BOARD_INFO("isl1208", 0x6f),
7e36e2f5 RW	81	},
	82	};
	83
	84	static struct resource fsg_uart_resources[] = {
	85	{
	86	.start = IXP4XX_UART1_BASE_PHYS,
	87	.end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
	88	.flags = IORESOURCE_MEM,
	89	},
	90	{
	91	.start = IXP4XX_UART2_BASE_PHYS,
	92	.end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
	93	.flags = IORESOURCE_MEM,
	94	}
	95	};
	96
	97	static struct plat_serial8250_port fsg_uart_data[] = {
	98	{
	99	.mapbase = IXP4XX_UART1_BASE_PHYS,
	100	.membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
	101	.irq = IRQ_IXP4XX_UART1,
	102	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST,
	103	.iotype = UPIO_MEM,
	104	.regshift = 2,
	105	.uartclk = IXP4XX_UART_XTAL,
	106	},
	107	{
	108	.mapbase = IXP4XX_UART2_BASE_PHYS,
	109	.membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
	110	.irq = IRQ_IXP4XX_UART2,
	111	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST,
	112	.iotype = UPIO_MEM,
	113	.regshift = 2,
	114	.uartclk = IXP4XX_UART_XTAL,
	115	},
	116	{ }
	117	};
	118
	119	static struct platform_device fsg_uart = {
	120	.name = "serial8250",
	121	.id = PLAT8250_DEV_PLATFORM,
	122	.dev = {
	123	.platform_data = fsg_uart_data,
	124	},
	125	.num_resources = ARRAY_SIZE(fsg_uart_resources),
	126	.resource = fsg_uart_resources,
	127	};
	128
	129	static struct platform_device fsg_leds = {
	130	.name = "fsg-led",
	131	.id = -1,
	132	};
	133
	134	/* Built-in 10/100 Ethernet MAC interfaces */
	135	static struct eth_plat_info fsg_plat_eth[] = {
	136	{
	137	.phy = 5,
	138	.rxq = 3,
	139	.txreadyq = 20,
	140	}, {
	141	.phy = 4,
	142	.rxq = 4,
	143	.txreadyq = 21,
	144	}
145	};
146
147	static struct platform_device fsg_eth[] = {
148	{
149	.name = "ixp4xx_eth",
150	.id = IXP4XX_ETH_NPEB,
151	.dev = {
152	.platform_data = fsg_plat_eth,
153	},
154	}, {
155	.name = "ixp4xx_eth",
156	.id = IXP4XX_ETH_NPEC,
157	.dev = {
158	.platform_data = fsg_plat_eth + 1,
159	},
160	}
161	};
162
163	static struct platform_device *fsg_devices[] __initdata = {
164	&fsg_i2c_gpio,
165	&fsg_flash,
166	&fsg_leds,
167	&fsg_eth[0],
168	&fsg_eth[1],
169	};
170
171	static irqreturn_t fsg_power_handler(int irq, void *dev_id)
172	{
173	/* Signal init to do the ctrlaltdel action, this will bypass init if
174	* it hasn't started and do a kernel_restart.
175	*/
176	ctrl_alt_del();
177
178	return IRQ_HANDLED;
179	}
180
181	static irqreturn_t fsg_reset_handler(int irq, void *dev_id)
182	{
183	/* This is the paper-clip reset which does an emergency reboot. */
184	printk(KERN_INFO "Restarting system.\n");
185	machine_restart(NULL);
186
187	/* This should never be reached. */
188	return IRQ_HANDLED;
189	}
190
191	static void __init fsg_init(void)
192	{
7e36e2f5	193	uint8_t __iomem *f;
7e36e2f5 RW	194
	195	ixp4xx_sys_init();
	196
	197	fsg_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
	198	fsg_flash_resource.end =
	199	IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
	200
	201	*IXP4XX_EXP_CS0 \|= IXP4XX_FLASH_WRITABLE;
	202	IXP4XX_EXP_CS1 = IXP4XX_EXP_CS0;
	203
	204	/* Configure CS2 for operation, 8bit and writable */
	205	*IXP4XX_EXP_CS2 = 0xbfff0002;
	206
b2e63555	207	gpiod_add_lookup_table(&fsg_i2c_gpiod_table);
7e36e2f5 RW	208	i2c_register_board_info(0, fsg_i2c_board_info,
	209	ARRAY_SIZE(fsg_i2c_board_info));
	210
	211	/* This is only useful on a modified machine, but it is valuable
	212	* to have it first in order to see debug messages, and so that
	213	* it does not get removed if platform_add_devices fails!
	214	*/
	215	(void)platform_device_register(&fsg_uart);
	216
	217	platform_add_devices(fsg_devices, ARRAY_SIZE(fsg_devices));
	218
	219	if (request_irq(gpio_to_irq(FSG_RB_GPIO), &fsg_reset_handler,
1ee6564d	220	IRQF_TRIGGER_LOW, "FSG reset button", NULL) < 0) {
7e36e2f5 RW	221
	222	printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
	223	gpio_to_irq(FSG_RB_GPIO));
	224	}
	225
	226	if (request_irq(gpio_to_irq(FSG_SB_GPIO), &fsg_power_handler,
1ee6564d	227	IRQF_TRIGGER_LOW, "FSG power button", NULL) < 0) {
7e36e2f5 RW	228
	229	printk(KERN_DEBUG "Power Button IRQ %d not available\n",
	230	gpio_to_irq(FSG_SB_GPIO));
	231	}
	232
	233	/*
	234	* Map in a portion of the flash and read the MAC addresses.
	235	* Since it is stored in BE in the flash itself, we need to
	236	* byteswap it if we're in LE mode.
	237	*/
	238	f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x400000);
	239	if (f) {
	240	#ifdef __ARMEB__
d90c1add	241	int i;
7e36e2f5 RW	242	for (i = 0; i < 6; i++) {
	243	fsg_plat_eth[0].hwaddr[i] = readb(f + 0x3C0422 + i);
	244	fsg_plat_eth[1].hwaddr[i] = readb(f + 0x3C043B + i);
	245	}
	246	#else
	247
	248	/*
	249	Endian-swapped reads from unaligned addresses are
	250	required to extract the two MACs from the big-endian
	251	Redboot config area in flash.
	252	*/
	253
	254	fsg_plat_eth[0].hwaddr[0] = readb(f + 0x3C0421);
	255	fsg_plat_eth[0].hwaddr[1] = readb(f + 0x3C0420);
	256	fsg_plat_eth[0].hwaddr[2] = readb(f + 0x3C0427);
	257	fsg_plat_eth[0].hwaddr[3] = readb(f + 0x3C0426);
	258	fsg_plat_eth[0].hwaddr[4] = readb(f + 0x3C0425);
	259	fsg_plat_eth[0].hwaddr[5] = readb(f + 0x3C0424);
	260
	261	fsg_plat_eth[1].hwaddr[0] = readb(f + 0x3C0439);
	262	fsg_plat_eth[1].hwaddr[1] = readb(f + 0x3C043F);
	263	fsg_plat_eth[1].hwaddr[2] = readb(f + 0x3C043E);
	264	fsg_plat_eth[1].hwaddr[3] = readb(f + 0x3C043D);
	265	fsg_plat_eth[1].hwaddr[4] = readb(f + 0x3C043C);
	266	fsg_plat_eth[1].hwaddr[5] = readb(f + 0x3C0443);
	267	#endif
	268	iounmap(f);
	269	}
e174961c JB	270	printk(KERN_INFO "FSG: Using MAC address %pM for port 0\n",
	271	fsg_plat_eth[0].hwaddr);
	272	printk(KERN_INFO "FSG: Using MAC address %pM for port 1\n",
	273	fsg_plat_eth[1].hwaddr);
7e36e2f5 RW	274
	275	}
	276
	277	MACHINE_START(FSG, "Freecom FSG-3")
	278	/* Maintainer: www.nslu2-linux.org */
7e36e2f5	279	.map_io = ixp4xx_map_io,
f449588c	280	.init_early = ixp4xx_init_early,
7e36e2f5	281	.init_irq = ixp4xx_init_irq,
6bb27d73	282	.init_time = ixp4xx_timer_init,
e022c729	283	.atag_offset = 0x100,
7e36e2f5	284	.init_machine = fsg_init,
7553ee77 NP	285	#if defined(CONFIG_PCI)
	286	.dma_zone_size = SZ_64M,
	287	#endif
d1b860fb	288	.restart = ixp4xx_restart,
7e36e2f5 RW	289	MACHINE_END
7e36e2f5 RW	290