[thirdparty/linux.git] / arch / arm / mach-ixp4xx / vulcan-setup.c

// SPDX-License-Identifier: GPL-2.0
/*
 * arch/arm/mach-ixp4xx/vulcan-setup.c
 *
 * Arcom/Eurotech Vulcan board-setup
 *
 * Copyright (C) 2010 Marc Zyngier <maz@misterjones.org>
 *
 * based on fsg-setup.c:
 *	Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
 */

#include <linux/if_ether.h>
#include <linux/irq.h>
#include <linux/serial.h>
#include <linux/serial_8250.h>
#include <linux/io.h>
#include <linux/w1-gpio.h>
#include <linux/gpio/machine.h>
#include <linux/mtd/plat-ram.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>

static struct flash_platform_data vulcan_flash_data = {
	.map_name	= "cfi_probe",
	.width		= 2,
};

static struct resource vulcan_flash_resource = {
	.flags			= IORESOURCE_MEM,
};

static struct platform_device vulcan_flash = {
	.name			= "IXP4XX-Flash",
	.id			= 0,
	.dev = {
		.platform_data	= &vulcan_flash_data,
	},
	.resource		= &vulcan_flash_resource,
	.num_resources		= 1,
};

static struct platdata_mtd_ram vulcan_sram_data = {
	.mapname	= "Vulcan SRAM",
	.bankwidth	= 1,
};

static struct resource vulcan_sram_resource = {
	.flags			= IORESOURCE_MEM,
};

static struct platform_device vulcan_sram = {
	.name			= "mtd-ram",
	.id			= 0,
	.dev = {
		.platform_data	= &vulcan_sram_data,
	},
	.resource		= &vulcan_sram_resource,
	.num_resources		= 1,
};

static struct resource vulcan_uart_resources[] = {
	[0] = {
		.start		= IXP4XX_UART1_BASE_PHYS,
		.end		= IXP4XX_UART1_BASE_PHYS + 0x0fff,
		.flags		= IORESOURCE_MEM,
	},
	[1] = {
		.start		= IXP4XX_UART2_BASE_PHYS,
		.end		= IXP4XX_UART2_BASE_PHYS + 0x0fff,
		.flags		= IORESOURCE_MEM,
	},
	[2] = {
		.flags		= IORESOURCE_MEM,
	},
};

static struct plat_serial8250_port vulcan_uart_data[] = {
	[0] = {
		.mapbase	= IXP4XX_UART1_BASE_PHYS,
		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
		.irq		= IRQ_IXP4XX_UART1,
		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
		.iotype		= UPIO_MEM,
		.regshift	= 2,
		.uartclk	= IXP4XX_UART_XTAL,
	},
	[1] = {
		.mapbase	= IXP4XX_UART2_BASE_PHYS,
		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
		.irq		= IRQ_IXP4XX_UART2,
		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
		.iotype		= UPIO_MEM,
		.regshift	= 2,
		.uartclk	= IXP4XX_UART_XTAL,
	},
	[2] = {
		.irq		= IXP4XX_GPIO_IRQ(4),
		.irqflags	= IRQF_TRIGGER_LOW,
		.flags		= UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
		.iotype		= UPIO_MEM,
		.uartclk	= 1843200,
	},
	[3] = {
		.irq		= IXP4XX_GPIO_IRQ(4),
		.irqflags	= IRQF_TRIGGER_LOW,
		.flags		= UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
		.iotype		= UPIO_MEM,
		.uartclk	= 1843200,
	},
	{ }
};

static struct platform_device vulcan_uart = {
	.name			= "serial8250",
	.id			= PLAT8250_DEV_PLATFORM,
	.dev = {
		.platform_data	= vulcan_uart_data,
	},
	.resource		= vulcan_uart_resources,
	.num_resources		= ARRAY_SIZE(vulcan_uart_resources),
};

static struct eth_plat_info vulcan_plat_eth[] = {
	[0] = {
		.phy		= 0,
		.rxq		= 3,
		.txreadyq	= 20,
	},
	[1] = {
		.phy		= 1,
		.rxq		= 4,
		.txreadyq	= 21,
	},
};

static struct platform_device vulcan_eth[] = {
	[0] = {
		.name			= "ixp4xx_eth",
		.id			= IXP4XX_ETH_NPEB,
		.dev = {
			.platform_data	= &vulcan_plat_eth[0],
		},
	},
	[1] = {
		.name			= "ixp4xx_eth",
		.id			= IXP4XX_ETH_NPEC,
		.dev = {
			.platform_data	= &vulcan_plat_eth[1],
		},
	},
};

static struct resource vulcan_max6369_resource = {
	.flags			= IORESOURCE_MEM,
};

static struct platform_device vulcan_max6369 = {
	.name			= "max6369_wdt",
	.id			= -1,
	.resource		= &vulcan_max6369_resource,
	.num_resources		= 1,
};

static struct gpiod_lookup_table vulcan_w1_gpiod_table = {
	.dev_id = "w1-gpio",
	.table = {
		GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", 14, NULL, 0,
				GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
	},
};

static struct w1_gpio_platform_data vulcan_w1_gpio_pdata = {
	/* Intentionally left blank */
};

static struct platform_device vulcan_w1_gpio = {
	.name			= "w1-gpio",
	.id			= 0,
	.dev			= {
		.platform_data	= &vulcan_w1_gpio_pdata,
	},
};

static struct platform_device *vulcan_devices[] __initdata = {
	&vulcan_uart,
	&vulcan_flash,
	&vulcan_sram,
	&vulcan_max6369,
	&vulcan_eth[0],
	&vulcan_eth[1],
	&vulcan_w1_gpio,
};

static void __init vulcan_init(void)
{
	ixp4xx_sys_init();

	/* Flash is spread over both CS0 and CS1 */
	vulcan_flash_resource.start	 = IXP4XX_EXP_BUS_BASE(0);
	vulcan_flash_resource.end	 = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
	*IXP4XX_EXP_CS0 = IXP4XX_EXP_BUS_CS_EN		|
			  IXP4XX_EXP_BUS_STROBE_T(3)	|
			  IXP4XX_EXP_BUS_SIZE(0xF)	|
			  IXP4XX_EXP_BUS_BYTE_RD16	|
			  IXP4XX_EXP_BUS_WR_EN;
	*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;

	/* SRAM on CS2, (256kB, 8bit, writable) */
	vulcan_sram_resource.start	= IXP4XX_EXP_BUS_BASE(2);
	vulcan_sram_resource.end	= IXP4XX_EXP_BUS_BASE(2) + SZ_256K - 1;
	*IXP4XX_EXP_CS2 = IXP4XX_EXP_BUS_CS_EN		|
			  IXP4XX_EXP_BUS_STROBE_T(1)	|
			  IXP4XX_EXP_BUS_HOLD_T(2)	|
			  IXP4XX_EXP_BUS_SIZE(9)	|
			  IXP4XX_EXP_BUS_SPLT_EN	|
			  IXP4XX_EXP_BUS_WR_EN		|
			  IXP4XX_EXP_BUS_BYTE_EN;

	/* XR16L2551 on CS3 (Moto style, 512 bytes, 8bits, writable) */
	vulcan_uart_resources[2].start	= IXP4XX_EXP_BUS_BASE(3);
	vulcan_uart_resources[2].end	= IXP4XX_EXP_BUS_BASE(3) + 16 - 1;
	vulcan_uart_data[2].mapbase	= vulcan_uart_resources[2].start;
	vulcan_uart_data[3].mapbase	= vulcan_uart_data[2].mapbase + 8;
	*IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN		|
			  IXP4XX_EXP_BUS_STROBE_T(3)	|
			  IXP4XX_EXP_BUS_CYCLES(IXP4XX_EXP_BUS_CYCLES_MOTOROLA)|
			  IXP4XX_EXP_BUS_WR_EN		|
			  IXP4XX_EXP_BUS_BYTE_EN;

	/* GPIOS on CS4 (512 bytes, 8bits, writable) */
	*IXP4XX_EXP_CS4 = IXP4XX_EXP_BUS_CS_EN		|
			  IXP4XX_EXP_BUS_WR_EN		|
			  IXP4XX_EXP_BUS_BYTE_EN;

	/* max6369 on CS5 (512 bytes, 8bits, writable) */
	vulcan_max6369_resource.start	= IXP4XX_EXP_BUS_BASE(5);
	vulcan_max6369_resource.end	= IXP4XX_EXP_BUS_BASE(5);
	*IXP4XX_EXP_CS5 = IXP4XX_EXP_BUS_CS_EN		|
			  IXP4XX_EXP_BUS_WR_EN		|
			  IXP4XX_EXP_BUS_BYTE_EN;

	gpiod_add_lookup_table(&vulcan_w1_gpiod_table);
	platform_add_devices(vulcan_devices, ARRAY_SIZE(vulcan_devices));
}

MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
	/* Maintainer: Marc Zyngier <maz@misterjones.org> */
	.map_io		= ixp4xx_map_io,
	.init_early	= ixp4xx_init_early,
	.init_irq	= ixp4xx_init_irq,
	.init_time	= ixp4xx_timer_init,
	.atag_offset	= 0x100,
	.init_machine	= vulcan_init,
#if defined(CONFIG_PCI)
	.dma_zone_size	= SZ_64M,
#endif
	.restart	= ixp4xx_restart,
MACHINE_END
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
4d9be47f MZ	2	/*
	3	* arch/arm/mach-ixp4xx/vulcan-setup.c
	4	*
	5	* Arcom/Eurotech Vulcan board-setup
	6	*
	7	* Copyright (C) 2010 Marc Zyngier <maz@misterjones.org>
	8	*
	9	* based on fsg-setup.c:
	10	* Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
	11	*/
	12
	13	#include <linux/if_ether.h>
	14	#include <linux/irq.h>
	15	#include <linux/serial.h>
	16	#include <linux/serial_8250.h>
	17	#include <linux/io.h>
	18	#include <linux/w1-gpio.h>
e0fc62a6	19	#include <linux/gpio/machine.h>
4d9be47f MZ	20	#include <linux/mtd/plat-ram.h>
	21	#include <asm/mach-types.h>
	22	#include <asm/mach/arch.h>
	23	#include <asm/mach/flash.h>
	24
	25	static struct flash_platform_data vulcan_flash_data = {
	26	.map_name = "cfi_probe",
	27	.width = 2,
	28	};
	29
	30	static struct resource vulcan_flash_resource = {
	31	.flags = IORESOURCE_MEM,
	32	};
	33
	34	static struct platform_device vulcan_flash = {
	35	.name = "IXP4XX-Flash",
	36	.id = 0,
	37	.dev = {
	38	.platform_data = &vulcan_flash_data,
	39	},
	40	.resource = &vulcan_flash_resource,
	41	.num_resources = 1,
	42	};
	43
	44	static struct platdata_mtd_ram vulcan_sram_data = {
	45	.mapname = "Vulcan SRAM",
	46	.bankwidth = 1,
	47	};
	48
	49	static struct resource vulcan_sram_resource = {
	50	.flags = IORESOURCE_MEM,
	51	};
	52
	53	static struct platform_device vulcan_sram = {
	54	.name = "mtd-ram",
	55	.id = 0,
	56	.dev = {
	57	.platform_data = &vulcan_sram_data,
	58	},
	59	.resource = &vulcan_sram_resource,
	60	.num_resources = 1,
	61	};
	62
	63	static struct resource vulcan_uart_resources[] = {
	64	[0] = {
	65	.start = IXP4XX_UART1_BASE_PHYS,
	66	.end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
	67	.flags = IORESOURCE_MEM,
	68	},
	69	[1] = {
	70	.start = IXP4XX_UART2_BASE_PHYS,
	71	.end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
	72	.flags = IORESOURCE_MEM,
	73	},
	74	[2] = {
	75	.flags = IORESOURCE_MEM,
	76	},
	77	};
	78
	79	static struct plat_serial8250_port vulcan_uart_data[] = {
	80	[0] = {
	81	.mapbase = IXP4XX_UART1_BASE_PHYS,
	82	.membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
	83	.irq = IRQ_IXP4XX_UART1,
84	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST,
85	.iotype = UPIO_MEM,
86	.regshift = 2,
87	.uartclk = IXP4XX_UART_XTAL,
88	},
89	[1] = {
90	.mapbase = IXP4XX_UART2_BASE_PHYS,
91	.membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
92	.irq = IRQ_IXP4XX_UART2,
93	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST,
94	.iotype = UPIO_MEM,
95	.regshift = 2,
96	.uartclk = IXP4XX_UART_XTAL,
97	},
98	[2] = {
99	.irq = IXP4XX_GPIO_IRQ(4),
100	.irqflags = IRQF_TRIGGER_LOW,
101	.flags = UPF_IOREMAP \| UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST,
102	.iotype = UPIO_MEM,
103	.uartclk = 1843200,
104	},
105	[3] = {
106	.irq = IXP4XX_GPIO_IRQ(4),
107	.irqflags = IRQF_TRIGGER_LOW,
108	.flags = UPF_IOREMAP \| UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST,
109	.iotype = UPIO_MEM,
110	.uartclk = 1843200,
111	},
112	{ }
113	};
114
115	static struct platform_device vulcan_uart = {
116	.name = "serial8250",
117	.id = PLAT8250_DEV_PLATFORM,
118	.dev = {
119	.platform_data = vulcan_uart_data,
120	},
121	.resource = vulcan_uart_resources,
122	.num_resources = ARRAY_SIZE(vulcan_uart_resources),
123	};
124
125	static struct eth_plat_info vulcan_plat_eth[] = {
126	[0] = {
127	.phy = 0,
128	.rxq = 3,
129	.txreadyq = 20,
130	},
131	[1] = {
132	.phy = 1,
133	.rxq = 4,
134	.txreadyq = 21,
135	},
136	};
137
138	static struct platform_device vulcan_eth[] = {
139	[0] = {
140	.name = "ixp4xx_eth",
141	.id = IXP4XX_ETH_NPEB,
142	.dev = {
143	.platform_data = &vulcan_plat_eth[0],
144	},
145	},
146	[1] = {
147	.name = "ixp4xx_eth",
148	.id = IXP4XX_ETH_NPEC,
149	.dev = {
150	.platform_data = &vulcan_plat_eth[1],
151	},
152	},
153	};
154
155	static struct resource vulcan_max6369_resource = {
156	.flags = IORESOURCE_MEM,
157	};
158
159	static struct platform_device vulcan_max6369 = {
160	.name = "max6369_wdt",
161	.id = -1,
162	.resource = &vulcan_max6369_resource,
163	.num_resources = 1,
164	};
165
e0fc62a6 LW	166	static struct gpiod_lookup_table vulcan_w1_gpiod_table = {
	167	.dev_id = "w1-gpio",
	168	.table = {
	169	GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", 14, NULL, 0,
	170	GPIO_ACTIVE_HIGH \| GPIO_OPEN_DRAIN),
	171	},
	172	};
	173
4d9be47f	174	static struct w1_gpio_platform_data vulcan_w1_gpio_pdata = {
e0fc62a6	175	/* Intentionally left blank */
4d9be47f MZ	176	};
	177
	178	static struct platform_device vulcan_w1_gpio = {
	179	.name = "w1-gpio",
	180	.id = 0,
	181	.dev = {
	182	.platform_data = &vulcan_w1_gpio_pdata,
	183	},
	184	};
	185
	186	static struct platform_device *vulcan_devices[] __initdata = {
	187	&vulcan_uart,
	188	&vulcan_flash,
	189	&vulcan_sram,
	190	&vulcan_max6369,
	191	&vulcan_eth[0],
	192	&vulcan_eth[1],
	193	&vulcan_w1_gpio,
	194	};
	195
	196	static void __init vulcan_init(void)
	197	{
	198	ixp4xx_sys_init();
	199
	200	/* Flash is spread over both CS0 and CS1 */
	201	vulcan_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
	202	vulcan_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
	203	*IXP4XX_EXP_CS0 = IXP4XX_EXP_BUS_CS_EN \|
	204	IXP4XX_EXP_BUS_STROBE_T(3) \|
	205	IXP4XX_EXP_BUS_SIZE(0xF) \|
	206	IXP4XX_EXP_BUS_BYTE_RD16 \|
	207	IXP4XX_EXP_BUS_WR_EN;
	208	IXP4XX_EXP_CS1 = IXP4XX_EXP_CS0;
	209
	210	/* SRAM on CS2, (256kB, 8bit, writable) */
	211	vulcan_sram_resource.start = IXP4XX_EXP_BUS_BASE(2);
	212	vulcan_sram_resource.end = IXP4XX_EXP_BUS_BASE(2) + SZ_256K - 1;
	213	*IXP4XX_EXP_CS2 = IXP4XX_EXP_BUS_CS_EN \|
	214	IXP4XX_EXP_BUS_STROBE_T(1) \|
	215	IXP4XX_EXP_BUS_HOLD_T(2) \|
	216	IXP4XX_EXP_BUS_SIZE(9) \|
	217	IXP4XX_EXP_BUS_SPLT_EN \|
	218	IXP4XX_EXP_BUS_WR_EN \|
	219	IXP4XX_EXP_BUS_BYTE_EN;
	220
	221	/* XR16L2551 on CS3 (Moto style, 512 bytes, 8bits, writable) */
	222	vulcan_uart_resources[2].start = IXP4XX_EXP_BUS_BASE(3);
	223	vulcan_uart_resources[2].end = IXP4XX_EXP_BUS_BASE(3) + 16 - 1;
	224	vulcan_uart_data[2].mapbase = vulcan_uart_resources[2].start;
	225	vulcan_uart_data[3].mapbase = vulcan_uart_data[2].mapbase + 8;
	226	*IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN \|
	227	IXP4XX_EXP_BUS_STROBE_T(3) \|
	228	IXP4XX_EXP_BUS_CYCLES(IXP4XX_EXP_BUS_CYCLES_MOTOROLA)\|
	229	IXP4XX_EXP_BUS_WR_EN \|
	230	IXP4XX_EXP_BUS_BYTE_EN;
	231
	232	/* GPIOS on CS4 (512 bytes, 8bits, writable) */
	233	*IXP4XX_EXP_CS4 = IXP4XX_EXP_BUS_CS_EN \|
	234	IXP4XX_EXP_BUS_WR_EN \|
	235	IXP4XX_EXP_BUS_BYTE_EN;
	236
	237	/* max6369 on CS5 (512 bytes, 8bits, writable) */
	238	vulcan_max6369_resource.start = IXP4XX_EXP_BUS_BASE(5);
	239	vulcan_max6369_resource.end = IXP4XX_EXP_BUS_BASE(5);
240	*IXP4XX_EXP_CS5 = IXP4XX_EXP_BUS_CS_EN \|
241	IXP4XX_EXP_BUS_WR_EN \|
242	IXP4XX_EXP_BUS_BYTE_EN;
243
e0fc62a6	244	gpiod_add_lookup_table(&vulcan_w1_gpiod_table);
4d9be47f MZ	245	platform_add_devices(vulcan_devices, ARRAY_SIZE(vulcan_devices));
	246	}
	247
	248	MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
	249	/* Maintainer: Marc Zyngier <maz@misterjones.org> */
4d9be47f	250	.map_io = ixp4xx_map_io,
f449588c	251	.init_early = ixp4xx_init_early,
4d9be47f	252	.init_irq = ixp4xx_init_irq,
6bb27d73	253	.init_time = ixp4xx_timer_init,
e022c729	254	.atag_offset = 0x100,
4d9be47f	255	.init_machine = vulcan_init,
7553ee77 NP	256	#if defined(CONFIG_PCI)
	257	.dma_zone_size = SZ_64M,
	258	#endif
d1b860fb	259	.restart = ixp4xx_restart,
4d9be47f	260	MACHINE_END