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e0064609 LV |
1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* | |
a94a4071 | 3 | * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ |
e0064609 LV |
4 | * Lokesh Vutla <lokeshvutla@ti.com> |
5 | */ | |
6 | #ifndef _ASM_ARCH_HARDWARE_H_ | |
7 | #define _ASM_ARCH_HARDWARE_H_ | |
8 | ||
ca097374 AD |
9 | #include <asm/io.h> |
10 | ||
80b93bb7 | 11 | #ifdef CONFIG_SOC_K3_AM654 |
e0064609 LV |
12 | #include "am6_hardware.h" |
13 | #endif | |
0a704924 LV |
14 | |
15 | #ifdef CONFIG_SOC_K3_J721E | |
16 | #include "j721e_hardware.h" | |
17 | #endif | |
f8ca9121 | 18 | |
681023ab DH |
19 | #ifdef CONFIG_SOC_K3_J721S2 |
20 | #include "j721s2_hardware.h" | |
21 | #endif | |
22 | ||
57dba04a K |
23 | #ifdef CONFIG_SOC_K3_AM642 |
24 | #include "am64_hardware.h" | |
25 | #endif | |
26 | ||
d98e8600 SA |
27 | #ifdef CONFIG_SOC_K3_AM625 |
28 | #include "am62_hardware.h" | |
29 | #endif | |
30 | ||
b511b371 BB |
31 | #ifdef CONFIG_SOC_K3_AM62A7 |
32 | #include "am62a_hardware.h" | |
28e5e95b | 33 | #include "am62a_qos.h" |
b511b371 BB |
34 | #endif |
35 | ||
20d05541 AN |
36 | #ifdef CONFIG_SOC_K3_J784S4 |
37 | #include "j784s4_hardware.h" | |
38 | #endif | |
39 | ||
f8ca9121 | 40 | /* Assuming these addresses and definitions stay common across K3 devices */ |
e1e8fdfa | 41 | #define CTRLMMR_WKUP_JTAG_ID (WKUP_CTRL_MMR0_BASE + 0x14) |
f8ca9121 LV |
42 | #define JTAG_ID_VARIANT_SHIFT 28 |
43 | #define JTAG_ID_VARIANT_MASK (0xf << 28) | |
44 | #define JTAG_ID_PARTNO_SHIFT 12 | |
e7510d44 | 45 | #define JTAG_ID_PARTNO_MASK (0xffff << 12) |
2ba26e15 AN |
46 | #define JTAG_ID_PARTNO_AM62AX 0xbb8d |
47 | #define JTAG_ID_PARTNO_AM62X 0xbb7e | |
48 | #define JTAG_ID_PARTNO_AM64X 0xbb38 | |
ca097374 | 49 | #define JTAG_ID_PARTNO_AM65X 0xbb5a |
ca097374 | 50 | #define JTAG_ID_PARTNO_J7200 0xbb6d |
2ba26e15 | 51 | #define JTAG_ID_PARTNO_J721E 0xbb64 |
ca097374 | 52 | #define JTAG_ID_PARTNO_J721S2 0xbb75 |
4e3b94d7 | 53 | #define JTAG_ID_PARTNO_J784S4 0xbb80 |
ca097374 AD |
54 | |
55 | #define K3_SOC_ID(id, ID) \ | |
56 | static inline bool soc_is_##id(void) \ | |
57 | { \ | |
58 | u32 soc = (readl(CTRLMMR_WKUP_JTAG_ID) & \ | |
59 | JTAG_ID_PARTNO_MASK) >> JTAG_ID_PARTNO_SHIFT; \ | |
60 | return soc == JTAG_ID_PARTNO_##ID; \ | |
61 | } | |
62 | K3_SOC_ID(am65x, AM65X) | |
63 | K3_SOC_ID(j721e, J721E) | |
64 | K3_SOC_ID(j7200, J7200) | |
65 | K3_SOC_ID(am64x, AM64X) | |
66 | K3_SOC_ID(j721s2, J721S2) | |
67 | K3_SOC_ID(am62x, AM62X) | |
68 | K3_SOC_ID(am62ax, AM62AX) | |
69 | ||
d1c07955 AD |
70 | #define K3_SEC_MGR_SYS_STATUS 0x44234100 |
71 | #define SYS_STATUS_DEV_TYPE_SHIFT 0 | |
72 | #define SYS_STATUS_DEV_TYPE_MASK (0xf) | |
73 | #define SYS_STATUS_DEV_TYPE_GP 0x3 | |
74 | #define SYS_STATUS_DEV_TYPE_TEST 0x5 | |
75 | #define SYS_STATUS_DEV_TYPE_EMU 0x9 | |
76 | #define SYS_STATUS_DEV_TYPE_HS 0xa | |
77 | #define SYS_STATUS_SUB_TYPE_SHIFT 8 | |
78 | #define SYS_STATUS_SUB_TYPE_MASK (0xf << 8) | |
79 | #define SYS_STATUS_SUB_TYPE_VAL_FS 0xa | |
f8ca9121 | 80 | |
e1e8fdfa AD |
81 | /* |
82 | * The CTRL_MMR0 memory space is divided into several equally-spaced | |
83 | * partitions, so defining the partition size allows us to determine | |
84 | * register addresses common to those partitions. | |
85 | */ | |
86 | #define CTRL_MMR0_PARTITION_SIZE 0x4000 | |
87 | ||
88 | /* | |
89 | * CTRL_MMR0, WKUP_CTRL_MMR0, and MCU_CTRL_MMR0 lock/kick-mechanism | |
90 | * shared register definitions. The same registers are also used for | |
91 | * PADCFG_MMR lock/kick-mechanism. | |
92 | */ | |
93 | #define CTRLMMR_LOCK_KICK0 0x1008 | |
94 | #define CTRLMMR_LOCK_KICK0_UNLOCK_VAL 0x68ef3490 | |
95 | #define CTRLMMR_LOCK_KICK1 0x100c | |
96 | #define CTRLMMR_LOCK_KICK1_UNLOCK_VAL 0xd172bc5a | |
97 | ||
9c8f41be LV |
98 | #define K3_ROM_BOOT_HEADER_MAGIC "EXTBOOT" |
99 | ||
100 | struct rom_extended_boot_data { | |
101 | char header[8]; | |
102 | u32 num_components; | |
103 | }; | |
104 | ||
28e5e95b AB |
105 | struct k3_qos_data { |
106 | u32 reg; | |
107 | u32 val; | |
108 | }; | |
109 | ||
110 | extern struct k3_qos_data am62a_qos_data[]; | |
111 | extern u32 am62a_qos_count; | |
112 | ||
e0064609 | 113 | #endif /* _ASM_ARCH_HARDWARE_H_ */ |