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Commit | Line | Data |
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c53c9cf6 | 1 | /* |
a09e64fb | 2 | * arch/arm/mach-s3c2410/include/mach/system.h |
c53c9cf6 AV |
3 | * |
4 | * Copyright (C) 2006 Simtec Electronics | |
5 | * Ben Dooks <ben@simtec.co.uk> | |
6 | * | |
7 | * KS8695 - System function defines and includes | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #ifndef __ASM_ARCH_SYSTEM_H | |
15 | #define __ASM_ARCH_SYSTEM_H | |
16 | ||
fced80c7 | 17 | #include <linux/io.h> |
a09e64fb | 18 | #include <mach/regs-timer.h> |
c53c9cf6 AV |
19 | |
20 | static void arch_idle(void) | |
21 | { | |
22 | /* | |
23 | * This should do all the clock switching | |
24 | * and wait for interrupt tricks, | |
25 | */ | |
26 | cpu_do_idle(); | |
27 | ||
28 | } | |
29 | ||
30 | static void arch_reset(char mode) | |
31 | { | |
32 | unsigned int reg; | |
33 | ||
34 | if (mode == 's') | |
35 | cpu_reset(0); | |
36 | ||
37 | /* disable timer0 */ | |
38 | reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON); | |
39 | __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); | |
40 | ||
41 | /* enable watchdog mode */ | |
42 | __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC); | |
43 | ||
44 | /* re-enable timer0 */ | |
45 | __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); | |
46 | } | |
47 | ||
48 | #endif |