[people/ms/u-boot.git] / arch / arm / mach-meson / board.c

/*
 * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <libfdt.h>
#include <linux/err.h>
#include <asm/arch/gxbb.h>
#include <asm/arch/sm.h>
#include <asm/armv8/mmu.h>
#include <asm/unaligned.h>
#include <linux/sizes.h>
#include <efi_loader.h>
#include <asm/io.h>

DECLARE_GLOBAL_DATA_PTR;

int dram_init(void)
{
	const fdt64_t *val;
	int offset;
	int len;

	offset = fdt_path_offset(gd->fdt_blob, "/memory");
	if (offset < 0)
		return -EINVAL;

	val = fdt_getprop(gd->fdt_blob, offset, "reg", &len);
	if (len < sizeof(*val) * 2)
		return -EINVAL;

	/* Use unaligned access since cache is still disabled */
	gd->ram_size = get_unaligned_be64(&val[1]);

	return 0;
}

phys_size_t get_effective_memsize(void)
{
	/* Size is reported in MiB, convert it in bytes */
	return ((readl(GXBB_AO_SEC_GP_CFG0) & GXBB_AO_MEM_SIZE_MASK)
			>> GXBB_AO_MEM_SIZE_SHIFT) * SZ_1M;
}

static void meson_board_add_reserved_memory(void *fdt, u64 start, u64 size)
{
	int ret;

	ret = fdt_add_mem_rsv(fdt, start, size);
	if (ret)
		printf("Could not reserve zone @ 0x%llx\n", start);

	if (IS_ENABLED(CONFIG_EFI_LOADER)) {
		efi_add_memory_map(start,
				   ALIGN(size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
				   EFI_RESERVED_MEMORY_TYPE, false);
	}
}

void meson_gx_init_reserved_memory(void *fdt)
{
	u64 bl31_size, bl31_start;
	u64 bl32_size, bl32_start;
	u32 reg;

	/*
	 * Get ARM Trusted Firmware reserved memory zones in :
	 * - AO_SEC_GP_CFG3: bl32 & bl31 size in KiB, can be 0
	 * - AO_SEC_GP_CFG5: bl31 physical start address, can be NULL
	 * - AO_SEC_GP_CFG4: bl32 physical start address, can be NULL
	 */

	reg = readl(GXBB_AO_SEC_GP_CFG3);

	bl31_size = ((reg & GXBB_AO_BL31_RSVMEM_SIZE_MASK)
			>> GXBB_AO_BL31_RSVMEM_SIZE_SHIFT) * SZ_1K;
	bl32_size = (reg & GXBB_AO_BL32_RSVMEM_SIZE_MASK) * SZ_1K;

	bl31_start = readl(GXBB_AO_SEC_GP_CFG5);
	bl32_start = readl(GXBB_AO_SEC_GP_CFG4);

	/*
	 * Early Meson GXBB Firmware revisions did not provide the reserved
	 * memory zones in the registers, keep fixed memory zone handling.
	 */
	if (IS_ENABLED(CONFIG_MESON_GXBB) &&
	    !reg && !bl31_start && !bl32_start) {
		bl31_start = 0x10000000;
		bl31_size = 0x200000;
	}

	/* Add first 16MiB reserved zone */
	meson_board_add_reserved_memory(fdt, 0, GXBB_FIRMWARE_MEM_SIZE);

	/* Add BL31 reserved zone */
	if (bl31_start && bl31_size)
		meson_board_add_reserved_memory(fdt, bl31_start, bl31_size);

	/* Add BL32 reserved zone */
	if (bl32_start && bl32_size)
		meson_board_add_reserved_memory(fdt, bl32_start, bl32_size);
}

void reset_cpu(ulong addr)
{
	psci_system_reset();
}

static struct mm_region gxbb_mem_map[] = {
	{
		.virt = 0x0UL,
		.phys = 0x0UL,
		.size = 0x80000000UL,
		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
			 PTE_BLOCK_INNER_SHARE
	}, {
		.virt = 0x80000000UL,
		.phys = 0x80000000UL,
		.size = 0x80000000UL,
		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
			 PTE_BLOCK_NON_SHARE |
			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
	}, {
		/* List terminator */
		0,
	}
};

struct mm_region *mem_map = gxbb_mem_map;
Commit	Line	Data
bfcef28a BG	1	/*
	2	* (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#include <common.h>
	8	#include <libfdt.h>
	9	#include <linux/err.h>
	10	#include <asm/arch/gxbb.h>
c7757d46	11	#include <asm/arch/sm.h>
bfcef28a BG	12	#include <asm/armv8/mmu.h>
bfcef28a BG	13	#include <asm/unaligned.h>
c7be3e5a NA	14	#include <linux/sizes.h>
	15	#include <efi_loader.h>
	16	#include <asm/io.h>
bfcef28a BG	17
	18	DECLARE_GLOBAL_DATA_PTR;
	19
	20	int dram_init(void)
	21	{
	22	const fdt64_t *val;
	23	int offset;
	24	int len;
	25
	26	offset = fdt_path_offset(gd->fdt_blob, "/memory");
	27	if (offset < 0)
	28	return -EINVAL;
	29
	30	val = fdt_getprop(gd->fdt_blob, offset, "reg", &len);
	31	if (len < sizeof(val) 2)
	32	return -EINVAL;
	33
	34	/* Use unaligned access since cache is still disabled */
	35	gd->ram_size = get_unaligned_be64(&val[1]);
	36
	37	return 0;
	38	}
	39
c7be3e5a	40	phys_size_t get_effective_memsize(void)
bfcef28a	41	{
c7be3e5a NA	42	/* Size is reported in MiB, convert it in bytes */
	43	return ((readl(GXBB_AO_SEC_GP_CFG0) & GXBB_AO_MEM_SIZE_MASK)
	44	>> GXBB_AO_MEM_SIZE_SHIFT) * SZ_1M;
	45	}
	46
	47	static void meson_board_add_reserved_memory(void *fdt, u64 start, u64 size)
	48	{
	49	int ret;
	50
	51	ret = fdt_add_mem_rsv(fdt, start, size);
	52	if (ret)
	53	printf("Could not reserve zone @ 0x%llx\n", start);
	54
	55	if (IS_ENABLED(CONFIG_EFI_LOADER)) {
	56	efi_add_memory_map(start,
	57	ALIGN(size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
	58	EFI_RESERVED_MEMORY_TYPE, false);
	59	}
	60	}
	61
	62	void meson_gx_init_reserved_memory(void *fdt)
	63	{
	64	u64 bl31_size, bl31_start;
	65	u64 bl32_size, bl32_start;
	66	u32 reg;
	67
	68	/*
	69	* Get ARM Trusted Firmware reserved memory zones in :
	70	* - AO_SEC_GP_CFG3: bl32 & bl31 size in KiB, can be 0
	71	* - AO_SEC_GP_CFG5: bl31 physical start address, can be NULL
	72	* - AO_SEC_GP_CFG4: bl32 physical start address, can be NULL
	73	*/
	74
	75	reg = readl(GXBB_AO_SEC_GP_CFG3);
	76
	77	bl31_size = ((reg & GXBB_AO_BL31_RSVMEM_SIZE_MASK)
	78	>> GXBB_AO_BL31_RSVMEM_SIZE_SHIFT) * SZ_1K;
	79	bl32_size = (reg & GXBB_AO_BL32_RSVMEM_SIZE_MASK) * SZ_1K;
	80
	81	bl31_start = readl(GXBB_AO_SEC_GP_CFG5);
	82	bl32_start = readl(GXBB_AO_SEC_GP_CFG4);
	83
	84	/*
	85	* Early Meson GXBB Firmware revisions did not provide the reserved
	86	* memory zones in the registers, keep fixed memory zone handling.
	87	*/
	88	if (IS_ENABLED(CONFIG_MESON_GXBB) &&
	89	!reg && !bl31_start && !bl32_start) {
	90	bl31_start = 0x10000000;
	91	bl31_size = 0x200000;
	92	}
	93
	94	/* Add first 16MiB reserved zone */
	95	meson_board_add_reserved_memory(fdt, 0, GXBB_FIRMWARE_MEM_SIZE);
	96
	97	/* Add BL31 reserved zone */
	98	if (bl31_start && bl31_size)
	99	meson_board_add_reserved_memory(fdt, bl31_start, bl31_size);
	100
	101	/* Add BL32 reserved zone */
	102	if (bl32_start && bl32_size)
	103	meson_board_add_reserved_memory(fdt, bl32_start, bl32_size);
bfcef28a BG	104	}
	105
	106	void reset_cpu(ulong addr)
	107	{
51bfb5b6	108	psci_system_reset();
bfcef28a BG	109	}
	110
	111	static struct mm_region gxbb_mem_map[] = {
	112	{
cd4b0c5f YS	113	.virt = 0x0UL,
cd4b0c5f YS	114	.phys = 0x0UL,
bfcef28a BG	115	.size = 0x80000000UL,
	116	.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) \|
	117	PTE_BLOCK_INNER_SHARE
	118	}, {
cd4b0c5f YS	119	.virt = 0x80000000UL,
cd4b0c5f YS	120	.phys = 0x80000000UL,
bfcef28a BG	121	.size = 0x80000000UL,
	122	.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) \|
	123	PTE_BLOCK_NON_SHARE \|
	124	PTE_BLOCK_PXN \| PTE_BLOCK_UXN
	125	}, {
	126	/* List terminator */
	127	0,
	128	}
	129	};
	130
	131	struct mm_region *mem_map = gxbb_mem_map;