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41e5ee54 SR |
1 | /* |
2 | * (C) Copyright 2011 | |
3 | * Marvell Semiconductor <www.marvell.com> | |
4 | * Written-by: Lei Wen <leiwen@marvell.com> | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | /* | |
10 | * This file should be included in board config header file. | |
11 | * | |
f7c0ef07 | 12 | * It supports common definitions for MVEBU platforms |
41e5ee54 SR |
13 | */ |
14 | ||
250eea74 SR |
15 | #ifndef _MVEBU_CONFIG_H |
16 | #define _MVEBU_CONFIG_H | |
41e5ee54 SR |
17 | |
18 | #include <asm/arch/soc.h> | |
19 | ||
f7c0ef07 | 20 | #if defined(CONFIG_ARMADA_XP) |
41e5ee54 | 21 | #define MV88F78X60 /* for the DDR training bin_hdr code */ |
f7c0ef07 | 22 | #endif |
41e5ee54 SR |
23 | |
24 | #define CONFIG_SYS_CACHELINE_SIZE 32 | |
25 | ||
26 | /* | |
27 | * By default kwbimage.cfg from board specific folder is used | |
28 | * If for some board, different configuration file need to be used, | |
29 | * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file | |
30 | */ | |
31 | #ifndef CONFIG_SYS_KWD_CONFIG | |
32 | #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg | |
33 | #endif /* CONFIG_SYS_KWD_CONFIG */ | |
34 | ||
35 | /* Add target to build it automatically upon "make" */ | |
1e0b5984 SR |
36 | #ifdef CONFIG_SPL |
37 | #define CONFIG_BUILD_TARGET "u-boot-spl.kwb" | |
1e0b5984 | 38 | #endif |
41e5ee54 SR |
39 | |
40 | /* end of 16M scrubbed by training in bootrom */ | |
41 | #define CONFIG_SYS_INIT_SP_ADDR 0x00FF0000 | |
42 | #define CONFIG_NR_DRAM_BANKS_MAX 2 | |
43 | ||
44 | #define MV_UART_CONSOLE_BASE MVEBU_UART0_BASE | |
45 | ||
46 | /* | |
47 | * SPI Flash configuration | |
48 | */ | |
49 | #ifdef CONFIG_CMD_SF | |
50 | #define CONFIG_HARD_SPI 1 | |
51 | #define CONFIG_KIRKWOOD_SPI 1 | |
52 | #ifndef CONFIG_ENV_SPI_BUS | |
53 | # define CONFIG_ENV_SPI_BUS 0 | |
54 | #endif | |
55 | #ifndef CONFIG_ENV_SPI_CS | |
56 | # define CONFIG_ENV_SPI_CS 0 | |
57 | #endif | |
58 | #ifndef CONFIG_ENV_SPI_MAX_HZ | |
59 | # define CONFIG_ENV_SPI_MAX_HZ 50000000 | |
60 | #endif | |
61 | #endif | |
62 | ||
63 | /* | |
64 | * Ethernet Driver configuration | |
65 | */ | |
66 | #ifdef CONFIG_CMD_NET | |
67 | #define CONFIG_CMD_MII | |
68 | #define CONFIG_MII /* expose smi ove miiphy interface */ | |
69 | #define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */ | |
70 | #define CONFIG_PHYLIB | |
71 | #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ | |
72 | #define CONFIG_PHY_GIGE /* GbE speed/duplex detect */ | |
9eb14cc4 SR |
73 | #define CONFIG_ARP_TIMEOUT 200 |
74 | #define CONFIG_NET_RETRY_COUNT 50 | |
41e5ee54 SR |
75 | #endif /* CONFIG_CMD_NET */ |
76 | ||
77 | /* | |
78 | * I2C related stuff | |
79 | */ | |
80 | #ifdef CONFIG_CMD_I2C | |
81 | #ifndef CONFIG_SYS_I2C_SOFT | |
82 | #define CONFIG_I2C_MVTWSI | |
83 | #endif | |
84 | #define CONFIG_SYS_I2C_SLAVE 0x0 | |
85 | #define CONFIG_SYS_I2C_SPEED 100000 | |
86 | #endif | |
87 | ||
2fbc18fe SR |
88 | /* Use common timer */ |
89 | #define CONFIG_SYS_TIMER_COUNTS_DOWN | |
90 | #define CONFIG_SYS_TIMER_COUNTER (MVEBU_TIMER_BASE + 0x14) | |
91 | #define CONFIG_SYS_TIMER_RATE 25000000 | |
92 | ||
250eea74 | 93 | #endif /* __MVEBU_CONFIG_H */ |