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Commit | Line | Data |
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b0f80b91 | 1 | /* |
a5f88877 | 2 | * Copyright (C) 2014-2016 Stefan Roese <sr@denx.de> |
b0f80b91 SR |
3 | * |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #include <common.h> | |
6451223a SR |
8 | #include <dm.h> |
9 | #include <debug_uart.h> | |
10 | #include <fdtdec.h> | |
b0f80b91 SR |
11 | #include <spl.h> |
12 | #include <asm/io.h> | |
13 | #include <asm/arch/cpu.h> | |
14 | #include <asm/arch/soc.h> | |
15 | ||
a5f88877 | 16 | static u32 get_boot_device(void) |
b0f80b91 | 17 | { |
a5f88877 SR |
18 | u32 val; |
19 | u32 boot_device; | |
20 | ||
f4db6c97 SR |
21 | /* |
22 | * First check, if UART boot-mode is active. This can only | |
23 | * be done, via the bootrom error register. Here the | |
24 | * MSB marks if the UART mode is active. | |
25 | */ | |
26 | val = readl(CONFIG_BOOTROM_ERR_REG); | |
27 | boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS; | |
28 | debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device); | |
e83e2b39 SN |
29 | #if defined(CONFIG_ARMADA_38X) |
30 | /* | |
31 | * If the bootrom error register contains any else than zeros | |
32 | * in the first 8 bits it's an error condition. And in that case | |
33 | * try to boot from UART. | |
34 | */ | |
35 | if (boot_device) | |
36 | #else | |
f4db6c97 | 37 | if (boot_device == BOOTROM_ERR_MODE_UART) |
e83e2b39 | 38 | #endif |
f4db6c97 SR |
39 | return BOOT_DEVICE_UART; |
40 | ||
41 | /* | |
42 | * Now check the SAR register for the strapped boot-device | |
43 | */ | |
a5f88877 SR |
44 | val = readl(CONFIG_SAR_REG); /* SAR - Sample At Reset */ |
45 | boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS; | |
f4db6c97 | 46 | debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device); |
a5f88877 | 47 | switch (boot_device) { |
926c8b2e SN |
48 | #if defined(CONFIG_ARMADA_38X) |
49 | case BOOT_FROM_NAND: | |
50 | return BOOT_DEVICE_NAND; | |
51 | #endif | |
a5f88877 SR |
52 | #ifdef CONFIG_SPL_MMC_SUPPORT |
53 | case BOOT_FROM_MMC: | |
54 | case BOOT_FROM_MMC_ALT: | |
55 | return BOOT_DEVICE_MMC1; | |
8ed43b96 | 56 | #endif |
a5f88877 | 57 | case BOOT_FROM_UART: |
f3a88e2c BS |
58 | #ifdef BOOT_FROM_UART_ALT |
59 | case BOOT_FROM_UART_ALT: | |
60 | #endif | |
a5f88877 SR |
61 | return BOOT_DEVICE_UART; |
62 | case BOOT_FROM_SPI: | |
63 | default: | |
64 | return BOOT_DEVICE_SPI; | |
65 | }; | |
66 | } | |
67 | ||
68 | u32 spl_boot_device(void) | |
69 | { | |
70 | return get_boot_device(); | |
b0f80b91 SR |
71 | } |
72 | ||
73 | void board_init_f(ulong dummy) | |
74 | { | |
6451223a SR |
75 | int ret; |
76 | ||
e3cccf9e SR |
77 | /* |
78 | * Pin muxing needs to be done before UART output, since | |
79 | * on A38x the UART pins need some re-muxing for output | |
80 | * to work. | |
81 | */ | |
82 | board_early_init_f(); | |
83 | ||
6451223a SR |
84 | /* Example code showing how to enable the debug UART on MVEBU */ |
85 | #ifdef EARLY_UART | |
86 | /* | |
87 | * Debug UART can be used from here if required: | |
88 | * | |
89 | * debug_uart_init(); | |
90 | * printch('a'); | |
91 | * printhex8(0x1234); | |
92 | * printascii("string"); | |
93 | */ | |
94 | #endif | |
95 | ||
96 | ret = spl_init(); | |
97 | if (ret) { | |
98 | debug("spl_init() failed: %d\n", ret); | |
99 | hang(); | |
100 | } | |
101 | ||
102 | /* Use special translation offset for SPL */ | |
103 | dm_set_translation_offset(0xd0000000 - 0xf1000000); | |
104 | ||
b0f80b91 SR |
105 | preloader_console_init(); |
106 | ||
ade741b3 SR |
107 | timer_init(); |
108 | ||
09e89ab4 SR |
109 | /* Armada 375 does not support SerDes and DDR3 init yet */ |
110 | #if !defined(CONFIG_ARMADA_375) | |
b0f80b91 SR |
111 | /* First init the serdes PHY's */ |
112 | serdes_phy_config(); | |
113 | ||
114 | /* Setup DDR */ | |
115 | ddr3_init(); | |
09e89ab4 | 116 | #endif |
b0f80b91 | 117 | |
944c7a31 SR |
118 | /* |
119 | * Return to the BootROM to continue the Marvell xmodem | |
120 | * UART boot protocol. As initiated by the kwboot tool. | |
121 | * | |
122 | * This can only be done by the BootROM and not by the | |
123 | * U-Boot SPL infrastructure, since the beginning of the | |
124 | * image is already read and interpreted by the BootROM. | |
125 | * SPL has no chance to receive this information. So we | |
126 | * need to return to the BootROM to enable this xmodem | |
127 | * UART download. | |
926c8b2e SN |
128 | * |
129 | * If booting from NAND lets let the BootROM load the | |
130 | * rest of the bootloader. | |
944c7a31 | 131 | */ |
926c8b2e SN |
132 | switch (get_boot_device()) { |
133 | case BOOT_DEVICE_UART: | |
134 | #if defined(CONFIG_ARMADA_38X) | |
135 | case BOOT_DEVICE_NAND: | |
136 | #endif | |
137 | return_to_bootrom(); | |
138 | } | |
b0f80b91 | 139 | } |