[thirdparty/linux.git] / arch / arm / mach-omap2 / board-3430sdp.c

/*
 * linux/arch/arm/mach-omap2/board-3430sdp.c
 *
 * Copyright (C) 2007 Texas Instruments
 *
 * Modified from mach-omap2/board-generic.c
 *
 * Initial code: Syed Mohammed Khasim
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/input.h>
#include <linux/input/matrix_keypad.h>
#include <linux/spi/spi.h>
#include <linux/i2c/twl.h>
#include <linux/regulator/machine.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/mmc/host.h>
#include <linux/platform_data/spi-omap2-mcspi.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>

#include "common.h"
#include <linux/omap-dma.h>
#include <video/omapdss.h>
#include <video/omap-panel-tfp410.h>

#include "gpmc.h"
#include "gpmc-smc91x.h"

#include "soc.h"
#include "board-flash.h"
#include "mux.h"
#include "sdram-qimonda-hyb18m512160af-6.h"
#include "hsmmc.h"
#include "pm.h"
#include "control.h"
#include "common-board-devices.h"

#define CONFIG_DISABLE_HFCLK 1

#define SDP3430_TS_GPIO_IRQ_SDPV1	3
#define SDP3430_TS_GPIO_IRQ_SDPV2	2

#define ENABLE_VAUX3_DEDICATED	0x03
#define ENABLE_VAUX3_DEV_GRP	0x20

#define TWL4030_MSECURE_GPIO 22

static uint32_t board_keymap[] = {
	KEY(0, 0, KEY_LEFT),
	KEY(0, 1, KEY_RIGHT),
	KEY(0, 2, KEY_A),
	KEY(0, 3, KEY_B),
	KEY(0, 4, KEY_C),
	KEY(1, 0, KEY_DOWN),
	KEY(1, 1, KEY_UP),
	KEY(1, 2, KEY_E),
	KEY(1, 3, KEY_F),
	KEY(1, 4, KEY_G),
	KEY(2, 0, KEY_ENTER),
	KEY(2, 1, KEY_I),
	KEY(2, 2, KEY_J),
	KEY(2, 3, KEY_K),
	KEY(2, 4, KEY_3),
	KEY(3, 0, KEY_M),
	KEY(3, 1, KEY_N),
	KEY(3, 2, KEY_O),
	KEY(3, 3, KEY_P),
	KEY(3, 4, KEY_Q),
	KEY(4, 0, KEY_R),
	KEY(4, 1, KEY_4),
	KEY(4, 2, KEY_T),
	KEY(4, 3, KEY_U),
	KEY(4, 4, KEY_D),
	KEY(5, 0, KEY_V),
	KEY(5, 1, KEY_W),
	KEY(5, 2, KEY_L),
	KEY(5, 3, KEY_S),
	KEY(5, 4, KEY_H),
	0
};

static struct matrix_keymap_data board_map_data = {
	.keymap			= board_keymap,
	.keymap_size		= ARRAY_SIZE(board_keymap),
};

static struct twl4030_keypad_data sdp3430_kp_data = {
	.keymap_data	= &board_map_data,
	.rows		= 5,
	.cols		= 6,
	.rep		= 1,
};

#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO	8
#define SDP3430_LCD_PANEL_ENABLE_GPIO		5

static struct gpio sdp3430_dss_gpios[] __initdata = {
	{SDP3430_LCD_PANEL_ENABLE_GPIO,    GPIOF_OUT_INIT_LOW, "LCD reset"    },
	{SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},
};

static void __init sdp3430_display_init(void)
{
	int r;

	r = gpio_request_array(sdp3430_dss_gpios,
			       ARRAY_SIZE(sdp3430_dss_gpios));
	if (r)
		printk(KERN_ERR "failed to get LCD control GPIOs\n");

}

static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
{
	gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);
	gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);

	return 0;
}

static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
{
	gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);
	gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);
}

static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
{
	return 0;
}

static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
{
}


static struct omap_dss_device sdp3430_lcd_device = {
	.name			= "lcd",
	.driver_name		= "sharp_ls_panel",
	.type			= OMAP_DISPLAY_TYPE_DPI,
	.phy.dpi.data_lines	= 16,
	.platform_enable	= sdp3430_panel_enable_lcd,
	.platform_disable	= sdp3430_panel_disable_lcd,
};

static struct tfp410_platform_data dvi_panel = {
	.power_down_gpio	= -1,
	.i2c_bus_num		= -1,
};

static struct omap_dss_device sdp3430_dvi_device = {
	.name			= "dvi",
	.type			= OMAP_DISPLAY_TYPE_DPI,
	.driver_name		= "tfp410",
	.data			= &dvi_panel,
	.phy.dpi.data_lines	= 24,
};

static struct omap_dss_device sdp3430_tv_device = {
	.name			= "tv",
	.driver_name		= "venc",
	.type			= OMAP_DISPLAY_TYPE_VENC,
	.phy.venc.type		= OMAP_DSS_VENC_TYPE_SVIDEO,
	.platform_enable	= sdp3430_panel_enable_tv,
	.platform_disable	= sdp3430_panel_disable_tv,
};


static struct omap_dss_device *sdp3430_dss_devices[] = {
	&sdp3430_lcd_device,
	&sdp3430_dvi_device,
	&sdp3430_tv_device,
};

static struct omap_dss_board_info sdp3430_dss_data = {
	.num_devices	= ARRAY_SIZE(sdp3430_dss_devices),
	.devices	= sdp3430_dss_devices,
	.default_device	= &sdp3430_lcd_device,
};

static struct omap2_hsmmc_info mmc[] = {
	{
		.mmc		= 1,
		/* 8 bits (default) requires S6.3 == ON,
		 * so the SIM card isn't used; else 4 bits.
		 */
		.caps		= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
		.gpio_wp	= 4,
		.deferred	= true,
	},
	{
		.mmc		= 2,
		.caps		= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
		.gpio_wp	= 7,
		.deferred	= true,
	},
	{}	/* Terminator */
};

static int sdp3430_twl_gpio_setup(struct device *dev,
		unsigned gpio, unsigned ngpio)
{
	/* gpio + 0 is "mmc0_cd" (input/IRQ),
	 * gpio + 1 is "mmc1_cd" (input/IRQ)
	 */
	mmc[0].gpio_cd = gpio + 0;
	mmc[1].gpio_cd = gpio + 1;
	omap_hsmmc_late_init(mmc);

	/* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
	gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");

	/* gpio + 15 is "sub_lcd_nRST" (output) */
	gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");

	return 0;
}

static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
	.pulldowns	= BIT(2) | BIT(6) | BIT(8) | BIT(13)
				| BIT(16) | BIT(17),
	.setup		= sdp3430_twl_gpio_setup,
};

/* regulator consumer mappings */

/* ads7846 on SPI */
static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
	REGULATOR_SUPPLY("vcc", "spi1.0"),
};

static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
};

static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
	REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
};

static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
};

/*
 * Apply all the fixed voltages since most versions of U-Boot
 * don't bother with that initialization.
 */

/* VAUX1 for mainboard (irda and sub-lcd) */
static struct regulator_init_data sdp3430_vaux1 = {
	.constraints = {
		.min_uV			= 2800000,
		.max_uV			= 2800000,
		.apply_uV		= true,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
};

/* VAUX2 for camera module */
static struct regulator_init_data sdp3430_vaux2 = {
	.constraints = {
		.min_uV			= 2800000,
		.max_uV			= 2800000,
		.apply_uV		= true,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
};

/* VAUX3 for LCD board */
static struct regulator_init_data sdp3430_vaux3 = {
	.constraints = {
		.min_uV			= 2800000,
		.max_uV			= 2800000,
		.apply_uV		= true,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
	.num_consumer_supplies		= ARRAY_SIZE(sdp3430_vaux3_supplies),
	.consumer_supplies		= sdp3430_vaux3_supplies,
};

/* VAUX4 for OMAP VDD_CSI2 (camera) */
static struct regulator_init_data sdp3430_vaux4 = {
	.constraints = {
		.min_uV			= 1800000,
		.max_uV			= 1800000,
		.apply_uV		= true,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
};

/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
static struct regulator_init_data sdp3430_vmmc1 = {
	.constraints = {
		.min_uV			= 1850000,
		.max_uV			= 3150000,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE
					| REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
	.num_consumer_supplies	= ARRAY_SIZE(sdp3430_vmmc1_supplies),
	.consumer_supplies	= sdp3430_vmmc1_supplies,
};

/* VMMC2 for MMC2 card */
static struct regulator_init_data sdp3430_vmmc2 = {
	.constraints = {
		.min_uV			= 1850000,
		.max_uV			= 1850000,
		.apply_uV		= true,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
	.num_consumer_supplies	= ARRAY_SIZE(sdp3430_vmmc2_supplies),
	.consumer_supplies	= sdp3430_vmmc2_supplies,
};

/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
static struct regulator_init_data sdp3430_vsim = {
	.constraints = {
		.min_uV			= 1800000,
		.max_uV			= 3000000,
		.valid_modes_mask	= REGULATOR_MODE_NORMAL
					| REGULATOR_MODE_STANDBY,
		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE
					| REGULATOR_CHANGE_MODE
					| REGULATOR_CHANGE_STATUS,
	},
	.num_consumer_supplies	= ARRAY_SIZE(sdp3430_vsim_supplies),
	.consumer_supplies	= sdp3430_vsim_supplies,
};

static struct twl4030_platform_data sdp3430_twldata = {
	/* platform_data for children goes here */
	.gpio		= &sdp3430_gpio_data,
	.keypad		= &sdp3430_kp_data,

	.vaux1		= &sdp3430_vaux1,
	.vaux2		= &sdp3430_vaux2,
	.vaux3		= &sdp3430_vaux3,
	.vaux4		= &sdp3430_vaux4,
	.vmmc1		= &sdp3430_vmmc1,
	.vmmc2		= &sdp3430_vmmc2,
	.vsim		= &sdp3430_vsim,
};

static int __init omap3430_i2c_init(void)
{
	/* i2c1 for PMIC only */
	omap3_pmic_get_config(&sdp3430_twldata,
			TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
			TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
			TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
	sdp3430_twldata.vdac->constraints.apply_uV = true;
	sdp3430_twldata.vpll2->constraints.apply_uV = true;
	sdp3430_twldata.vpll2->constraints.name = "VDVI";

	omap3_pmic_init("twl4030", &sdp3430_twldata);

	/* i2c2 on camera connector (for sensor control) and optional isp1301 */
	omap_register_i2c_bus(2, 400, NULL, 0);
	/* i2c3 on display connector (for DVI, tfp410) */
	omap_register_i2c_bus(3, 400, NULL, 0);
	return 0;
}

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)

static struct omap_smc91x_platform_data board_smc91x_data = {
	.cs		= 3,
	.flags		= GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
				IORESOURCE_IRQ_LOWLEVEL,
};

static void __init board_smc91x_init(void)
{
	if (omap_rev() > OMAP3430_REV_ES1_0)
		board_smc91x_data.gpio_irq = 6;
	else
		board_smc91x_data.gpio_irq = 29;

	gpmc_smc91x_init(&board_smc91x_data);
}

#else

static inline void board_smc91x_init(void)
{
}

#endif

static void enable_board_wakeup_source(void)
{
	/* T2 interrupt line (keypad) */
	omap_mux_init_signal("sys_nirq",
		OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
}

static const struct usbhs_omap_board_data usbhs_bdata __initconst = {

	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,

	.phy_reset  = true,
	.reset_gpio_port[0]  = 57,
	.reset_gpio_port[1]  = 61,
	.reset_gpio_port[2]  = -EINVAL
};

#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
	{ .reg_offset = OMAP_MUX_TERMINATOR },
};
#else
#define board_mux	NULL
#endif

/*
 * SDP3430 V2 Board CS organization
 * Different from SDP3430 V1. Now 4 switches used to specify CS
 *
 * See also the Switch S8 settings in the comments.
 */
static char chip_sel_3430[][GPMC_CS_NUM] = {
	{PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
	{PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
	{PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
};

static struct mtd_partition sdp_nor_partitions[] = {
	/* bootloader (U-Boot, etc) in first sector */
	{
		.name		= "Bootloader-NOR",
		.offset		= 0,
		.size		= SZ_256K,
		.mask_flags	= MTD_WRITEABLE, /* force read-only */
	},
	/* bootloader params in the next sector */
	{
		.name		= "Params-NOR",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_256K,
		.mask_flags	= 0,
	},
	/* kernel */
	{
		.name		= "Kernel-NOR",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_2M,
		.mask_flags	= 0
	},
	/* file system */
	{
		.name		= "Filesystem-NOR",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= 0
	}
};

static struct mtd_partition sdp_onenand_partitions[] = {
	{
		.name		= "X-Loader-OneNAND",
		.offset		= 0,
		.size		= 4 * (64 * 2048),
		.mask_flags	= MTD_WRITEABLE  /* force read-only */
	},
	{
		.name		= "U-Boot-OneNAND",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 2 * (64 * 2048),
		.mask_flags	= MTD_WRITEABLE  /* force read-only */
	},
	{
		.name		= "U-Boot Environment-OneNAND",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 1 * (64 * 2048),
	},
	{
		.name		= "Kernel-OneNAND",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 16 * (64 * 2048),
	},
	{
		.name		= "File System-OneNAND",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
	},
};

static struct mtd_partition sdp_nand_partitions[] = {
	/* All the partition sizes are listed in terms of NAND block size */
	{
		.name		= "X-Loader-NAND",
		.offset		= 0,
		.size		= 4 * (64 * 2048),
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "U-Boot-NAND",
		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x80000 */
		.size		= 10 * (64 * 2048),
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "Boot Env-NAND",

		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x1c0000 */
		.size		= 6 * (64 * 2048),
	},
	{
		.name		= "Kernel-NAND",
		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x280000 */
		.size		= 40 * (64 * 2048),
	},
	{
		.name		= "File System - NAND",
		.size		= MTDPART_SIZ_FULL,
		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x780000 */
	},
};

static struct flash_partitions sdp_flash_partitions[] = {
	{
		.parts = sdp_nor_partitions,
		.nr_parts = ARRAY_SIZE(sdp_nor_partitions),
	},
	{
		.parts = sdp_onenand_partitions,
		.nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
	},
	{
		.parts = sdp_nand_partitions,
		.nr_parts = ARRAY_SIZE(sdp_nand_partitions),
	},
};

static void __init omap_3430sdp_init(void)
{
	int gpio_pendown;

	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
	omap_hsmmc_init(mmc);
	omap3430_i2c_init();
	omap_display_init(&sdp3430_dss_data);
	if (omap_rev() > OMAP3430_REV_ES1_0)
		gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
	else
		gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
	omap_ads7846_init(1, gpio_pendown, 310, NULL);
	omap_serial_init();
	omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
	usb_musb_init(NULL);
	board_smc91x_init();
	board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
	sdp3430_display_init();
	enable_board_wakeup_source();
	usbhs_init(&usbhs_bdata);
}

MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
	/* Maintainer: Syed Khasim - Texas Instruments Inc */
	.atag_offset	= 0x100,
	.reserve	= omap_reserve,
	.map_io		= omap3_map_io,
	.init_early	= omap3430_init_early,
	.init_irq	= omap3_init_irq,
	.handle_irq	= omap3_intc_handle_irq,
	.init_machine	= omap_3430sdp_init,
	.init_late	= omap3430_init_late,
	.init_time	= omap3_sync32k_timer_init,
	.restart	= omap3xxx_restart,
MACHINE_END
Commit	Line	Data
6fdc29e2 SMK	1	/*
	2	* linux/arch/arm/mach-omap2/board-3430sdp.c
	3	*
	4	* Copyright (C) 2007 Texas Instruments
	5	*
	6	* Modified from mach-omap2/board-generic.c
	7	*
	8	* Initial code: Syed Mohammed Khasim
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
	14
	15	#include <linux/kernel.h>
	16	#include <linux/init.h>
	17	#include <linux/platform_device.h>
	18	#include <linux/delay.h>
	19	#include <linux/input.h>
6135434a	20	#include <linux/input/matrix_keypad.h>
6fdc29e2	21	#include <linux/spi/spi.h>
b07682b6	22	#include <linux/i2c/twl.h>
6fdc29e2 SMK	23	#include <linux/regulator/machine.h>
	24	#include <linux/io.h>
	25	#include <linux/gpio.h>
3a63833e	26	#include <linux/mmc/host.h>
2203747c	27	#include <linux/platform_data/spi-omap2-mcspi.h>
6fdc29e2	28
6fdc29e2 SMK	29	#include <asm/mach-types.h>
	30	#include <asm/mach/arch.h>
	31	#include <asm/mach/map.h>
	32
4e65331c	33	#include "common.h"
45c3eb7d	34	#include <linux/omap-dma.h>
a0b38cc4	35	#include <video/omapdss.h>
dac8eb5f	36	#include <video/omap-panel-tfp410.h>
6fdc29e2	37
99f0b8d6	38	#include "gpmc.h"
60628152	39	#include "gpmc-smc91x.h"
6fdc29e2	40
e4c060db	41	#include "soc.h"
04aeae77	42	#include "board-flash.h"
ca5742bd	43	#include "mux.h"
17a722ca	44	#include "sdram-qimonda-hyb18m512160af-6.h"
d02a900b	45	#include "hsmmc.h"
bb4de3df	46	#include "pm.h"
4814ced5	47	#include "control.h"
96974a24	48	#include "common-board-devices.h"
6fdc29e2 SMK	49
	50	#define CONFIG_DISABLE_HFCLK 1
	51
6fdc29e2 SMK	52	#define SDP3430_TS_GPIO_IRQ_SDPV1 3
	53	#define SDP3430_TS_GPIO_IRQ_SDPV2 2
	54
	55	#define ENABLE_VAUX3_DEDICATED 0x03
	56	#define ENABLE_VAUX3_DEV_GRP 0x20
	57
	58	#define TWL4030_MSECURE_GPIO 22
	59
bead4375	60	static uint32_t board_keymap[] = {
6fdc29e2 SMK	61	KEY(0, 0, KEY_LEFT),
	62	KEY(0, 1, KEY_RIGHT),
	63	KEY(0, 2, KEY_A),
	64	KEY(0, 3, KEY_B),
	65	KEY(0, 4, KEY_C),
	66	KEY(1, 0, KEY_DOWN),
	67	KEY(1, 1, KEY_UP),
	68	KEY(1, 2, KEY_E),
	69	KEY(1, 3, KEY_F),
	70	KEY(1, 4, KEY_G),
	71	KEY(2, 0, KEY_ENTER),
	72	KEY(2, 1, KEY_I),
	73	KEY(2, 2, KEY_J),
	74	KEY(2, 3, KEY_K),
	75	KEY(2, 4, KEY_3),
	76	KEY(3, 0, KEY_M),
	77	KEY(3, 1, KEY_N),
	78	KEY(3, 2, KEY_O),
	79	KEY(3, 3, KEY_P),
	80	KEY(3, 4, KEY_Q),
	81	KEY(4, 0, KEY_R),
	82	KEY(4, 1, KEY_4),
	83	KEY(4, 2, KEY_T),
	84	KEY(4, 3, KEY_U),
	85	KEY(4, 4, KEY_D),
	86	KEY(5, 0, KEY_V),
	87	KEY(5, 1, KEY_W),
	88	KEY(5, 2, KEY_L),
	89	KEY(5, 3, KEY_S),
	90	KEY(5, 4, KEY_H),
	91	0
	92	};
	93
4f543332 TL	94	static struct matrix_keymap_data board_map_data = {
	95	.keymap = board_keymap,
	96	.keymap_size = ARRAY_SIZE(board_keymap),
	97	};
	98
6fdc29e2	99	static struct twl4030_keypad_data sdp3430_kp_data = {
4f543332	100	.keymap_data = &board_map_data,
6fdc29e2 SMK	101	.rows = 5,
6fdc29e2 SMK	102	.cols = 6,
6fdc29e2 SMK	103	.rep = 1,
	104	};
	105
d9056ce2 TV	106	#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
	107	#define SDP3430_LCD_PANEL_ENABLE_GPIO 5
	108
bc593f5d IG	109	static struct gpio sdp3430_dss_gpios[] __initdata = {
	110	{SDP3430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, "LCD reset" },
	111	{SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},
	112	};
	113
d9056ce2 TV	114	static void __init sdp3430_display_init(void)
	115	{
	116	int r;
	117
bc593f5d IG	118	r = gpio_request_array(sdp3430_dss_gpios,
	119	ARRAY_SIZE(sdp3430_dss_gpios));
	120	if (r)
	121	printk(KERN_ERR "failed to get LCD control GPIOs\n");
d9056ce2	122
d9056ce2 TV	123	}
	124
	125	static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
	126	{
bc593f5d IG	127	gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);
bc593f5d IG	128	gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);
d9056ce2	129
d9056ce2 TV	130	return 0;
	131	}
	132
	133	static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
	134	{
bc593f5d IG	135	gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);
bc593f5d IG	136	gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);
d9056ce2 TV	137	}
d9056ce2 TV	138
d9056ce2 TV	139	static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
	140	{
	141	return 0;
	142	}
	143
	144	static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
	145	{
	146	}
	147
	148
	149	static struct omap_dss_device sdp3430_lcd_device = {
	150	.name = "lcd",
	151	.driver_name = "sharp_ls_panel",
	152	.type = OMAP_DISPLAY_TYPE_DPI,
	153	.phy.dpi.data_lines = 16,
	154	.platform_enable = sdp3430_panel_enable_lcd,
	155	.platform_disable = sdp3430_panel_disable_lcd,
6fdc29e2 SMK	156	};
6fdc29e2 SMK	157
2e6f2ee7	158	static struct tfp410_platform_data dvi_panel = {
e813a55e	159	.power_down_gpio = -1,
ca2e16fa	160	.i2c_bus_num = -1,
89747c91 BW	161	};
89747c91 BW	162
d9056ce2 TV	163	static struct omap_dss_device sdp3430_dvi_device = {
d9056ce2 TV	164	.name = "dvi",
d9056ce2	165	.type = OMAP_DISPLAY_TYPE_DPI,
2e6f2ee7	166	.driver_name = "tfp410",
89747c91	167	.data = &dvi_panel,
d9056ce2	168	.phy.dpi.data_lines = 24,
6fdc29e2 SMK	169	};
6fdc29e2 SMK	170
d9056ce2 TV	171	static struct omap_dss_device sdp3430_tv_device = {
	172	.name = "tv",
	173	.driver_name = "venc",
	174	.type = OMAP_DISPLAY_TYPE_VENC,
	175	.phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
	176	.platform_enable = sdp3430_panel_enable_tv,
	177	.platform_disable = sdp3430_panel_disable_tv,
6fdc29e2 SMK	178	};
6fdc29e2 SMK	179
d9056ce2 TV	180
d9056ce2 TV	181	static struct omap_dss_device *sdp3430_dss_devices[] = {
6fdc29e2	182	&sdp3430_lcd_device,
d9056ce2 TV	183	&sdp3430_dvi_device,
d9056ce2 TV	184	&sdp3430_tv_device,
6fdc29e2 SMK	185	};
6fdc29e2 SMK	186
d9056ce2 TV	187	static struct omap_dss_board_info sdp3430_dss_data = {
	188	.num_devices = ARRAY_SIZE(sdp3430_dss_devices),
	189	.devices = sdp3430_dss_devices,
	190	.default_device = &sdp3430_lcd_device,
	191	};
	192
68ff0423	193	static struct omap2_hsmmc_info mmc[] = {
6fdc29e2 SMK	194	{
	195	.mmc = 1,
	196	/* 8 bits (default) requires S6.3 == ON,
	197	* so the SIM card isn't used; else 4 bits.
	198	*/
3a63833e	199	.caps = MMC_CAP_4_BIT_DATA \| MMC_CAP_8_BIT_DATA,
6fdc29e2	200	.gpio_wp = 4,
3b972bf0	201	.deferred = true,
6fdc29e2 SMK	202	},
	203	{
	204	.mmc = 2,
3a63833e	205	.caps = MMC_CAP_4_BIT_DATA \| MMC_CAP_8_BIT_DATA,
6fdc29e2	206	.gpio_wp = 7,
3b972bf0	207	.deferred = true,
6fdc29e2 SMK	208	},
	209	{} /* Terminator */
	210	};
	211
6fdc29e2 SMK	212	static int sdp3430_twl_gpio_setup(struct device *dev,
	213	unsigned gpio, unsigned ngpio)
	214	{
	215	/* gpio + 0 is "mmc0_cd" (input/IRQ),
	216	* gpio + 1 is "mmc1_cd" (input/IRQ)
	217	*/
	218	mmc[0].gpio_cd = gpio + 0;
	219	mmc[1].gpio_cd = gpio + 1;
3b972bf0	220	omap_hsmmc_late_init(mmc);
6fdc29e2	221
6fdc29e2	222	/* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
bc593f5d	223	gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
6fdc29e2 SMK	224
6fdc29e2 SMK	225	/* gpio + 15 is "sub_lcd_nRST" (output) */
bc593f5d	226	gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
6fdc29e2 SMK	227
	228	return 0;
	229	}
	230
	231	static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
6fdc29e2 SMK	232	.pulldowns = BIT(2) \| BIT(6) \| BIT(8) \| BIT(13)
	233	\| BIT(16) \| BIT(17),
	234	.setup = sdp3430_twl_gpio_setup,
	235	};
	236
73a92aa4 RN	237	/* regulator consumer mappings */
73a92aa4 RN	238
4b087ff8 RN	239	/* ads7846 on SPI */
	240	static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
	241	REGULATOR_SUPPLY("vcc", "spi1.0"),
	242	};
	243
73a92aa4	244	static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
0005ae73	245	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
73a92aa4 RN	246	};
	247
	248	static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
0005ae73	249	REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
73a92aa4 RN	250	};
	251
	252	static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
0005ae73	253	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
73a92aa4 RN	254	};
73a92aa4 RN	255
6fdc29e2 SMK	256	/*
	257	* Apply all the fixed voltages since most versions of U-Boot
	258	* don't bother with that initialization.
	259	*/
	260
	261	/* VAUX1 for mainboard (irda and sub-lcd) */
	262	static struct regulator_init_data sdp3430_vaux1 = {
	263	.constraints = {
	264	.min_uV = 2800000,
	265	.max_uV = 2800000,
	266	.apply_uV = true,
	267	.valid_modes_mask = REGULATOR_MODE_NORMAL
	268	\| REGULATOR_MODE_STANDBY,
	269	.valid_ops_mask = REGULATOR_CHANGE_MODE
	270	\| REGULATOR_CHANGE_STATUS,
	271	},
	272	};
	273
	274	/* VAUX2 for camera module */
	275	static struct regulator_init_data sdp3430_vaux2 = {
	276	.constraints = {
	277	.min_uV = 2800000,
	278	.max_uV = 2800000,
	279	.apply_uV = true,
	280	.valid_modes_mask = REGULATOR_MODE_NORMAL
	281	\| REGULATOR_MODE_STANDBY,
	282	.valid_ops_mask = REGULATOR_CHANGE_MODE
	283	\| REGULATOR_CHANGE_STATUS,
	284	},
	285	};
	286
	287	/* VAUX3 for LCD board */
	288	static struct regulator_init_data sdp3430_vaux3 = {
	289	.constraints = {
	290	.min_uV = 2800000,
	291	.max_uV = 2800000,
	292	.apply_uV = true,
	293	.valid_modes_mask = REGULATOR_MODE_NORMAL
	294	\| REGULATOR_MODE_STANDBY,
	295	.valid_ops_mask = REGULATOR_CHANGE_MODE
	296	\| REGULATOR_CHANGE_STATUS,
	297	},
4b087ff8 RN	298	.num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies),
4b087ff8 RN	299	.consumer_supplies = sdp3430_vaux3_supplies,
6fdc29e2 SMK	300	};
	301
	302	/* VAUX4 for OMAP VDD_CSI2 (camera) */
	303	static struct regulator_init_data sdp3430_vaux4 = {
	304	.constraints = {
	305	.min_uV = 1800000,
	306	.max_uV = 1800000,
	307	.apply_uV = true,
	308	.valid_modes_mask = REGULATOR_MODE_NORMAL
	309	\| REGULATOR_MODE_STANDBY,
	310	.valid_ops_mask = REGULATOR_CHANGE_MODE
	311	\| REGULATOR_CHANGE_STATUS,
	312	},
	313	};
	314
	315	/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
	316	static struct regulator_init_data sdp3430_vmmc1 = {
	317	.constraints = {
	318	.min_uV = 1850000,
	319	.max_uV = 3150000,
	320	.valid_modes_mask = REGULATOR_MODE_NORMAL
	321	\| REGULATOR_MODE_STANDBY,
	322	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
	323	\| REGULATOR_CHANGE_MODE
	324	\| REGULATOR_CHANGE_STATUS,
	325	},
73a92aa4 RN	326	.num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies),
73a92aa4 RN	327	.consumer_supplies = sdp3430_vmmc1_supplies,
6fdc29e2 SMK	328	};
	329
	330	/* VMMC2 for MMC2 card */
	331	static struct regulator_init_data sdp3430_vmmc2 = {
	332	.constraints = {
	333	.min_uV = 1850000,
	334	.max_uV = 1850000,
	335	.apply_uV = true,
	336	.valid_modes_mask = REGULATOR_MODE_NORMAL
	337	\| REGULATOR_MODE_STANDBY,
	338	.valid_ops_mask = REGULATOR_CHANGE_MODE
	339	\| REGULATOR_CHANGE_STATUS,
	340	},
73a92aa4 RN	341	.num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies),
73a92aa4 RN	342	.consumer_supplies = sdp3430_vmmc2_supplies,
6fdc29e2 SMK	343	};
	344
	345	/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
	346	static struct regulator_init_data sdp3430_vsim = {
	347	.constraints = {
	348	.min_uV = 1800000,
	349	.max_uV = 3000000,
	350	.valid_modes_mask = REGULATOR_MODE_NORMAL
	351	\| REGULATOR_MODE_STANDBY,
	352	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
	353	\| REGULATOR_CHANGE_MODE
	354	\| REGULATOR_CHANGE_STATUS,
	355	},
73a92aa4 RN	356	.num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies),
73a92aa4 RN	357	.consumer_supplies = sdp3430_vsim_supplies,
6fdc29e2 SMK	358	};
6fdc29e2 SMK	359
6fdc29e2	360	static struct twl4030_platform_data sdp3430_twldata = {
6fdc29e2	361	/* platform_data for children goes here */
6fdc29e2	362	.gpio = &sdp3430_gpio_data,
6fdc29e2	363	.keypad = &sdp3430_kp_data,
6fdc29e2 SMK	364
	365	.vaux1 = &sdp3430_vaux1,
	366	.vaux2 = &sdp3430_vaux2,
	367	.vaux3 = &sdp3430_vaux3,
	368	.vaux4 = &sdp3430_vaux4,
	369	.vmmc1 = &sdp3430_vmmc1,
	370	.vmmc2 = &sdp3430_vmmc2,
	371	.vsim = &sdp3430_vsim,
6fdc29e2 SMK	372	};
6fdc29e2 SMK	373
6fdc29e2 SMK	374	static int __init omap3430_i2c_init(void)
	375	{
	376	/* i2c1 for PMIC only */
827ed9ae	377	omap3_pmic_get_config(&sdp3430_twldata,
b252b0ef PU	378	TWL_COMMON_PDATA_USB \| TWL_COMMON_PDATA_BCI \|
	379	TWL_COMMON_PDATA_MADC \| TWL_COMMON_PDATA_AUDIO,
	380	TWL_COMMON_REGULATOR_VDAC \| TWL_COMMON_REGULATOR_VPLL2);
	381	sdp3430_twldata.vdac->constraints.apply_uV = true;
	382	sdp3430_twldata.vpll2->constraints.apply_uV = true;
	383	sdp3430_twldata.vpll2->constraints.name = "VDVI";
	384
fbd8071c	385	omap3_pmic_init("twl4030", &sdp3430_twldata);
827ed9ae	386
6fdc29e2 SMK	387	/* i2c2 on camera connector (for sensor control) and optional isp1301 */
	388	omap_register_i2c_bus(2, 400, NULL, 0);
	389	/* i2c3 on display connector (for DVI, tfp410) */
	390	omap_register_i2c_bus(3, 400, NULL, 0);
	391	return 0;
	392	}
	393
1a48e157 TL	394	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	395
	396	static struct omap_smc91x_platform_data board_smc91x_data = {
	397	.cs = 3,
	398	.flags = GPMC_MUX_ADD_DATA \| GPMC_TIMINGS_SMC91C96 \|
	399	IORESOURCE_IRQ_LOWLEVEL,
	400	};
	401
	402	static void __init board_smc91x_init(void)
	403	{
	404	if (omap_rev() > OMAP3430_REV_ES1_0)
	405	board_smc91x_data.gpio_irq = 6;
	406	else
	407	board_smc91x_data.gpio_irq = 29;
	408
	409	gpmc_smc91x_init(&board_smc91x_data);
	410	}
	411
	412	#else
	413
	414	static inline void board_smc91x_init(void)
	415	{
	416	}
	417
	418	#endif
	419
5110b298 RT	420	static void enable_board_wakeup_source(void)
5110b298 RT	421	{
4896e394 TL	422	/* T2 interrupt line (keypad) */
	423	omap_mux_init_signal("sys_nirq",
	424	OMAP_WAKEUP_EN \| OMAP_PIN_INPUT_PULLUP);
5110b298 RT	425	}
5110b298 RT	426
181b250c	427	static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
58a5491c	428
181b250c KM	429	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
	430	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
	431	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
58a5491c FB	432
	433	.phy_reset = true,
	434	.reset_gpio_port[0] = 57,
	435	.reset_gpio_port[1] = 61,
	436	.reset_gpio_port[2] = -EINVAL
	437	};
	438
ca5742bd TL	439	#ifdef CONFIG_OMAP_MUX
	440	static struct omap_board_mux board_mux[] __initdata = {
	441	{ .reg_offset = OMAP_MUX_TERMINATOR },
	442	};
626dda8a S	443	#else
626dda8a S	444	#define board_mux NULL
ca5742bd TL	445	#endif
ca5742bd TL	446
13d6b73c SG	447	/*
	448	* SDP3430 V2 Board CS organization
	449	* Different from SDP3430 V1. Now 4 switches used to specify CS
	450	*
	451	* See also the Switch S8 settings in the comments.
	452	*/
	453	static char chip_sel_3430[][GPMC_CS_NUM] = {
	454	{PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
	455	{PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
	456	{PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
	457	};
	458
88c8460a VS	459	static struct mtd_partition sdp_nor_partitions[] = {
	460	/* bootloader (U-Boot, etc) in first sector */
	461	{
	462	.name = "Bootloader-NOR",
	463	.offset = 0,
	464	.size = SZ_256K,
	465	.mask_flags = MTD_WRITEABLE, /* force read-only */
	466	},
	467	/* bootloader params in the next sector */
	468	{
	469	.name = "Params-NOR",
	470	.offset = MTDPART_OFS_APPEND,
	471	.size = SZ_256K,
	472	.mask_flags = 0,
	473	},
	474	/* kernel */
	475	{
	476	.name = "Kernel-NOR",
	477	.offset = MTDPART_OFS_APPEND,
	478	.size = SZ_2M,
	479	.mask_flags = 0
	480	},
	481	/* file system */
	482	{
	483	.name = "Filesystem-NOR",
	484	.offset = MTDPART_OFS_APPEND,
	485	.size = MTDPART_SIZ_FULL,
	486	.mask_flags = 0
	487	}
	488	};
	489
	490	static struct mtd_partition sdp_onenand_partitions[] = {
	491	{
	492	.name = "X-Loader-OneNAND",
	493	.offset = 0,
	494	.size = 4 * (64 * 2048),
	495	.mask_flags = MTD_WRITEABLE /* force read-only */
	496	},
	497	{
	498	.name = "U-Boot-OneNAND",
	499	.offset = MTDPART_OFS_APPEND,
	500	.size = 2 * (64 * 2048),
	501	.mask_flags = MTD_WRITEABLE /* force read-only */
	502	},
	503	{
	504	.name = "U-Boot Environment-OneNAND",
	505	.offset = MTDPART_OFS_APPEND,
	506	.size = 1 * (64 * 2048),
	507	},
	508	{
	509	.name = "Kernel-OneNAND",
	510	.offset = MTDPART_OFS_APPEND,
	511	.size = 16 * (64 * 2048),
	512	},
	513	{
	514	.name = "File System-OneNAND",
	515	.offset = MTDPART_OFS_APPEND,
	516	.size = MTDPART_SIZ_FULL,
	517	},
	518	};
	519
	520	static struct mtd_partition sdp_nand_partitions[] = {
	521	/* All the partition sizes are listed in terms of NAND block size */
	522	{
523	.name = "X-Loader-NAND",
524	.offset = 0,
525	.size = 4 * (64 * 2048),
526	.mask_flags = MTD_WRITEABLE, /* force read-only */
527	},
528	{
529	.name = "U-Boot-NAND",
530	.offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
531	.size = 10 * (64 * 2048),
532	.mask_flags = MTD_WRITEABLE, /* force read-only */
533	},
534	{
535	.name = "Boot Env-NAND",
536
537	.offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
538	.size = 6 * (64 * 2048),
539	},
540	{
541	.name = "Kernel-NAND",
542	.offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
543	.size = 40 * (64 * 2048),
544	},
545	{
546	.name = "File System - NAND",
547	.size = MTDPART_SIZ_FULL,
548	.offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
549	},
550	};
551
552	static struct flash_partitions sdp_flash_partitions[] = {
553	{
554	.parts = sdp_nor_partitions,
555	.nr_parts = ARRAY_SIZE(sdp_nor_partitions),
556	},
557	{
558	.parts = sdp_onenand_partitions,
559	.nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
560	},
561	{
562	.parts = sdp_nand_partitions,
563	.nr_parts = ARRAY_SIZE(sdp_nand_partitions),
564	},
565	};
566
6fdc29e2 SMK	567	static void __init omap_3430sdp_init(void)
6fdc29e2 SMK	568	{
96974a24 MR	569	int gpio_pendown;
96974a24 MR	570
ca5742bd	571	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
3b972bf0	572	omap_hsmmc_init(mmc);
6fdc29e2	573	omap3430_i2c_init();
d5e13227	574	omap_display_init(&sdp3430_dss_data);
6fdc29e2	575	if (omap_rev() > OMAP3430_REV_ES1_0)
96974a24	576	gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
6fdc29e2	577	else
96974a24 MR	578	gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
96974a24 MR	579	omap_ads7846_init(1, gpio_pendown, 310, NULL);
7496ba30	580	omap_serial_init();
a4ca9dbe	581	omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
9e18630b	582	usb_musb_init(NULL);
1a48e157	583	board_smc91x_init();
d5ce2b65	584	board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
d9056ce2	585	sdp3430_display_init();
5110b298	586	enable_board_wakeup_source();
9e64bb1e	587	usbhs_init(&usbhs_bdata);
6fdc29e2 SMK	588	}
6fdc29e2 SMK	589
6fdc29e2 SMK	590	MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
6fdc29e2 SMK	591	/* Maintainer: Syed Khasim - Texas Instruments Inc */
5e52b435	592	.atag_offset = 0x100,
71ee7dad	593	.reserve = omap_reserve,
3dc3bad6	594	.map_io = omap3_map_io,
8f5b5a41	595	.init_early = omap3430_init_early,
741e3a89	596	.init_irq = omap3_init_irq,
6b2f55d7	597	.handle_irq = omap3_intc_handle_irq,
6fdc29e2	598	.init_machine = omap_3430sdp_init,
bbd707ac	599	.init_late = omap3430_init_late,
6bb27d73	600	.init_time = omap3_sync32k_timer_init,
187e3e06	601	.restart = omap3xxx_restart,
6fdc29e2	602	MACHINE_END