projects / thirdparty / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 78818e47 VW |
1 | /* |
| 2 | * linux/arch/arm/mach-pnx4008/serial.c | |
| 3 | * | |
| 4 | * PNX4008 UART initialization | |
| 5 | * | |
| 6 | * Copyright: MontaVista Software Inc. (c) 2005 | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or modify | |
| 9 | * it under the terms of the GNU General Public License version 2 as | |
| 10 | * published by the Free Software Foundation. | |
| 11 | */ | |
| 12 | ||
| 13 | #include <linux/kernel.h> | |
| 14 | #include <linux/types.h> | |
| fced80c7 | 15 | #include <linux/io.h> |
| 78818e47 | 16 | |
| a09e64fb RK |
17 | #include <mach/platform.h> |
| 18 | #include <mach/hardware.h> | |
| 78818e47 VW |
19 | |
| 20 | #include <linux/serial_core.h> | |
| 21 | #include <linux/serial_reg.h> | |
| a09e64fb | 22 | #include <mach/gpio.h> |
| 78818e47 | 23 | |
| a09e64fb | 24 | #include <mach/clock.h> |
| 78818e47 VW |
25 | |
| 26 | #define UART_3 0 | |
| 27 | #define UART_4 1 | |
| 28 | #define UART_5 2 | |
| 29 | #define UART_6 3 | |
| 30 | #define UART_UNKNOWN (-1) | |
| 31 | ||
| 32 | #define UART3_BASE_VA IO_ADDRESS(PNX4008_UART3_BASE) | |
| 33 | #define UART4_BASE_VA IO_ADDRESS(PNX4008_UART4_BASE) | |
| 34 | #define UART5_BASE_VA IO_ADDRESS(PNX4008_UART5_BASE) | |
| 35 | #define UART6_BASE_VA IO_ADDRESS(PNX4008_UART6_BASE) | |
| 36 | ||
| 37 | #define UART_FCR_OFFSET 8 | |
| 38 | #define UART_FIFO_SIZE 64 | |
| 39 | ||
| 40 | void pnx4008_uart_init(void) | |
| 41 | { | |
| 42 | u32 tmp; | |
| 43 | int i = UART_FIFO_SIZE; | |
| 44 | ||
| 45 | __raw_writel(0xC1, UART5_BASE_VA + UART_FCR_OFFSET); | |
| 46 | __raw_writel(0xC1, UART3_BASE_VA + UART_FCR_OFFSET); | |
| 47 | ||
| 48 | /* Send a NULL to fix the UART HW bug */ | |
| 49 | __raw_writel(0x00, UART5_BASE_VA); | |
| 50 | __raw_writel(0x00, UART3_BASE_VA); | |
| 51 | ||
| 52 | while (i--) { | |
| 53 | tmp = __raw_readl(UART5_BASE_VA); | |
| 54 | tmp = __raw_readl(UART3_BASE_VA); | |
| 55 | } | |
| 56 | __raw_writel(0, UART5_BASE_VA + UART_FCR_OFFSET); | |
| 57 | __raw_writel(0, UART3_BASE_VA + UART_FCR_OFFSET); | |
| 58 | ||
| 59 | /* setup wakeup interrupt */ | |
| 60 | start_int_set_rising_edge(SE_U3_RX_INT); | |
| 61 | start_int_ack(SE_U3_RX_INT); | |
| 62 | start_int_umask(SE_U3_RX_INT); | |
| 63 | ||
| 64 | start_int_set_rising_edge(SE_U5_RX_INT); | |
| 65 | start_int_ack(SE_U5_RX_INT); | |
| 66 | start_int_umask(SE_U5_RX_INT); | |
| 67 | } | |
| 68 |