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Commit | Line | Data |
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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
fafcfc5a | 2 | /* |
40b9d53c | 3 | * arch/arm/include/asm/arch-renesas/r8a7794.h |
fafcfc5a NI |
4 | * |
5 | * Copyright (C) 2014 Renesas Electronics Corporation | |
83d290c5 | 6 | */ |
fafcfc5a NI |
7 | |
8 | #ifndef __ASM_ARCH_R8A7794_H | |
9 | #define __ASM_ARCH_R8A7794_H | |
10 | ||
11 | #include "rcar-base.h" | |
12 | ||
c72dd8ea NI |
13 | /* Module stop control/status register bits */ |
14 | #define MSTP0_BITS 0x00440801 | |
15 | #define MSTP1_BITS 0x936899DA | |
16 | #define MSTP2_BITS 0x100D21FC | |
17 | #define MSTP3_BITS 0xE084D810 | |
18 | #define MSTP4_BITS 0x800001C4 | |
19 | #define MSTP5_BITS 0x40C00044 | |
20 | #define MSTP7_BITS 0x013FE618 | |
21 | #define MSTP8_BITS 0x40803C05 | |
22 | #define MSTP9_BITS 0xFB879FEE | |
23 | #define MSTP10_BITS 0xFFFEFFE0 | |
24 | #define MSTP11_BITS 0x000001C0 | |
25 | ||
72d42bad | 26 | /* SDHI */ |
65cc0e2a | 27 | #define CFG_SYS_SH_SDHI_NR_CHANNEL 3 |
72d42bad | 28 | |
a5aef732 NI |
29 | #define R8A7794_CUT_ES2 2 |
30 | #define IS_R8A7794_ES2() \ | |
ca40ed6d | 31 | (renesas_get_cpu_rev_integer() == R8A7794_CUT_ES2) |
a5aef732 | 32 | |
fafcfc5a | 33 | #endif /* __ASM_ARCH_R8A7794_H */ |