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168eef7a KY |
1 | /* |
2 | * (C) Copyright 2017 Rockchip Electronics Co., Ltd | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #include <common.h> | |
8 | #include <debug_uart.h> | |
9 | #include <dm.h> | |
10 | #include <ram.h> | |
11 | #include <spl.h> | |
12 | #include <asm/io.h> | |
13 | #include <asm/arch/bootrom.h> | |
14 | #include <asm/arch/cru_rk322x.h> | |
15 | #include <asm/arch/grf_rk322x.h> | |
16 | #include <asm/arch/hardware.h> | |
17 | #include <asm/arch/timer.h> | |
18 | #include <asm/arch/uart.h> | |
19 | ||
20 | u32 spl_boot_device(void) | |
21 | { | |
22 | return BOOT_DEVICE_MMC1; | |
23 | } | |
24 | DECLARE_GLOBAL_DATA_PTR; | |
25 | ||
26 | #define GRF_BASE 0x11000000 | |
27 | #define SGRF_BASE 0x10140000 | |
28 | ||
29 | #define DEBUG_UART_BASE 0x11030000 | |
30 | ||
31 | void board_debug_uart_init(void) | |
32 | { | |
33 | static struct rk322x_grf * const grf = (void *)GRF_BASE; | |
34 | /* Enable early UART2 channel 1 on the RK322x */ | |
35 | rk_clrsetreg(&grf->gpio1b_iomux, | |
36 | GPIO1B1_MASK | GPIO1B2_MASK, | |
37 | GPIO1B2_UART21_SIN << GPIO1B2_SHIFT | | |
38 | GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT); | |
39 | /* Set channel C as UART2 input */ | |
40 | rk_clrsetreg(&grf->con_iomux, | |
41 | CON_IOMUX_UART2SEL_MASK, | |
42 | CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT); | |
43 | } | |
18d38d3a KY |
44 | |
45 | #define SGRF_DDR_CON0 0x10150000 | |
168eef7a KY |
46 | void board_init_f(ulong dummy) |
47 | { | |
48 | struct udevice *dev; | |
49 | int ret; | |
50 | ||
51 | /* | |
52 | * Debug UART can be used from here if required: | |
53 | * | |
54 | * debug_uart_init(); | |
55 | * printch('a'); | |
56 | * printhex8(0x1234); | |
57 | * printascii("string"); | |
58 | */ | |
59 | debug_uart_init(); | |
60 | printascii("SPL Init"); | |
61 | ||
62 | ret = spl_early_init(); | |
63 | if (ret) { | |
64 | debug("spl_early_init() failed: %d\n", ret); | |
65 | hang(); | |
66 | } | |
67 | ||
68 | rockchip_timer_init(); | |
69 | printf("timer init done\n"); | |
70 | ret = uclass_get_device(UCLASS_RAM, 0, &dev); | |
71 | if (ret) { | |
72 | printf("DRAM init failed: %d\n", ret); | |
73 | return; | |
74 | } | |
75 | ||
18d38d3a KY |
76 | /* Disable the ddr secure region setting to make it non-secure */ |
77 | rk_clrreg(SGRF_DDR_CON0, 0x4000); | |
168eef7a KY |
78 | #if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) |
79 | back_to_bootrom(); | |
80 | #endif | |
81 | } |