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1 | /* linux/arch/arm/mach-s3c2410/bast-irq.c |
2 | * | |
bafa49cc | 3 | * Copyright (c) 2003,2005 Simtec Electronics |
1da177e4 LT |
4 | * Ben Dooks <ben@simtec.co.uk> |
5 | * | |
6 | * http://www.simtec.co.uk/products/EB2410ITX/ | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
bafa49cc | 21 | */ |
1da177e4 LT |
22 | |
23 | ||
24 | #include <linux/init.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/ioport.h> | |
1da177e4 | 27 | #include <linux/sysdev.h> |
fced80c7 | 28 | #include <linux/io.h> |
1da177e4 | 29 | |
bafa49cc BD |
30 | #include <asm/mach-types.h> |
31 | ||
a09e64fb | 32 | #include <mach/hardware.h> |
1da177e4 | 33 | #include <asm/irq.h> |
1da177e4 LT |
34 | |
35 | #include <asm/mach/irq.h> | |
bafa49cc | 36 | |
a09e64fb RK |
37 | #include <mach/regs-irq.h> |
38 | #include <mach/bast-map.h> | |
39 | #include <mach/bast-irq.h> | |
bafa49cc | 40 | |
a21765a7 | 41 | #include <asm/plat-s3c24xx/irq.h> |
1da177e4 LT |
42 | |
43 | #if 0 | |
44 | #include <asm/debug-ll.h> | |
45 | #endif | |
46 | ||
47 | #define irqdbf(x...) | |
48 | #define irqdbf2(x...) | |
49 | ||
50 | ||
51 | /* handle PC104 ISA interrupts from the system CPLD */ | |
52 | ||
53 | /* table of ISA irq nos to the relevant mask... zero means | |
54 | * the irq is not implemented | |
55 | */ | |
56 | static unsigned char bast_pc104_irqmasks[] = { | |
57 | 0, /* 0 */ | |
58 | 0, /* 1 */ | |
59 | 0, /* 2 */ | |
60 | 1, /* 3 */ | |
61 | 0, /* 4 */ | |
62 | 2, /* 5 */ | |
63 | 0, /* 6 */ | |
64 | 4, /* 7 */ | |
65 | 0, /* 8 */ | |
66 | 0, /* 9 */ | |
67 | 8, /* 10 */ | |
68 | 0, /* 11 */ | |
69 | 0, /* 12 */ | |
70 | 0, /* 13 */ | |
71 | 0, /* 14 */ | |
72 | 0, /* 15 */ | |
73 | }; | |
74 | ||
75 | static unsigned char bast_pc104_irqs[] = { 3, 5, 7, 10 }; | |
76 | ||
77 | static void | |
78 | bast_pc104_mask(unsigned int irqno) | |
79 | { | |
80 | unsigned long temp; | |
81 | ||
82 | temp = __raw_readb(BAST_VA_PC104_IRQMASK); | |
83 | temp &= ~bast_pc104_irqmasks[irqno]; | |
84 | __raw_writeb(temp, BAST_VA_PC104_IRQMASK); | |
1da177e4 LT |
85 | } |
86 | ||
87 | static void | |
bafa49cc | 88 | bast_pc104_maskack(unsigned int irqno) |
1da177e4 | 89 | { |
10dd5ce2 | 90 | struct irq_desc *desc = irq_desc + IRQ_ISA; |
bafa49cc BD |
91 | |
92 | bast_pc104_mask(irqno); | |
93 | desc->chip->ack(IRQ_ISA); | |
1da177e4 LT |
94 | } |
95 | ||
96 | static void | |
97 | bast_pc104_unmask(unsigned int irqno) | |
98 | { | |
99 | unsigned long temp; | |
100 | ||
101 | temp = __raw_readb(BAST_VA_PC104_IRQMASK); | |
102 | temp |= bast_pc104_irqmasks[irqno]; | |
103 | __raw_writeb(temp, BAST_VA_PC104_IRQMASK); | |
1da177e4 LT |
104 | } |
105 | ||
10dd5ce2 | 106 | static struct irq_chip bast_pc104_chip = { |
1da177e4 LT |
107 | .mask = bast_pc104_mask, |
108 | .unmask = bast_pc104_unmask, | |
bafa49cc | 109 | .ack = bast_pc104_maskack |
1da177e4 LT |
110 | }; |
111 | ||
112 | static void | |
113 | bast_irq_pc104_demux(unsigned int irq, | |
10dd5ce2 | 114 | struct irq_desc *desc) |
1da177e4 LT |
115 | { |
116 | unsigned int stat; | |
117 | unsigned int irqno; | |
118 | int i; | |
119 | ||
120 | stat = __raw_readb(BAST_VA_PC104_IRQREQ) & 0xf; | |
121 | ||
bafa49cc BD |
122 | if (unlikely(stat == 0)) { |
123 | /* ack if we get an irq with nothing (ie, startup) */ | |
124 | ||
125 | desc = irq_desc + IRQ_ISA; | |
126 | desc->chip->ack(IRQ_ISA); | |
127 | } else { | |
128 | /* handle the IRQ */ | |
129 | ||
130 | for (i = 0; stat != 0; i++, stat >>= 1) { | |
131 | if (stat & 1) { | |
132 | irqno = bast_pc104_irqs[i]; | |
544b46de | 133 | desc = irq_desc + irqno; |
0cd61b68 | 134 | desc_handle_irq(irqno, desc); |
bafa49cc | 135 | } |
1da177e4 | 136 | } |
bafa49cc BD |
137 | } |
138 | } | |
1da177e4 | 139 | |
bafa49cc BD |
140 | static __init int bast_irq_init(void) |
141 | { | |
142 | unsigned int i; | |
143 | ||
144 | if (machine_is_bast()) { | |
145 | printk(KERN_INFO "BAST PC104 IRQ routing, (c) 2005 Simtec Electronics\n"); | |
146 | ||
147 | /* zap all the IRQs */ | |
148 | ||
149 | __raw_writeb(0x0, BAST_VA_PC104_IRQMASK); | |
150 | ||
151 | set_irq_chained_handler(IRQ_ISA, bast_irq_pc104_demux); | |
152 | ||
544b46de | 153 | /* register our IRQs */ |
bafa49cc BD |
154 | |
155 | for (i = 0; i < 4; i++) { | |
156 | unsigned int irqno = bast_pc104_irqs[i]; | |
157 | ||
158 | set_irq_chip(irqno, &bast_pc104_chip); | |
10dd5ce2 | 159 | set_irq_handler(irqno, handle_level_irq); |
bafa49cc BD |
160 | set_irq_flags(irqno, IRQF_VALID); |
161 | } | |
1da177e4 | 162 | } |
bafa49cc BD |
163 | |
164 | return 0; | |
1da177e4 | 165 | } |
bafa49cc BD |
166 | |
167 | arch_initcall(bast_irq_init); |