]>
Commit | Line | Data |
---|---|---|
ddd960e6 MY |
1 | if TEGRA |
2 | ||
53b5bf3c SG |
3 | config SPL_GPIO_SUPPORT |
4 | default y | |
5 | ||
77d2f7f5 SG |
6 | config SPL_LIBCOMMON_SUPPORT |
7 | default y | |
8 | ||
cc4288ef SG |
9 | config SPL_LIBGENERIC_SUPPORT |
10 | default y | |
11 | ||
e00f76ce SG |
12 | config SPL_SERIAL_SUPPORT |
13 | default y | |
14 | ||
49626ea8 SW |
15 | config TEGRA_IVC |
16 | bool "Tegra IVC protocol" | |
17 | help | |
18 | IVC (Inter-VM Communication) protocol is a Tegra-specific IPC | |
19 | (Inter Processor Communication) framework. Within the context of | |
20 | U-Boot, it is typically used for communication between the main CPU | |
21 | and various auxiliary processors. | |
22 | ||
15bcc62d SW |
23 | config TEGRA_COMMON |
24 | bool "Tegra common options" | |
140a9eaf | 25 | select CLK |
56079ecc | 26 | select DM |
96350f72 | 27 | select DM_ETH |
56079ecc | 28 | select DM_GPIO |
15bcc62d | 29 | select DM_I2C |
f77f5e9b | 30 | select DM_KEYBOARD |
6a474db4 | 31 | select DM_MMC |
91c08afe | 32 | select DM_PWM |
140a9eaf | 33 | select DM_RESET |
15bcc62d SW |
34 | select DM_SERIAL |
35 | select DM_SPI | |
36 | select DM_SPI_FLASH | |
140a9eaf | 37 | select MISC |
15bcc62d | 38 | select OF_CONTROL |
d6ef8a61 | 39 | select VIDCONSOLE_AS_LCD if DM_VIDEO |
a5d67547 | 40 | select BOARD_EARLY_INIT_F |
221a949e | 41 | imply CRC32_VERIFY |
15bcc62d | 42 | |
140a9eaf SW |
43 | config TEGRA_NO_BPMP |
44 | bool "Tegra common options for SoCs without BPMP" | |
45 | select TEGRA_CAR | |
46 | select TEGRA_CAR_CLOCK | |
47 | select TEGRA_CAR_RESET | |
48 | ||
15bcc62d SW |
49 | config TEGRA_ARMV7_COMMON |
50 | bool "Tegra 32-bit common options" | |
51 | select CPU_V7 | |
52 | select SPL | |
0680f1b1 | 53 | select SPL_BOARD_INIT if SPL |
15bcc62d SW |
54 | select SUPPORT_SPL |
55 | select TEGRA_COMMON | |
601800be | 56 | select TEGRA_GPIO |
140a9eaf | 57 | select TEGRA_NO_BPMP |
15bcc62d SW |
58 | |
59 | config TEGRA_ARMV8_COMMON | |
60 | bool "Tegra 64-bit common options" | |
61 | select ARM64 | |
62 | select TEGRA_COMMON | |
56079ecc | 63 | |
ddd960e6 MY |
64 | choice |
65 | prompt "Tegra SoC select" | |
a26cd049 | 66 | optional |
ddd960e6 MY |
67 | |
68 | config TEGRA20 | |
69 | bool "Tegra20 family" | |
8dda2e2f TR |
70 | select ARM_ERRATA_716044 |
71 | select ARM_ERRATA_742230 | |
72 | select ARM_ERRATA_751472 | |
56079ecc | 73 | select TEGRA_ARMV7_COMMON |
ddd960e6 MY |
74 | |
75 | config TEGRA30 | |
76 | bool "Tegra30 family" | |
8dda2e2f TR |
77 | select ARM_ERRATA_743622 |
78 | select ARM_ERRATA_751472 | |
56079ecc | 79 | select TEGRA_ARMV7_COMMON |
ddd960e6 MY |
80 | |
81 | config TEGRA114 | |
82 | bool "Tegra114 family" | |
56079ecc | 83 | select TEGRA_ARMV7_COMMON |
ddd960e6 MY |
84 | |
85 | config TEGRA124 | |
86 | bool "Tegra124 family" | |
56079ecc | 87 | select TEGRA_ARMV7_COMMON |
ddd960e6 | 88 | |
7aaa5a60 TW |
89 | config TEGRA210 |
90 | bool "Tegra210 family" | |
601800be | 91 | select TEGRA_GPIO |
15bcc62d | 92 | select TEGRA_ARMV8_COMMON |
140a9eaf | 93 | select TEGRA_NO_BPMP |
7aaa5a60 | 94 | |
c7ba99c8 SW |
95 | config TEGRA186 |
96 | bool "Tegra186 family" | |
0f67e239 | 97 | select DM_MAILBOX |
73dd5c4c | 98 | select TEGRA186_BPMP |
d9fd7008 | 99 | select TEGRA186_CLOCK |
c7ba99c8 | 100 | select TEGRA186_GPIO |
4dd99d14 | 101 | select TEGRA186_RESET |
c7ba99c8 | 102 | select TEGRA_ARMV8_COMMON |
0f67e239 | 103 | select TEGRA_HSP |
49626ea8 | 104 | select TEGRA_IVC |
c7ba99c8 | 105 | |
ddd960e6 MY |
106 | endchoice |
107 | ||
dd8204de SW |
108 | config TEGRA_DISCONNECT_UDC_ON_BOOT |
109 | bool "Disconnect USB device mode controller on boot" | |
110 | default y | |
111 | help | |
112 | When loading U-Boot into RAM over USB protocols using tools such as | |
113 | tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device | |
114 | mode controller is initialized and enumerated by the host PC running | |
115 | the tool. Unfortunately, these tools do not shut down the USB | |
116 | controller before executing the downloaded code, and so the host PC | |
117 | does not "de-enumerate" the USB device. This option shuts down the | |
118 | USB controller when U-Boot boots to avoid leaving a stale USB device | |
119 | present. | |
120 | ||
b724bd7d SG |
121 | config SYS_MALLOC_F_LEN |
122 | default 0x1800 | |
123 | ||
09f455dc MY |
124 | source "arch/arm/mach-tegra/tegra20/Kconfig" |
125 | source "arch/arm/mach-tegra/tegra30/Kconfig" | |
126 | source "arch/arm/mach-tegra/tegra114/Kconfig" | |
127 | source "arch/arm/mach-tegra/tegra124/Kconfig" | |
7aaa5a60 | 128 | source "arch/arm/mach-tegra/tegra210/Kconfig" |
c7ba99c8 | 129 | source "arch/arm/mach-tegra/tegra186/Kconfig" |
ddd960e6 | 130 | |
42e6f852 SG |
131 | config CMD_ENTERRCM |
132 | bool "Enable 'enterrcm' command" | |
133 | default y | |
134 | help | |
135 | Tegra's boot ROM supports a mode whereby code may be downloaded and | |
136 | flash-programmed over a USB connection. On dev boards, this is | |
137 | typically entered by holding down a "force recovery" button and | |
138 | resetting the CPU. However, not all boards have such a button (one | |
139 | example is the Compulab Trimslice), so a method to enter RCM from | |
140 | software is useful. | |
141 | ||
142 | Even on boards other than Trimslice, controlling this over a UART | |
143 | may be useful, e.g. to allow simple remote control without the need | |
144 | for mechanical button actuators, or hooking up relays/... to the | |
145 | button. | |
146 | ||
ddd960e6 | 147 | endif |