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Commit | Line | Data |
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019df879 MY |
1 | /* |
2 | * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #include <common.h> | |
8 | #include <spl.h> | |
9 | #include <linux/io.h> | |
107b3fb4 MY |
10 | |
11 | #include "../init.h" | |
12 | #include "../sc-regs.h" | |
019df879 | 13 | |
5b660066 | 14 | int uniphier_pxs2_early_clk_init(const struct uniphier_board_data *bd) |
019df879 MY |
15 | { |
16 | u32 tmp; | |
17 | ||
18 | /* deassert reset */ | |
19 | if (spl_boot_device() != BOOT_DEVICE_NAND) { | |
20 | tmp = readl(SC_RSTCTRL); | |
21 | tmp &= ~SC_RSTCTRL_NRST_NAND; | |
22 | writel(tmp, SC_RSTCTRL); | |
23 | }; | |
24 | ||
25 | tmp = readl(SC_RSTCTRL4); | |
26 | tmp |= SC_RSTCTRL4_NRST_UMCSB | SC_RSTCTRL4_NRST_UMCA2 | | |
27 | SC_RSTCTRL4_NRST_UMCA1 | SC_RSTCTRL4_NRST_UMCA0 | | |
28 | SC_RSTCTRL4_NRST_UMC32 | SC_RSTCTRL4_NRST_UMC31 | | |
29 | SC_RSTCTRL4_NRST_UMC30; | |
30 | writel(tmp, SC_RSTCTRL4); | |
31 | readl(SC_RSTCTRL4); /* dummy read */ | |
32 | ||
67976306 | 33 | /* provide clocks */ |
019df879 MY |
34 | tmp = readl(SC_CLKCTRL); |
35 | tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; | |
36 | writel(tmp, SC_CLKCTRL); | |
37 | ||
38 | tmp = readl(SC_CLKCTRL4); | |
39 | tmp |= SC_CLKCTRL4_CEN_UMCSB | SC_CLKCTRL4_CEN_UMC2 | | |
40 | SC_CLKCTRL4_CEN_UMC1 | SC_CLKCTRL4_CEN_UMC0; | |
41 | writel(tmp, SC_CLKCTRL4); | |
42 | readl(SC_CLKCTRL4); /* dummy read */ | |
43 | ||
44 | return 0; | |
45 | } |