[thirdparty/linux.git] / arch / arm / plat-s3c24xx / gpio.c

/* linux/arch/arm/plat-s3c24xx/gpio.c
 *
 * Copyright (c) 2004-2005 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *
 * S3C24XX GPIO support
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*/


#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/io.h>

#include <mach/hardware.h>
#include <asm/irq.h>

#include <mach/regs-gpio.h>

void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
{
	void __iomem *base = S3C24XX_GPIO_BASE(pin);
	unsigned long mask;
	unsigned long con;
	unsigned long flags;

	if (pin < S3C2410_GPIO_BANKB) {
		mask = 1 << S3C2410_GPIO_OFFSET(pin);
	} else {
		mask = 3 << S3C2410_GPIO_OFFSET(pin)*2;
	}

	switch (function) {
	case S3C2410_GPIO_LEAVE:
		mask = 0;
		function = 0;
		break;

	case S3C2410_GPIO_INPUT:
	case S3C2410_GPIO_OUTPUT:
	case S3C2410_GPIO_SFN2:
	case S3C2410_GPIO_SFN3:
		if (pin < S3C2410_GPIO_BANKB) {
			function -= 1;
			function &= 1;
			function <<= S3C2410_GPIO_OFFSET(pin);
		} else {
			function &= 3;
			function <<= S3C2410_GPIO_OFFSET(pin)*2;
		}
	}

	/* modify the specified register wwith IRQs off */

	local_irq_save(flags);

	con  = __raw_readl(base + 0x00);
	con &= ~mask;
	con |= function;

	__raw_writel(con, base + 0x00);

	local_irq_restore(flags);
}

EXPORT_SYMBOL(s3c2410_gpio_cfgpin);

unsigned int s3c2410_gpio_getcfg(unsigned int pin)
{
	void __iomem *base = S3C24XX_GPIO_BASE(pin);
	unsigned long val = __raw_readl(base);

	if (pin < S3C2410_GPIO_BANKB) {
		val >>= S3C2410_GPIO_OFFSET(pin);
		val &= 1;
		val += 1;
	} else {
		val >>= S3C2410_GPIO_OFFSET(pin)*2;
		val &= 3;
	}

	return val | S3C2410_GPIO_INPUT;
}

EXPORT_SYMBOL(s3c2410_gpio_getcfg);

void s3c2410_gpio_pullup(unsigned int pin, unsigned int to)
{
	void __iomem *base = S3C24XX_GPIO_BASE(pin);
	unsigned long offs = S3C2410_GPIO_OFFSET(pin);
	unsigned long flags;
	unsigned long up;

	if (pin < S3C2410_GPIO_BANKB)
		return;

	local_irq_save(flags);

	up = __raw_readl(base + 0x08);
	up &= ~(1L << offs);
	up |= to << offs;
	__raw_writel(up, base + 0x08);

	local_irq_restore(flags);
}

EXPORT_SYMBOL(s3c2410_gpio_pullup);

int s3c2410_gpio_getpull(unsigned int pin)
{
	void __iomem *base = S3C24XX_GPIO_BASE(pin);
	unsigned long offs = S3C2410_GPIO_OFFSET(pin);

	if (pin < S3C2410_GPIO_BANKB)
		return -EINVAL;

	return (__raw_readl(base + 0x08) & (1L << offs)) ? 1 : 0;
}

EXPORT_SYMBOL(s3c2410_gpio_getpull);

void s3c2410_gpio_setpin(unsigned int pin, unsigned int to)
{
	void __iomem *base = S3C24XX_GPIO_BASE(pin);
	unsigned long offs = S3C2410_GPIO_OFFSET(pin);
	unsigned long flags;
	unsigned long dat;

	local_irq_save(flags);

	dat = __raw_readl(base + 0x04);
	dat &= ~(1 << offs);
	dat |= to << offs;
	__raw_writel(dat, base + 0x04);

	local_irq_restore(flags);
}

EXPORT_SYMBOL(s3c2410_gpio_setpin);

unsigned int s3c2410_gpio_getpin(unsigned int pin)
{
	void __iomem *base = S3C24XX_GPIO_BASE(pin);
	unsigned long offs = S3C2410_GPIO_OFFSET(pin);

	return __raw_readl(base + 0x04) & (1<< offs);
}

EXPORT_SYMBOL(s3c2410_gpio_getpin);

unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change)
{
	unsigned long flags;
	unsigned long misccr;

	local_irq_save(flags);
	misccr = __raw_readl(S3C24XX_MISCCR);
	misccr &= ~clear;
	misccr ^= change;
	__raw_writel(misccr, S3C24XX_MISCCR);
	local_irq_restore(flags);

	return misccr;
}

EXPORT_SYMBOL(s3c2410_modify_misccr);

int s3c2410_gpio_getirq(unsigned int pin)
{
	if (pin < S3C2410_GPF0 || pin > S3C2410_GPG15)
		return -1;	/* not valid interrupts */

	if (pin < S3C2410_GPG0 && pin > S3C2410_GPF7)
		return -1;	/* not valid pin */

	if (pin < S3C2410_GPF4)
		return (pin - S3C2410_GPF0) + IRQ_EINT0;

	if (pin < S3C2410_GPG0)
		return (pin - S3C2410_GPF4) + IRQ_EINT4;

	return (pin - S3C2410_GPG0) + IRQ_EINT8;
}

EXPORT_SYMBOL(s3c2410_gpio_getirq);

int s3c2410_gpio_irq2pin(unsigned int irq)
{
	if (irq >= IRQ_EINT0 && irq <= IRQ_EINT3)
		return S3C2410_GPF0 + (irq - IRQ_EINT0);

	if (irq >= IRQ_EINT4 && irq <= IRQ_EINT7)
		return S3C2410_GPF4 + (irq - IRQ_EINT4);

	if (irq >= IRQ_EINT8 && irq <= IRQ_EINT23)
		return S3C2410_GPG0 + (irq - IRQ_EINT8);

	return -EINVAL;
}

EXPORT_SYMBOL(s3c2410_gpio_irq2pin);
Commit	Line	Data
a21765a7 BD	1	/* linux/arch/arm/plat-s3c24xx/gpio.c
	2	*
	3	* Copyright (c) 2004-2005 Simtec Electronics
	4	* Ben Dooks <ben@simtec.co.uk>
	5	*
	6	* S3C24XX GPIO support
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	21	*/
	22
	23
	24	#include <linux/kernel.h>
	25	#include <linux/init.h>
	26	#include <linux/module.h>
	27	#include <linux/interrupt.h>
	28	#include <linux/ioport.h>
fced80c7	29	#include <linux/io.h>
a21765a7	30
a09e64fb	31	#include <mach/hardware.h>
a21765a7	32	#include <asm/irq.h>
a21765a7	33
a09e64fb	34	#include <mach/regs-gpio.h>
a21765a7 BD	35
	36	void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
	37	{
	38	void __iomem *base = S3C24XX_GPIO_BASE(pin);
	39	unsigned long mask;
	40	unsigned long con;
	41	unsigned long flags;
	42
	43	if (pin < S3C2410_GPIO_BANKB) {
	44	mask = 1 << S3C2410_GPIO_OFFSET(pin);
	45	} else {
	46	mask = 3 << S3C2410_GPIO_OFFSET(pin)*2;
	47	}
	48
	49	switch (function) {
	50	case S3C2410_GPIO_LEAVE:
	51	mask = 0;
	52	function = 0;
	53	break;
	54
	55	case S3C2410_GPIO_INPUT:
	56	case S3C2410_GPIO_OUTPUT:
	57	case S3C2410_GPIO_SFN2:
	58	case S3C2410_GPIO_SFN3:
	59	if (pin < S3C2410_GPIO_BANKB) {
	60	function -= 1;
	61	function &= 1;
	62	function <<= S3C2410_GPIO_OFFSET(pin);
	63	} else {
	64	function &= 3;
	65	function <<= S3C2410_GPIO_OFFSET(pin)*2;
	66	}
	67	}
	68
	69	/* modify the specified register wwith IRQs off */
	70
	71	local_irq_save(flags);
	72
	73	con = __raw_readl(base + 0x00);
	74	con &= ~mask;
	75	con \|= function;
	76
	77	__raw_writel(con, base + 0x00);
	78
	79	local_irq_restore(flags);
	80	}
	81
	82	EXPORT_SYMBOL(s3c2410_gpio_cfgpin);
	83
	84	unsigned int s3c2410_gpio_getcfg(unsigned int pin)
	85	{
	86	void __iomem *base = S3C24XX_GPIO_BASE(pin);
	87	unsigned long val = __raw_readl(base);
	88
	89	if (pin < S3C2410_GPIO_BANKB) {
	90	val >>= S3C2410_GPIO_OFFSET(pin);
	91	val &= 1;
	92	val += 1;
	93	} else {
	94	val >>= S3C2410_GPIO_OFFSET(pin)*2;
	95	val &= 3;
	96	}
	97
	98	return val \| S3C2410_GPIO_INPUT;
99	}
100
101	EXPORT_SYMBOL(s3c2410_gpio_getcfg);
102
103	void s3c2410_gpio_pullup(unsigned int pin, unsigned int to)
104	{
105	void __iomem *base = S3C24XX_GPIO_BASE(pin);
106	unsigned long offs = S3C2410_GPIO_OFFSET(pin);
107	unsigned long flags;
108	unsigned long up;
109
110	if (pin < S3C2410_GPIO_BANKB)
111	return;
112
113	local_irq_save(flags);
114
115	up = __raw_readl(base + 0x08);
116	up &= ~(1L << offs);
117	up \|= to << offs;
118	__raw_writel(up, base + 0x08);
119
120	local_irq_restore(flags);
121	}
122
123	EXPORT_SYMBOL(s3c2410_gpio_pullup);
124
bb6d9b56 BD	125	int s3c2410_gpio_getpull(unsigned int pin)
	126	{
	127	void __iomem *base = S3C24XX_GPIO_BASE(pin);
	128	unsigned long offs = S3C2410_GPIO_OFFSET(pin);
	129
	130	if (pin < S3C2410_GPIO_BANKB)
	131	return -EINVAL;
	132
	133	return (__raw_readl(base + 0x08) & (1L << offs)) ? 1 : 0;
	134	}
	135
	136	EXPORT_SYMBOL(s3c2410_gpio_getpull);
	137
a21765a7 BD	138	void s3c2410_gpio_setpin(unsigned int pin, unsigned int to)
	139	{
	140	void __iomem *base = S3C24XX_GPIO_BASE(pin);
	141	unsigned long offs = S3C2410_GPIO_OFFSET(pin);
	142	unsigned long flags;
	143	unsigned long dat;
	144
	145	local_irq_save(flags);
	146
	147	dat = __raw_readl(base + 0x04);
	148	dat &= ~(1 << offs);
	149	dat \|= to << offs;
	150	__raw_writel(dat, base + 0x04);
	151
	152	local_irq_restore(flags);
	153	}
	154
	155	EXPORT_SYMBOL(s3c2410_gpio_setpin);
	156
	157	unsigned int s3c2410_gpio_getpin(unsigned int pin)
	158	{
	159	void __iomem *base = S3C24XX_GPIO_BASE(pin);
	160	unsigned long offs = S3C2410_GPIO_OFFSET(pin);
	161
	162	return __raw_readl(base + 0x04) & (1<< offs);
	163	}
	164
	165	EXPORT_SYMBOL(s3c2410_gpio_getpin);
	166
	167	unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change)
	168	{
	169	unsigned long flags;
	170	unsigned long misccr;
	171
	172	local_irq_save(flags);
	173	misccr = __raw_readl(S3C24XX_MISCCR);
	174	misccr &= ~clear;
	175	misccr ^= change;
	176	__raw_writel(misccr, S3C24XX_MISCCR);
	177	local_irq_restore(flags);
	178
	179	return misccr;
	180	}
	181
	182	EXPORT_SYMBOL(s3c2410_modify_misccr);
	183
	184	int s3c2410_gpio_getirq(unsigned int pin)
	185	{
	186	if (pin < S3C2410_GPF0 \|\| pin > S3C2410_GPG15)
	187	return -1; /* not valid interrupts */
	188
	189	if (pin < S3C2410_GPG0 && pin > S3C2410_GPF7)
	190	return -1; /* not valid pin */
	191
	192	if (pin < S3C2410_GPF4)
	193	return (pin - S3C2410_GPF0) + IRQ_EINT0;
	194
	195	if (pin < S3C2410_GPG0)
	196	return (pin - S3C2410_GPF4) + IRQ_EINT4;
	197
	198	return (pin - S3C2410_GPG0) + IRQ_EINT8;
	199	}
	200
	201	EXPORT_SYMBOL(s3c2410_gpio_getirq);
c27cb681 BD	202
	203	int s3c2410_gpio_irq2pin(unsigned int irq)
	204	{
	205	if (irq >= IRQ_EINT0 && irq <= IRQ_EINT3)
	206	return S3C2410_GPF0 + (irq - IRQ_EINT0);
	207
	208	if (irq >= IRQ_EINT4 && irq <= IRQ_EINT7)
	209	return S3C2410_GPF4 + (irq - IRQ_EINT4);
	210
	211	if (irq >= IRQ_EINT8 && irq <= IRQ_EINT23)
	212	return S3C2410_GPG0 + (irq - IRQ_EINT8);
	213
	214	return -EINVAL;
	215	}
	216
	217	EXPORT_SYMBOL(s3c2410_gpio_irq2pin);