projects / thirdparty / kernel / stable.git / blame
| Commit | Line | Data |
|---|---|---|
| eed6b3eb OJ |
1 | menu "Platform selection" |
| 2 | ||
| c88cc3ee AF |
3 | config ARCH_ACTIONS |
| 4 | bool "Actions Semi Platforms" | |
| 5 | select OWL_TIMER | |
| e0c27a10 | 6 | select PINCTRL |
| c88cc3ee AF |
7 | help |
| 8 | This enables support for the Actions Semiconductor S900 SoC family. | |
| 9 | ||
| ce3dd55b AP |
10 | config ARCH_SUNXI |
| 11 | bool "Allwinner sunxi 64-bit SoC Family" | |
| 900a9020 | 12 | select ARCH_HAS_RESET_CONTROLLER |
| 23485482 | 13 | select GENERIC_IRQ_CHIP |
| d229d205 | 14 | select PINCTRL |
| 900a9020 | 15 | select RESET_CONTROLLER |
| ce3dd55b AP |
16 | help |
| 17 | This enables support for Allwinner sunxi based SoCs like the A64. | |
| 18 | ||
| e2f0abaf AT |
19 | config ARCH_ALPINE |
| 20 | bool "Annapurna Labs Alpine platform" | |
| 5a3f75a4 | 21 | select ALPINE_MSI if PCI |
| e2f0abaf AT |
22 | help |
| 23 | This enables support for the Annapurna Labs Alpine | |
| 24 | Soc family. | |
| 25 | ||
| 628d30d1 EA |
26 | config ARCH_BCM2835 |
| 27 | bool "Broadcom BCM2835 family" | |
| bb0eb050 | 28 | select TIMER_OF |
| da9a1c67 | 29 | select GPIOLIB |
| 628d30d1 EA |
30 | select PINCTRL |
| 31 | select PINCTRL_BCM2835 | |
| 32 | select ARM_AMBA | |
| 33 | select ARM_TIMER_SP804 | |
| 34 | select HAVE_ARM_ARCH_TIMER | |
| 35 | help | |
| 36 | This enables support for the Broadcom BCM2837 SoC. | |
| 37 | This SoC is used in the Raspberry Pi 3 device. | |
| 38 | ||
| 36b7c583 RJ |
39 | config ARCH_BCM_IPROC |
| 40 | bool "Broadcom iProc SoC Family" | |
| 382618bb | 41 | select COMMON_CLK_IPROC |
| da9a1c67 | 42 | select GPIOLIB |
| 382618bb | 43 | select PINCTRL |
| 36b7c583 RJ |
44 | help |
| 45 | This enables support for Broadcom iProc based SoCs | |
| 46 | ||
| dd40fd92 JZ |
47 | config ARCH_BERLIN |
| 48 | bool "Marvell Berlin SoC Family" | |
| 49 | select DW_APB_ICTL | |
| da9a1c67 | 50 | select GPIOLIB |
| 75d8e1ba | 51 | select PINCTRL |
| dd40fd92 JZ |
52 | help |
| 53 | This enables support for Marvell Berlin SoC Family | |
| 54 | ||
| ea367d38 MS |
55 | config ARCH_BITMAIN |
| 56 | bool "Bitmain SoC Platforms" | |
| 57 | help | |
| 58 | This enables support for the Bitmain SoC Family. | |
| 59 | ||
| 37eb56dc FF |
60 | config ARCH_BRCMSTB |
| 61 | bool "Broadcom Set-Top-Box SoCs" | |
| 62 | select BRCMSTB_L2_IRQ | |
| 63 | select GENERIC_IRQ_CHIP | |
| 64 | help | |
| 65 | This enables support for Broadcom's ARMv8 Set Top Box SoCs | |
| 66 | ||
| eed6b3eb | 67 | config ARCH_EXYNOS |
| c87b3e97 | 68 | bool "ARMv8 based Samsung Exynos SoC family" |
| eed6b3eb | 69 | select COMMON_CLK_SAMSUNG |
| caab3df9 KK |
70 | select EXYNOS_PM_DOMAINS if PM_GENERIC_DOMAINS |
| 71 | select EXYNOS_PMU | |
| eed6b3eb OJ |
72 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
| 73 | select HAVE_S3C_RTC if RTC_CLASS | |
| 74 | select PINCTRL | |
| 75 | select PINCTRL_EXYNOS | |
| 5220a73a | 76 | select PM_GENERIC_DOMAINS if PM |
| 3b3428e3 | 77 | select SOC_SAMSUNG |
| eed6b3eb | 78 | help |
| c87b3e97 | 79 | This enables support for ARMv8 based Samsung Exynos SoC family. |
| eed6b3eb | 80 | |
| c7724572 NM |
81 | config ARCH_K3 |
| 82 | bool "Texas Instruments Inc. K3 multicore SoC architecture" | |
| 83 | select PM_GENERIC_DOMAINS if PM | |
| 84 | help | |
| 85 | This enables support for Texas Instruments' K3 multicore SoC | |
| 86 | architecture. | |
| 87 | ||
| 53a5fde0 BS |
88 | config ARCH_LAYERSCAPE |
| 89 | bool "ARMv8 based Freescale Layerscape SoC family" | |
| eeb3d68b | 90 | select EDAC_SUPPORT |
| eed6b3eb | 91 | help |
| 53a5fde0 | 92 | This enables support for the Freescale Layerscape SoC family. |
| eed6b3eb | 93 | |
| 198ed962 CM |
94 | config ARCH_LG1K |
| 95 | bool "LG Electronics LG1K SoC Family" | |
| 96 | help | |
| 97 | This enables support for LG Electronics LG1K SoC Family | |
| 98 | ||
| eed6b3eb OJ |
99 | config ARCH_HISI |
| 100 | bool "Hisilicon SoC Family" | |
| 2b905d3a | 101 | select ARM_TIMER_SP804 |
| f9db43bc | 102 | select HISILICON_IRQ_MBIGEN if PCI |
| 21adc4d7 | 103 | select PINCTRL |
| eed6b3eb OJ |
104 | help |
| 105 | This enables support for Hisilicon ARMv8 SoC family | |
| 106 | ||
| 107 | config ARCH_MEDIATEK | |
| 598f9b2e | 108 | bool "MediaTek SoC Family" |
| eed6b3eb OJ |
109 | select ARM_GIC |
| 110 | select PINCTRL | |
| c050b45d | 111 | select MTK_TIMER |
| eed6b3eb | 112 | help |
| 598f9b2e SW |
113 | This enables support for MediaTek MT27xx, MT65xx, MT76xx |
| 114 | & MT81xx ARMv8 SoCs | |
| eed6b3eb | 115 | |
| 451e9e54 AF |
116 | config ARCH_MESON |
| 117 | bool "Amlogic Platforms" | |
| bf56c776 CC |
118 | select PINCTRL |
| 119 | select PINCTRL_MESON | |
| 59bdefe9 | 120 | select COMMON_CLK_GXBB |
| 78b4af31 | 121 | select COMMON_CLK_AXG |
| b3077ffc | 122 | select COMMON_CLK_G12A |
| f2c2122a | 123 | select MESON_IRQ_GPIO |
| 451e9e54 | 124 | help |
| b3077ffc JB |
125 | This enables support for the arm64 based Amlogic SoCs |
| 126 | such as the s905, S905X/D, S912, A113X/D or S905X/D2 | |
| 451e9e54 | 127 | |
| b4f596b1 GC |
128 | config ARCH_MVEBU |
| 129 | bool "Marvell EBU SoC Family" | |
| ad87c0f6 TP |
130 | select ARMADA_AP806_SYSCON |
| 131 | select ARMADA_CP110_SYSCON | |
| ff60d834 | 132 | select ARMADA_37XX_CLK |
| d2718d13 GC |
133 | select GPIOLIB |
| 134 | select GPIOLIB_IRQCHIP | |
| 29ad6bd9 TP |
135 | select MVEBU_GICP |
| 136 | select MVEBU_ICU | |
| b3920b2b | 137 | select MVEBU_ODMI |
| 04208a24 | 138 | select MVEBU_PIC |
| 228197c5 | 139 | select MVEBU_SEI |
| d2718d13 GC |
140 | select OF_GPIO |
| 141 | select PINCTRL | |
| 142 | select PINCTRL_ARMADA_37XX | |
| c4c14365 GC |
143 | select PINCTRL_ARMADA_AP806 |
| 144 | select PINCTRL_ARMADA_CP110 | |
| b4f596b1 | 145 | help |
| b3920b2b TP |
146 | This enables support for Marvell EBU familly, including: |
| 147 | - Armada 3700 SoC Family | |
| 148 | - Armada 7K SoC Family | |
| 149 | - Armada 8K SoC Family | |
| b4f596b1 | 150 | |
| 930507c1 LS |
151 | config ARCH_MXC |
| 152 | bool "ARMv8 based NXP i.MX SoC family" | |
| 153 | select ARM64_ERRATUM_843419 | |
| a29c7823 | 154 | select ARM64_ERRATUM_845719 if COMPAT |
| 67b92823 | 155 | select IMX_GPCV2 |
| 84a2ab25 LS |
156 | select IMX_GPCV2_PM_DOMAINS |
| 157 | select PM | |
| 158 | select PM_GENERIC_DOMAINS | |
| 930507c1 LS |
159 | help |
| 160 | This enables support for the ARMv8 based SoCs in the | |
| 161 | NXP i.MX family. | |
| 162 | ||
| eed6b3eb OJ |
163 | config ARCH_QCOM |
| 164 | bool "Qualcomm Platforms" | |
| e19811a8 | 165 | select GPIOLIB |
| eed6b3eb OJ |
166 | select PINCTRL |
| 167 | help | |
| 168 | This enables support for the ARMv8 based Qualcomm chipsets. | |
| 169 | ||
| 1b0d665e AF |
170 | config ARCH_REALTEK |
| 171 | bool "Realtek Platforms" | |
| 172 | help | |
| 173 | This enables support for the ARMv8 based Realtek chipsets, | |
| 174 | like the RTD1295. | |
| 175 | ||
| 26a7e06d SH |
176 | config ARCH_RENESAS |
| 177 | bool "Renesas SoC Platforms" | |
| 9374eee3 | 178 | select GPIOLIB |
| 26a7e06d | 179 | select PINCTRL |
| 8d6799a9 | 180 | select SOC_BUS |
| 26a7e06d SH |
181 | help |
| 182 | This enables support for the ARMv8 based Renesas SoCs. | |
| 183 | ||
| 0964d660 GU |
184 | config ARCH_ROCKCHIP |
| 185 | bool "Rockchip Platforms" | |
| 186 | select ARCH_HAS_RESET_CONTROLLER | |
| 187 | select GPIOLIB | |
| 188 | select PINCTRL | |
| 189 | select PINCTRL_ROCKCHIP | |
| 190 | select PM | |
| 191 | select ROCKCHIP_TIMER | |
| 192 | help | |
| 193 | This enables support for the ARMv8 based Rockchip chipsets, | |
| 194 | like the RK3368. | |
| 195 | ||
| 196 | config ARCH_SEATTLE | |
| 197 | bool "AMD Seattle SoC Family" | |
| 198 | help | |
| 199 | This enables support for AMD Seattle SOC Family | |
| 200 | ||
| 78cd6a9d DN |
201 | config ARCH_STRATIX10 |
| 202 | bool "Altera's Stratix 10 SoCFPGA Family" | |
| 203 | help | |
| 204 | This enables support for Altera's Stratix 10 SoCFPGA Family. | |
| 205 | ||
| 0964d660 GU |
206 | config ARCH_SYNQUACER |
| 207 | bool "Socionext SynQuacer SoC Family" | |
| 208 | ||
| eed6b3eb OJ |
209 | config ARCH_TEGRA |
| 210 | bool "NVIDIA Tegra SoC Family" | |
| 211 | select ARCH_HAS_RESET_CONTROLLER | |
| eed6b3eb OJ |
212 | select CLKDEV_LOOKUP |
| 213 | select CLKSRC_MMIO | |
| bb0eb050 | 214 | select TIMER_OF |
| eed6b3eb | 215 | select GENERIC_CLOCKEVENTS |
| da9a1c67 | 216 | select GPIOLIB |
| eed6b3eb | 217 | select PINCTRL |
| 98823241 JH |
218 | select PM |
| 219 | select PM_GENERIC_DOMAINS | |
| eed6b3eb OJ |
220 | select RESET_CONTROLLER |
| 221 | help | |
| 222 | This enables support for the NVIDIA Tegra SoC family. | |
| 223 | ||
| eed6b3eb OJ |
224 | config ARCH_SPRD |
| 225 | bool "Spreadtrum SoC platform" | |
| 226 | help | |
| 227 | Support for Spreadtrum ARM based SoCs | |
| 228 | ||
| 229 | config ARCH_THUNDER | |
| 230 | bool "Cavium Inc. Thunder SoC Family" | |
| 231 | help | |
| 232 | This enables support for Cavium's Thunder Family of SoCs. | |
| 233 | ||
| 03b6fd5d J |
234 | config ARCH_THUNDER2 |
| 235 | bool "Cavium ThunderX2 Server Processors" | |
| 236 | select GPIOLIB | |
| 237 | help | |
| 238 | This enables support for Cavium's ThunderX2 CN99XX family of | |
| 239 | server processors. | |
| 240 | ||
| 56aaafb6 MY |
241 | config ARCH_UNIPHIER |
| 242 | bool "Socionext UniPhier SoC Family" | |
| 75924903 | 243 | select ARCH_HAS_RESET_CONTROLLER |
| 56aaafb6 | 244 | select PINCTRL |
| ab6ab445 | 245 | select RESET_CONTROLLER |
| 56aaafb6 MY |
246 | help |
| 247 | This enables support for Socionext UniPhier SoC family. | |
| 248 | ||
| eed6b3eb OJ |
249 | config ARCH_VEXPRESS |
| 250 | bool "ARMv8 software model (Versatile Express)" | |
| eed6b3eb | 251 | select COMMON_CLK_VERSATILE |
| da9a1c67 | 252 | select GPIOLIB |
| 8da7cc08 SH |
253 | select PM |
| 254 | select PM_GENERIC_DOMAINS | |
| eed6b3eb OJ |
255 | select POWER_RESET_VEXPRESS |
| 256 | select VEXPRESS_CONFIG | |
| 257 | help | |
| 258 | This enables support for the ARMv8 software model (Versatile | |
| 259 | Express). | |
| 260 | ||
| 5bfb3889 | 261 | config ARCH_VULCAN |
| a314520d | 262 | def_bool n |
| 5bfb3889 | 263 | |
| eed6b3eb OJ |
264 | config ARCH_XGENE |
| 265 | bool "AppliedMicro X-Gene SOC Family" | |
| 266 | help | |
| 267 | This enables support for AppliedMicro X-Gene SOC Family | |
| 268 | ||
| 12496aea JN |
269 | config ARCH_ZX |
| 270 | bool "ZTE ZX SoC Family" | |
| 03d95c26 | 271 | select PINCTRL |
| 12496aea JN |
272 | help |
| 273 | This enables support for ZTE ZX SoC Family | |
| 274 | ||
| eed6b3eb OJ |
275 | config ARCH_ZYNQMP |
| 276 | bool "Xilinx ZynqMP Family" | |
| 76582671 | 277 | select ZYNQMP_FIRMWARE |
| eed6b3eb OJ |
278 | help |
| 279 | This enables support for Xilinx ZynqMP Family | |
| 280 | ||
| 281 | endmenu |