]> git.ipfire.org Git - thirdparty/linux.git/blame - arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
arm64: dts: zte: clean up gic-v3 redistributor properties
[thirdparty/linux.git] / arch / arm64 / boot / dts / nvidia / tegra210-p2180.dtsi
CommitLineData
77934269
TR
1#include <dt-bindings/mfd/max77620.h>
2
9e71045f
TR
3#include "tegra210.dtsi"
4
5/ {
6 model = "NVIDIA Jetson TX1";
7 compatible = "nvidia,p2180", "nvidia,tegra210";
8
9 aliases {
77934269 10 rtc0 = "/i2c@7000d000/pmic@3c";
be70771d 11 rtc1 = "/rtc@7000e000";
9e71045f
TR
12 serial0 = &uarta;
13 };
14
5593eb76
TR
15 chosen {
16 stdout-path = "serial0:115200n8";
17 };
18
9e71045f
TR
19 memory {
20 device_type = "memory";
21 reg = <0x0 0x80000000 0x1 0x0>;
22 };
23
24 /* debug port */
be70771d 25 serial@70006000 {
9e71045f
TR
26 status = "okay";
27 };
28
77934269
TR
29 i2c@7000d000 {
30 status = "okay";
31 clock-frequency = <400000>;
32
33 pmic: pmic@3c {
34 compatible = "maxim,max77620";
35 reg = <0x3c>;
36 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
37
38 #interrupt-cells = <2>;
39 interrupt-controller;
40
41 #gpio-cells = <2>;
42 gpio-controller;
43
44 pinctrl-names = "default";
45 pinctrl-0 = <&max77620_default>;
46
47 max77620_default: pinmux {
48 gpio0 {
49 pins = "gpio0";
50 function = "gpio";
51 };
52
53 gpio1 {
54 pins = "gpio1";
55 function = "fps-out";
56 drive-push-pull = <1>;
57 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
58 maxim,active-fps-power-up-slot = <7>;
59 maxim,active-fps-power-down-slot = <0>;
60 };
61
62 gpio2_3 {
63 pins = "gpio2", "gpio3";
64 function = "fps-out";
65 drive-open-drain = <1>;
66 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
67 };
68
69 gpio4 {
70 pins = "gpio4";
71 function = "32k-out1";
72 };
73
74 gpio5_6_7 {
75 pins = "gpio5", "gpio6", "gpio7";
76 function = "gpio";
77 drive-push-pull = <1>;
78 };
79 };
80
81 fps {
82 fps0 {
83 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
84 maxim,suspend-fps-time-period-us = <1280>;
85 };
86
87 fps1 {
88 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
89 maxim,suspend-fps-time-period-us = <1280>;
90 };
91
92 fps2 {
93 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
94 };
95 };
96
97 regulators {
98 in-ldo0-1-supply = <&vdd_pre>;
99 in-ldo7-8-supply = <&vdd_pre>;
100 in-sd3-supply = <&vdd_5v0_sys>;
101
102 vdd_soc: sd0 {
103 regulator-name = "VDD_SOC";
104 regulator-min-microvolt = <600000>;
105 regulator-max-microvolt = <1400000>;
106 regulator-always-on;
107 regulator-boot-on;
108
109 regulator-enable-ramp-delay = <146>;
110 regulator-ramp-delay = <27500>;
111
112 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
113 };
114
115 vdd_ddr: sd1 {
116 regulator-name = "VDD_DDR_1V1_PMIC";
117 regulator-always-on;
118 regulator-boot-on;
119
120 regulator-enable-ramp-delay = <130>;
121 regulator-ramp-delay = <27500>;
122
123 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
124 };
125
126 vdd_pre: sd2 {
127 regulator-name = "VDD_PRE_REG_1V35";
128 regulator-min-microvolt = <1350000>;
129 regulator-max-microvolt = <1350000>;
130
131 regulator-enable-ramp-delay = <176>;
132 regulator-ramp-delay = <27500>;
133
134 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
135 };
136
137 vdd_1v8: sd3 {
138 regulator-name = "VDD_1V8";
139 regulator-min-microvolt = <1800000>;
140 regulator-max-microvolt = <1800000>;
141 regulator-always-on;
142 regulator-boot-on;
143
144 regulator-enable-ramp-delay = <242>;
145 regulator-ramp-delay = <27500>;
146
147 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
148 };
149
150 vdd_sys_1v2: ldo0 {
151 regulator-name = "AVDD_SYS_1V2";
152 regulator-min-microvolt = <1200000>;
153 regulator-max-microvolt = <1200000>;
154 regulator-always-on;
155 regulator-boot-on;
156
157 regulator-enable-ramp-delay = <26>;
158 regulator-ramp-delay = <100000>;
159
160 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
161 };
162
163 vdd_pex_1v05: ldo1 {
164 regulator-name = "VDD_PEX_1V05";
165 regulator-min-microvolt = <1050000>;
166 regulator-max-microvolt = <1050000>;
167
168 regulator-enable-ramp-delay = <22>;
169 regulator-ramp-delay = <100000>;
170
171 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
172 };
173
174 vddio_sdmmc: ldo2 {
175 regulator-name = "VDDIO_SDMMC";
176 /*
177 * Technically this supply should have
178 * a supported range from 1.8 - 3.3 V.
179 * However, that would cause the SDHCI
180 * driver to request 2.7 V upon access
181 * and that in turn will cause traffic
182 * to be broken. Leave it at 3.3 V for
183 * now.
184 */
185 regulator-min-microvolt = <3300000>;
186 regulator-max-microvolt = <3300000>;
187 regulator-always-on;
188 regulator-boot-on;
189
190 regulator-enable-ramp-delay = <62>;
191 regulator-ramp-delay = <100000>;
192
193 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
194 };
195
196 vdd_cam_hv: ldo3 {
197 regulator-name = "VDD_CAM_HV";
198 regulator-min-microvolt = <2800000>;
199 regulator-max-microvolt = <2800000>;
200
201 regulator-enable-ramp-delay = <50>;
202 regulator-ramp-delay = <100000>;
203
204 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
205 };
206
207 vdd_rtc: ldo4 {
208 regulator-name = "VDD_RTC";
209 regulator-min-microvolt = <850000>;
210 regulator-max-microvolt = <850000>;
211 regulator-always-on;
212 regulator-boot-on;
213
214 regulator-enable-ramp-delay = <22>;
215 regulator-ramp-delay = <100000>;
216
217 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
218 };
219
220 vdd_ts_hv: ldo5 {
221 regulator-name = "VDD_TS_HV";
222 regulator-min-microvolt = <3300000>;
223 regulator-max-microvolt = <3300000>;
224
225 regulator-enable-ramp-delay = <62>;
226 regulator-ramp-delay = <100000>;
227
228 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
229 };
230
231 vdd_ts: ldo6 {
232 regulator-name = "VDD_TS_1V8";
233 regulator-min-microvolt = <1800000>;
234 regulator-max-microvolt = <1800000>;
235
236 regulator-enable-ramp-delay = <36>;
237 regulator-ramp-delay = <100000>;
238
239 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
240 maxim,active-fps-power-up-slot = <7>;
241 maxim,active-fps-power-down-slot = <0>;
242 };
243
244 avdd_1v05_pll: ldo7 {
245 regulator-name = "AVDD_1V05_PLL";
246 regulator-min-microvolt = <1050000>;
247 regulator-max-microvolt = <1050000>;
248 regulator-always-on;
249 regulator-boot-on;
250
251 regulator-enable-ramp-delay = <24>;
252 regulator-ramp-delay = <100000>;
253
254 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
255 };
256
257 avdd_1v05: ldo8 {
258 regulator-name = "AVDD_SATA_HDMI_DP_1V05";
259 regulator-min-microvolt = <1050000>;
260 regulator-max-microvolt = <1050000>;
261
262 regulator-enable-ramp-delay = <22>;
263 regulator-ramp-delay = <100000>;
264
265 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
266 };
267 };
268 };
269 };
270
be70771d 271 pmc@7000e400 {
9e71045f
TR
272 nvidia,invert-interrupt;
273 };
274
275 /* eMMC */
be70771d 276 sdhci@700b0600 {
9e71045f
TR
277 status = "okay";
278 bus-width = <8>;
279 non-removable;
280 };
281
282 clocks {
283 compatible = "simple-bus";
284 #address-cells = <1>;
285 #size-cells = <0>;
286
287 clk32k_in: clock@0 {
288 compatible = "fixed-clock";
289 reg = <0>;
290 #clock-cells = <0>;
291 clock-frequency = <32768>;
292 };
293 };
294};