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Commit | Line | Data |
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77934269 TR |
1 | #include <dt-bindings/mfd/max77620.h> |
2 | ||
9e71045f TR |
3 | #include "tegra210.dtsi" |
4 | ||
5 | / { | |
6 | model = "NVIDIA Jetson TX1"; | |
7 | compatible = "nvidia,p2180", "nvidia,tegra210"; | |
8 | ||
9 | aliases { | |
77934269 | 10 | rtc0 = "/i2c@7000d000/pmic@3c"; |
be70771d | 11 | rtc1 = "/rtc@7000e000"; |
9e71045f TR |
12 | serial0 = &uarta; |
13 | }; | |
14 | ||
5593eb76 TR |
15 | chosen { |
16 | stdout-path = "serial0:115200n8"; | |
17 | }; | |
18 | ||
9e71045f TR |
19 | memory { |
20 | device_type = "memory"; | |
21 | reg = <0x0 0x80000000 0x1 0x0>; | |
22 | }; | |
23 | ||
5e6b9a89 AC |
24 | gpu@57000000 { |
25 | vdd-supply = <&vdd_gpu>; | |
26 | }; | |
27 | ||
9e71045f | 28 | /* debug port */ |
be70771d | 29 | serial@70006000 { |
9e71045f TR |
30 | status = "okay"; |
31 | }; | |
32 | ||
77934269 TR |
33 | i2c@7000d000 { |
34 | status = "okay"; | |
35 | clock-frequency = <400000>; | |
36 | ||
37 | pmic: pmic@3c { | |
38 | compatible = "maxim,max77620"; | |
39 | reg = <0x3c>; | |
40 | interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; | |
41 | ||
42 | #interrupt-cells = <2>; | |
43 | interrupt-controller; | |
44 | ||
45 | #gpio-cells = <2>; | |
46 | gpio-controller; | |
47 | ||
48 | pinctrl-names = "default"; | |
49 | pinctrl-0 = <&max77620_default>; | |
50 | ||
51 | max77620_default: pinmux { | |
52 | gpio0 { | |
53 | pins = "gpio0"; | |
54 | function = "gpio"; | |
55 | }; | |
56 | ||
57 | gpio1 { | |
58 | pins = "gpio1"; | |
59 | function = "fps-out"; | |
60 | drive-push-pull = <1>; | |
61 | maxim,active-fps-source = <MAX77620_FPS_SRC_0>; | |
62 | maxim,active-fps-power-up-slot = <7>; | |
63 | maxim,active-fps-power-down-slot = <0>; | |
64 | }; | |
65 | ||
66 | gpio2_3 { | |
67 | pins = "gpio2", "gpio3"; | |
68 | function = "fps-out"; | |
69 | drive-open-drain = <1>; | |
70 | maxim,active-fps-source = <MAX77620_FPS_SRC_0>; | |
71 | }; | |
72 | ||
73 | gpio4 { | |
74 | pins = "gpio4"; | |
75 | function = "32k-out1"; | |
76 | }; | |
77 | ||
78 | gpio5_6_7 { | |
79 | pins = "gpio5", "gpio6", "gpio7"; | |
80 | function = "gpio"; | |
81 | drive-push-pull = <1>; | |
82 | }; | |
83 | }; | |
84 | ||
85 | fps { | |
86 | fps0 { | |
87 | maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; | |
88 | maxim,suspend-fps-time-period-us = <1280>; | |
89 | }; | |
90 | ||
91 | fps1 { | |
92 | maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; | |
93 | maxim,suspend-fps-time-period-us = <1280>; | |
94 | }; | |
95 | ||
96 | fps2 { | |
97 | maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; | |
98 | }; | |
99 | }; | |
100 | ||
101 | regulators { | |
102 | in-ldo0-1-supply = <&vdd_pre>; | |
103 | in-ldo7-8-supply = <&vdd_pre>; | |
104 | in-sd3-supply = <&vdd_5v0_sys>; | |
105 | ||
106 | vdd_soc: sd0 { | |
107 | regulator-name = "VDD_SOC"; | |
108 | regulator-min-microvolt = <600000>; | |
109 | regulator-max-microvolt = <1400000>; | |
110 | regulator-always-on; | |
111 | regulator-boot-on; | |
112 | ||
113 | regulator-enable-ramp-delay = <146>; | |
114 | regulator-ramp-delay = <27500>; | |
115 | ||
116 | maxim,active-fps-source = <MAX77620_FPS_SRC_1>; | |
117 | }; | |
118 | ||
119 | vdd_ddr: sd1 { | |
120 | regulator-name = "VDD_DDR_1V1_PMIC"; | |
121 | regulator-always-on; | |
122 | regulator-boot-on; | |
123 | ||
124 | regulator-enable-ramp-delay = <130>; | |
125 | regulator-ramp-delay = <27500>; | |
126 | ||
127 | maxim,active-fps-source = <MAX77620_FPS_SRC_0>; | |
128 | }; | |
129 | ||
130 | vdd_pre: sd2 { | |
131 | regulator-name = "VDD_PRE_REG_1V35"; | |
132 | regulator-min-microvolt = <1350000>; | |
133 | regulator-max-microvolt = <1350000>; | |
134 | ||
135 | regulator-enable-ramp-delay = <176>; | |
136 | regulator-ramp-delay = <27500>; | |
137 | ||
138 | maxim,active-fps-source = <MAX77620_FPS_SRC_1>; | |
139 | }; | |
140 | ||
141 | vdd_1v8: sd3 { | |
142 | regulator-name = "VDD_1V8"; | |
143 | regulator-min-microvolt = <1800000>; | |
144 | regulator-max-microvolt = <1800000>; | |
145 | regulator-always-on; | |
146 | regulator-boot-on; | |
147 | ||
148 | regulator-enable-ramp-delay = <242>; | |
149 | regulator-ramp-delay = <27500>; | |
150 | ||
151 | maxim,active-fps-source = <MAX77620_FPS_SRC_0>; | |
152 | }; | |
153 | ||
154 | vdd_sys_1v2: ldo0 { | |
155 | regulator-name = "AVDD_SYS_1V2"; | |
156 | regulator-min-microvolt = <1200000>; | |
157 | regulator-max-microvolt = <1200000>; | |
158 | regulator-always-on; | |
159 | regulator-boot-on; | |
160 | ||
161 | regulator-enable-ramp-delay = <26>; | |
162 | regulator-ramp-delay = <100000>; | |
163 | ||
164 | maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; | |
165 | }; | |
166 | ||
167 | vdd_pex_1v05: ldo1 { | |
168 | regulator-name = "VDD_PEX_1V05"; | |
169 | regulator-min-microvolt = <1050000>; | |
170 | regulator-max-microvolt = <1050000>; | |
171 | ||
172 | regulator-enable-ramp-delay = <22>; | |
173 | regulator-ramp-delay = <100000>; | |
174 | ||
175 | maxim,active-fps-source = <MAX77620_FPS_SRC_1>; | |
176 | }; | |
177 | ||
178 | vddio_sdmmc: ldo2 { | |
179 | regulator-name = "VDDIO_SDMMC"; | |
180 | /* | |
181 | * Technically this supply should have | |
182 | * a supported range from 1.8 - 3.3 V. | |
183 | * However, that would cause the SDHCI | |
184 | * driver to request 2.7 V upon access | |
185 | * and that in turn will cause traffic | |
186 | * to be broken. Leave it at 3.3 V for | |
187 | * now. | |
188 | */ | |
189 | regulator-min-microvolt = <3300000>; | |
190 | regulator-max-microvolt = <3300000>; | |
191 | regulator-always-on; | |
192 | regulator-boot-on; | |
193 | ||
194 | regulator-enable-ramp-delay = <62>; | |
195 | regulator-ramp-delay = <100000>; | |
196 | ||
197 | maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; | |
198 | }; | |
199 | ||
200 | vdd_cam_hv: ldo3 { | |
201 | regulator-name = "VDD_CAM_HV"; | |
202 | regulator-min-microvolt = <2800000>; | |
203 | regulator-max-microvolt = <2800000>; | |
204 | ||
205 | regulator-enable-ramp-delay = <50>; | |
206 | regulator-ramp-delay = <100000>; | |
207 | ||
208 | maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; | |
209 | }; | |
210 | ||
211 | vdd_rtc: ldo4 { | |
212 | regulator-name = "VDD_RTC"; | |
213 | regulator-min-microvolt = <850000>; | |
214 | regulator-max-microvolt = <850000>; | |
215 | regulator-always-on; | |
216 | regulator-boot-on; | |
217 | ||
218 | regulator-enable-ramp-delay = <22>; | |
219 | regulator-ramp-delay = <100000>; | |
220 | ||
221 | maxim,active-fps-source = <MAX77620_FPS_SRC_0>; | |
222 | }; | |
223 | ||
224 | vdd_ts_hv: ldo5 { | |
225 | regulator-name = "VDD_TS_HV"; | |
226 | regulator-min-microvolt = <3300000>; | |
227 | regulator-max-microvolt = <3300000>; | |
228 | ||
229 | regulator-enable-ramp-delay = <62>; | |
230 | regulator-ramp-delay = <100000>; | |
231 | ||
232 | maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; | |
233 | }; | |
234 | ||
235 | vdd_ts: ldo6 { | |
236 | regulator-name = "VDD_TS_1V8"; | |
237 | regulator-min-microvolt = <1800000>; | |
238 | regulator-max-microvolt = <1800000>; | |
239 | ||
240 | regulator-enable-ramp-delay = <36>; | |
241 | regulator-ramp-delay = <100000>; | |
242 | ||
243 | maxim,active-fps-source = <MAX77620_FPS_SRC_0>; | |
244 | maxim,active-fps-power-up-slot = <7>; | |
245 | maxim,active-fps-power-down-slot = <0>; | |
246 | }; | |
247 | ||
248 | avdd_1v05_pll: ldo7 { | |
249 | regulator-name = "AVDD_1V05_PLL"; | |
250 | regulator-min-microvolt = <1050000>; | |
251 | regulator-max-microvolt = <1050000>; | |
252 | regulator-always-on; | |
253 | regulator-boot-on; | |
254 | ||
255 | regulator-enable-ramp-delay = <24>; | |
256 | regulator-ramp-delay = <100000>; | |
257 | ||
258 | maxim,active-fps-source = <MAX77620_FPS_SRC_1>; | |
259 | }; | |
260 | ||
261 | avdd_1v05: ldo8 { | |
262 | regulator-name = "AVDD_SATA_HDMI_DP_1V05"; | |
263 | regulator-min-microvolt = <1050000>; | |
264 | regulator-max-microvolt = <1050000>; | |
265 | ||
266 | regulator-enable-ramp-delay = <22>; | |
267 | regulator-ramp-delay = <100000>; | |
268 | ||
269 | maxim,active-fps-source = <MAX77620_FPS_SRC_1>; | |
270 | }; | |
271 | }; | |
272 | }; | |
273 | }; | |
274 | ||
be70771d | 275 | pmc@7000e400 { |
9e71045f TR |
276 | nvidia,invert-interrupt; |
277 | }; | |
278 | ||
279 | /* eMMC */ | |
be70771d | 280 | sdhci@700b0600 { |
9e71045f TR |
281 | status = "okay"; |
282 | bus-width = <8>; | |
283 | non-removable; | |
284 | }; | |
285 | ||
286 | clocks { | |
287 | compatible = "simple-bus"; | |
288 | #address-cells = <1>; | |
289 | #size-cells = <0>; | |
290 | ||
291 | clk32k_in: clock@0 { | |
292 | compatible = "fixed-clock"; | |
293 | reg = <0>; | |
294 | #clock-cells = <0>; | |
295 | clock-frequency = <32768>; | |
296 | }; | |
297 | }; | |
5e6b9a89 AC |
298 | |
299 | regulators { | |
300 | vdd_gpu: regulator@100 { | |
301 | compatible = "pwm-regulator"; | |
302 | reg = <100>; | |
303 | pwms = <&pwm 1 4880>; | |
304 | regulator-name = "VDD_GPU"; | |
305 | regulator-min-microvolt = <710000>; | |
306 | regulator-max-microvolt = <1320000>; | |
307 | enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>; | |
308 | regulator-ramp-delay = <80>; | |
309 | regulator-enable-ramp-delay = <1000>; | |
310 | }; | |
311 | }; | |
9e71045f | 312 | }; |