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caab277b | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
cd1aebf5 MR |
2 | /* |
3 | * Copyright (C) 2013 ARM Ltd. | |
cd1aebf5 MR |
4 | */ |
5 | #ifndef __ASM_CPU_OPS_H | |
6 | #define __ASM_CPU_OPS_H | |
7 | ||
8 | #include <linux/init.h> | |
9 | #include <linux/threads.h> | |
10 | ||
652af899 MR |
11 | /** |
12 | * struct cpu_operations - Callback operations for hotplugging CPUs. | |
13 | * | |
14 | * @name: Name of the property as appears in a devicetree cpu node's | |
819a8826 LP |
15 | * enable-method property. On systems booting with ACPI, @name |
16 | * identifies the struct cpu_operations entry corresponding to | |
17 | * the boot protocol specified in the ACPI MADT table. | |
18 | * @cpu_init: Reads any data necessary for a specific enable-method for a | |
19 | * proposed logical id. | |
652af899 MR |
20 | * @cpu_prepare: Early one-time preparation step for a cpu. If there is a |
21 | * mechanism for doing so, tests whether it is possible to boot | |
22 | * the given CPU. | |
23 | * @cpu_boot: Boots a cpu into the kernel. | |
24 | * @cpu_postboot: Optionally, perform any post-boot cleanup or necesary | |
25 | * synchronisation. Called from the cpu being booted. | |
9327e2c6 MR |
26 | * @cpu_disable: Prepares a cpu to die. May fail for some mechanism-specific |
27 | * reason, which will cause the hot unplug to be aborted. Called | |
28 | * from the cpu to be killed. | |
29 | * @cpu_die: Makes a cpu leave the kernel. Must not fail. Called from the | |
30 | * cpu being killed. | |
c814ca02 | 31 | * @cpu_kill: Ensures a cpu has left the kernel. Called from another cpu. |
819a8826 LP |
32 | * @cpu_init_idle: Reads any data necessary to initialize CPU idle states for |
33 | * a proposed logical id. | |
95322526 LP |
34 | * @cpu_suspend: Suspends a cpu and saves the required context. May fail owing |
35 | * to wrong parameters or error conditions. Called from the | |
36 | * CPU being suspended. Must be called with IRQs disabled. | |
652af899 | 37 | */ |
cd1aebf5 MR |
38 | struct cpu_operations { |
39 | const char *name; | |
819a8826 | 40 | int (*cpu_init)(unsigned int); |
cd1aebf5 | 41 | int (*cpu_prepare)(unsigned int); |
652af899 MR |
42 | int (*cpu_boot)(unsigned int); |
43 | void (*cpu_postboot)(void); | |
9327e2c6 MR |
44 | #ifdef CONFIG_HOTPLUG_CPU |
45 | int (*cpu_disable)(unsigned int cpu); | |
46 | void (*cpu_die)(unsigned int cpu); | |
c814ca02 | 47 | int (*cpu_kill)(unsigned int cpu); |
9327e2c6 | 48 | #endif |
af3cfdbf | 49 | #ifdef CONFIG_CPU_IDLE |
819a8826 | 50 | int (*cpu_init_idle)(unsigned int); |
95322526 LP |
51 | int (*cpu_suspend)(unsigned long); |
52 | #endif | |
cd1aebf5 MR |
53 | }; |
54 | ||
55 | extern const struct cpu_operations *cpu_ops[NR_CPUS]; | |
819a8826 | 56 | int __init cpu_read_ops(int cpu); |
cd1aebf5 | 57 | |
819a8826 LP |
58 | static inline void __init cpu_read_bootcpu_ops(void) |
59 | { | |
60 | cpu_read_ops(0); | |
61 | } | |
62 | ||
cd1aebf5 | 63 | #endif /* ifndef __ASM_CPU_OPS_H */ |