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b3901d54 CM |
1 | /* |
2 | * Based on arch/arm/kernel/process.c | |
3 | * | |
4 | * Original Copyright (C) 1995 Linus Torvalds | |
5 | * Copyright (C) 1996-2000 Russell King - Converted to ARM. | |
6 | * Copyright (C) 2012 ARM Ltd. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
19 | */ | |
20 | ||
21 | #include <stdarg.h> | |
22 | ||
fd92d4a5 | 23 | #include <linux/compat.h> |
b3901d54 CM |
24 | #include <linux/export.h> |
25 | #include <linux/sched.h> | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/mm.h> | |
28 | #include <linux/stddef.h> | |
29 | #include <linux/unistd.h> | |
30 | #include <linux/user.h> | |
31 | #include <linux/delay.h> | |
32 | #include <linux/reboot.h> | |
33 | #include <linux/interrupt.h> | |
34 | #include <linux/kallsyms.h> | |
35 | #include <linux/init.h> | |
36 | #include <linux/cpu.h> | |
37 | #include <linux/elfcore.h> | |
38 | #include <linux/pm.h> | |
39 | #include <linux/tick.h> | |
40 | #include <linux/utsname.h> | |
41 | #include <linux/uaccess.h> | |
42 | #include <linux/random.h> | |
43 | #include <linux/hw_breakpoint.h> | |
44 | #include <linux/personality.h> | |
45 | #include <linux/notifier.h> | |
46 | ||
47 | #include <asm/compat.h> | |
48 | #include <asm/cacheflush.h> | |
ec45d1cf WD |
49 | #include <asm/fpsimd.h> |
50 | #include <asm/mmu_context.h> | |
b3901d54 CM |
51 | #include <asm/processor.h> |
52 | #include <asm/stacktrace.h> | |
b3901d54 CM |
53 | |
54 | static void setup_restart(void) | |
55 | { | |
56 | /* | |
57 | * Tell the mm system that we are going to reboot - | |
58 | * we may need it to insert some 1:1 mappings so that | |
59 | * soft boot works. | |
60 | */ | |
61 | setup_mm_for_reboot(); | |
62 | ||
63 | /* Clean and invalidate caches */ | |
64 | flush_cache_all(); | |
65 | ||
66 | /* Turn D-cache off */ | |
67 | cpu_cache_off(); | |
68 | ||
69 | /* Push out any further dirty data, and ensure cache is empty */ | |
70 | flush_cache_all(); | |
71 | } | |
72 | ||
73 | void soft_restart(unsigned long addr) | |
74 | { | |
09024aa6 GL |
75 | typedef void (*phys_reset_t)(unsigned long); |
76 | phys_reset_t phys_reset; | |
77 | ||
b3901d54 | 78 | setup_restart(); |
09024aa6 GL |
79 | |
80 | /* Switch to the identity mapping */ | |
81 | phys_reset = (phys_reset_t)virt_to_phys(cpu_reset); | |
82 | phys_reset(addr); | |
83 | ||
84 | /* Should never get here */ | |
85 | BUG(); | |
b3901d54 CM |
86 | } |
87 | ||
88 | /* | |
89 | * Function pointers to optional machine specific functions | |
90 | */ | |
91 | void (*pm_power_off)(void); | |
92 | EXPORT_SYMBOL_GPL(pm_power_off); | |
93 | ||
b0946fc8 | 94 | void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd); |
aa1e8ec1 | 95 | EXPORT_SYMBOL_GPL(arm_pm_restart); |
b3901d54 | 96 | |
b3901d54 CM |
97 | /* |
98 | * This is our default idle handler. | |
99 | */ | |
0087298f | 100 | void arch_cpu_idle(void) |
b3901d54 CM |
101 | { |
102 | /* | |
103 | * This should do all the clock switching and wait for interrupt | |
104 | * tricks | |
105 | */ | |
6990566b NP |
106 | cpu_do_idle(); |
107 | local_irq_enable(); | |
b3901d54 CM |
108 | } |
109 | ||
9327e2c6 MR |
110 | #ifdef CONFIG_HOTPLUG_CPU |
111 | void arch_cpu_idle_dead(void) | |
112 | { | |
113 | cpu_die(); | |
114 | } | |
115 | #endif | |
116 | ||
b3901d54 CM |
117 | void machine_shutdown(void) |
118 | { | |
119 | #ifdef CONFIG_SMP | |
120 | smp_send_stop(); | |
121 | #endif | |
122 | } | |
123 | ||
124 | void machine_halt(void) | |
125 | { | |
126 | machine_shutdown(); | |
127 | while (1); | |
128 | } | |
129 | ||
130 | void machine_power_off(void) | |
131 | { | |
132 | machine_shutdown(); | |
133 | if (pm_power_off) | |
134 | pm_power_off(); | |
135 | } | |
136 | ||
137 | void machine_restart(char *cmd) | |
138 | { | |
139 | machine_shutdown(); | |
140 | ||
141 | /* Disable interrupts first */ | |
142 | local_irq_disable(); | |
b3901d54 CM |
143 | |
144 | /* Now call the architecture specific reboot code. */ | |
aa1e8ec1 | 145 | if (arm_pm_restart) |
ff701306 | 146 | arm_pm_restart(reboot_mode, cmd); |
b3901d54 CM |
147 | |
148 | /* | |
149 | * Whoops - the architecture was unable to reboot. | |
150 | */ | |
151 | printk("Reboot failed -- System halted\n"); | |
152 | while (1); | |
153 | } | |
154 | ||
155 | void __show_regs(struct pt_regs *regs) | |
156 | { | |
6ca68e80 CM |
157 | int i, top_reg; |
158 | u64 lr, sp; | |
159 | ||
160 | if (compat_user_mode(regs)) { | |
161 | lr = regs->compat_lr; | |
162 | sp = regs->compat_sp; | |
163 | top_reg = 12; | |
164 | } else { | |
165 | lr = regs->regs[30]; | |
166 | sp = regs->sp; | |
167 | top_reg = 29; | |
168 | } | |
b3901d54 | 169 | |
a43cb95d | 170 | show_regs_print_info(KERN_DEFAULT); |
b3901d54 | 171 | print_symbol("PC is at %s\n", instruction_pointer(regs)); |
6ca68e80 | 172 | print_symbol("LR is at %s\n", lr); |
b3901d54 | 173 | printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n", |
6ca68e80 CM |
174 | regs->pc, lr, regs->pstate); |
175 | printk("sp : %016llx\n", sp); | |
176 | for (i = top_reg; i >= 0; i--) { | |
b3901d54 CM |
177 | printk("x%-2d: %016llx ", i, regs->regs[i]); |
178 | if (i % 2 == 0) | |
179 | printk("\n"); | |
180 | } | |
181 | printk("\n"); | |
182 | } | |
183 | ||
184 | void show_regs(struct pt_regs * regs) | |
185 | { | |
186 | printk("\n"); | |
b3901d54 CM |
187 | __show_regs(regs); |
188 | } | |
189 | ||
190 | /* | |
191 | * Free current thread data structures etc.. | |
192 | */ | |
193 | void exit_thread(void) | |
194 | { | |
195 | } | |
196 | ||
197 | void flush_thread(void) | |
198 | { | |
199 | fpsimd_flush_thread(); | |
200 | flush_ptrace_hw_breakpoint(current); | |
201 | } | |
202 | ||
203 | void release_thread(struct task_struct *dead_task) | |
204 | { | |
205 | } | |
206 | ||
207 | int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) | |
208 | { | |
c51f9269 | 209 | fpsimd_preserve_current_state(); |
b3901d54 CM |
210 | *dst = *src; |
211 | return 0; | |
212 | } | |
213 | ||
214 | asmlinkage void ret_from_fork(void) asm("ret_from_fork"); | |
215 | ||
216 | int copy_thread(unsigned long clone_flags, unsigned long stack_start, | |
afa86fc4 | 217 | unsigned long stk_sz, struct task_struct *p) |
b3901d54 CM |
218 | { |
219 | struct pt_regs *childregs = task_pt_regs(p); | |
220 | unsigned long tls = p->thread.tp_value; | |
221 | ||
c34501d2 | 222 | memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context)); |
b3901d54 | 223 | |
9ac08002 AV |
224 | if (likely(!(p->flags & PF_KTHREAD))) { |
225 | *childregs = *current_pt_regs(); | |
c34501d2 CM |
226 | childregs->regs[0] = 0; |
227 | if (is_compat_thread(task_thread_info(p))) { | |
e0fd18ce AV |
228 | if (stack_start) |
229 | childregs->compat_sp = stack_start; | |
c34501d2 CM |
230 | } else { |
231 | /* | |
232 | * Read the current TLS pointer from tpidr_el0 as it may be | |
233 | * out-of-sync with the saved value. | |
234 | */ | |
235 | asm("mrs %0, tpidr_el0" : "=r" (tls)); | |
e0fd18ce AV |
236 | if (stack_start) { |
237 | /* 16-byte aligned stack mandatory on AArch64 */ | |
238 | if (stack_start & 15) | |
239 | return -EINVAL; | |
240 | childregs->sp = stack_start; | |
241 | } | |
c34501d2 | 242 | } |
b3901d54 | 243 | /* |
c34501d2 CM |
244 | * If a TLS pointer was passed to clone (4th argument), use it |
245 | * for the new thread. | |
b3901d54 | 246 | */ |
c34501d2 | 247 | if (clone_flags & CLONE_SETTLS) |
9ac08002 | 248 | tls = childregs->regs[3]; |
c34501d2 CM |
249 | } else { |
250 | memset(childregs, 0, sizeof(struct pt_regs)); | |
251 | childregs->pstate = PSR_MODE_EL1h; | |
252 | p->thread.cpu_context.x19 = stack_start; | |
253 | p->thread.cpu_context.x20 = stk_sz; | |
b3901d54 | 254 | } |
b3901d54 | 255 | p->thread.cpu_context.pc = (unsigned long)ret_from_fork; |
c34501d2 | 256 | p->thread.cpu_context.sp = (unsigned long)childregs; |
b3901d54 CM |
257 | p->thread.tp_value = tls; |
258 | ||
259 | ptrace_hw_copy_thread(p); | |
260 | ||
261 | return 0; | |
262 | } | |
263 | ||
264 | static void tls_thread_switch(struct task_struct *next) | |
265 | { | |
266 | unsigned long tpidr, tpidrro; | |
267 | ||
268 | if (!is_compat_task()) { | |
269 | asm("mrs %0, tpidr_el0" : "=r" (tpidr)); | |
270 | current->thread.tp_value = tpidr; | |
271 | } | |
272 | ||
273 | if (is_compat_thread(task_thread_info(next))) { | |
274 | tpidr = 0; | |
275 | tpidrro = next->thread.tp_value; | |
276 | } else { | |
277 | tpidr = next->thread.tp_value; | |
278 | tpidrro = 0; | |
279 | } | |
280 | ||
281 | asm( | |
282 | " msr tpidr_el0, %0\n" | |
283 | " msr tpidrro_el0, %1" | |
284 | : : "r" (tpidr), "r" (tpidrro)); | |
285 | } | |
286 | ||
287 | /* | |
288 | * Thread switching. | |
289 | */ | |
290 | struct task_struct *__switch_to(struct task_struct *prev, | |
291 | struct task_struct *next) | |
292 | { | |
293 | struct task_struct *last; | |
294 | ||
295 | fpsimd_thread_switch(next); | |
296 | tls_thread_switch(next); | |
297 | hw_breakpoint_thread_switch(next); | |
3325732f | 298 | contextidr_thread_switch(next); |
b3901d54 | 299 | |
5108c67c CM |
300 | /* |
301 | * Complete any pending TLB or cache maintenance on this CPU in case | |
302 | * the thread migrates to a different CPU. | |
303 | */ | |
98f7685e | 304 | dsb(ish); |
b3901d54 CM |
305 | |
306 | /* the actual thread switch */ | |
307 | last = cpu_switch_to(prev, next); | |
308 | ||
309 | return last; | |
310 | } | |
311 | ||
b3901d54 CM |
312 | unsigned long get_wchan(struct task_struct *p) |
313 | { | |
314 | struct stackframe frame; | |
408c3658 | 315 | unsigned long stack_page; |
b3901d54 CM |
316 | int count = 0; |
317 | if (!p || p == current || p->state == TASK_RUNNING) | |
318 | return 0; | |
319 | ||
320 | frame.fp = thread_saved_fp(p); | |
321 | frame.sp = thread_saved_sp(p); | |
322 | frame.pc = thread_saved_pc(p); | |
408c3658 | 323 | stack_page = (unsigned long)task_stack_page(p); |
b3901d54 | 324 | do { |
408c3658 KK |
325 | if (frame.sp < stack_page || |
326 | frame.sp >= stack_page + THREAD_SIZE || | |
327 | unwind_frame(&frame)) | |
b3901d54 CM |
328 | return 0; |
329 | if (!in_sched_functions(frame.pc)) | |
330 | return frame.pc; | |
331 | } while (count ++ < 16); | |
332 | return 0; | |
333 | } | |
334 | ||
335 | unsigned long arch_align_stack(unsigned long sp) | |
336 | { | |
337 | if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) | |
338 | sp -= get_random_int() & ~PAGE_MASK; | |
339 | return sp & ~0xf; | |
340 | } | |
341 | ||
342 | static unsigned long randomize_base(unsigned long base) | |
343 | { | |
344 | unsigned long range_end = base + (STACK_RND_MASK << PAGE_SHIFT) + 1; | |
345 | return randomize_range(base, range_end, 0) ? : base; | |
346 | } | |
347 | ||
348 | unsigned long arch_randomize_brk(struct mm_struct *mm) | |
349 | { | |
350 | return randomize_base(mm->brk); | |
351 | } | |
352 | ||
353 | unsigned long randomize_et_dyn(unsigned long base) | |
354 | { | |
355 | return randomize_base(base); | |
356 | } |