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7b64fef3 WD |
1 | /* |
2 | * Copyright (C) 2006 Atmel Corporation | |
3 | * | |
1a459660 | 4 | * SPDX-License-Identifier: GPL-2.0+ |
7b64fef3 WD |
5 | */ |
6 | #ifndef __ASM_AVR32_ADDRSPACE_H | |
7 | #define __ASM_AVR32_ADDRSPACE_H | |
8 | ||
a38de083 OM |
9 | #include <asm/types.h> |
10 | ||
7b64fef3 WD |
11 | /* Memory segments when segmentation is enabled */ |
12 | #define P0SEG 0x00000000 | |
13 | #define P1SEG 0x80000000 | |
14 | #define P2SEG 0xa0000000 | |
15 | #define P3SEG 0xc0000000 | |
16 | #define P4SEG 0xe0000000 | |
17 | ||
18 | /* Returns the privileged segment base of a given address */ | |
19 | #define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) | |
20 | ||
21 | /* Returns the physical address of a PnSEG (n=1,2) address */ | |
22 | #define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff) | |
23 | ||
24 | /* | |
25 | * Map an address to a certain privileged segment | |
26 | */ | |
27 | #define P1SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG)) | |
28 | #define P2SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG)) | |
29 | #define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG)) | |
30 | #define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG)) | |
31 | ||
a38de083 OM |
32 | /* virt_to_phys will only work when address is in P1 or P2 */ |
33 | static inline unsigned long virt_to_phys(volatile void *address) | |
34 | { | |
35 | return PHYSADDR(address); | |
36 | } | |
37 | ||
38 | static inline void * phys_to_virt(unsigned long address) | |
39 | { | |
40 | return (void *)P1SEGADDR(address); | |
41 | } | |
42 | ||
43 | #define cached(addr) ((void *)P1SEGADDR(addr)) | |
44 | #define uncached(addr) ((void *)P2SEGADDR(addr)) | |
45 | ||
46 | /* | |
47 | * Given a physical address and a length, return a virtual address | |
48 | * that can be used to access the memory range with the caching | |
49 | * properties specified by "flags". | |
50 | * | |
51 | * This implementation works for memory below 512MiB (flash, etc.) as | |
52 | * well as above 3.5GiB (internal peripherals.) | |
53 | */ | |
54 | #define MAP_NOCACHE (0) | |
55 | #define MAP_WRCOMBINE (1 << 7) | |
56 | #define MAP_WRBACK (MAP_WRCOMBINE | (1 << 9)) | |
57 | #define MAP_WRTHROUGH (MAP_WRBACK | (1 << 0)) | |
58 | ||
59 | static inline void * | |
60 | map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) | |
61 | { | |
1f36f73f | 62 | return (void *)paddr; |
a38de083 OM |
63 | } |
64 | ||
7b64fef3 | 65 | #endif /* __ASM_AVR32_ADDRSPACE_H */ |