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d4d77308 1/*
a187559e 2 * U-Boot - blackfin_local.h
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3 *
4 * Copyright (c) 2005-2007 Analog Devices Inc.
5 *
1a459660 6 * SPDX-License-Identifier: GPL-2.0+
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7 */
8
9#ifndef __BLACKFIN_LOCAL_H__
10#define __BLACKFIN_LOCAL_H__
11
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12#include <asm/mem_map.h>
13
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14#define LO(con32) ((con32) & 0xFFFF)
15#define lo(con32) ((con32) & 0xFFFF)
16#define HI(con32) (((con32) >> 16) & 0xFFFF)
17#define hi(con32) (((con32) >> 16) & 0xFFFF)
18
19#define OFFSET_(x) (x & 0x0000FFFF)
20#define MK_BMSK_(x) (1 << x)
21
22/* Ideally this should be USEC not MSEC, but the USEC multiplication
23 * likes to overflow 32bit quantities which is all our assembler
24 * currently supports ;(
25 */
26#define USEC_PER_MSEC 1000
27#define MSEC_PER_SEC 1000
28#define BFIN_SCLK (100000000)
29#define SCLK_TO_MSEC(sclk) ((MSEC_PER_SEC * ((sclk) / USEC_PER_MSEC)) / (BFIN_SCLK / USEC_PER_MSEC))
30#define MSEC_TO_SCLK(msec) ((((BFIN_SCLK / USEC_PER_MSEC) * (msec)) / MSEC_PER_SEC) * USEC_PER_MSEC)
31
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32#define L1_CACHE_SHIFT 5
33#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
34
273d11ea 35#include <linux/linkage.h>
8e5c1eda 36#include <asm/cache.h>
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37
38#ifndef __ASSEMBLY__
39# ifdef SHARED_RESOURCES
40# include <asm/shared_resources.h>
41# endif
42
43# include <linux/types.h>
44
f948158f 45# define bfin_revid() (bfin_read_CHIPID() >> 28)
d4d77308 46
a5750b80 47extern int bfin_os_log_check(void);
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48extern void bfin_os_log_dump(void);
49
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50extern void blackfin_icache_flush_range(const void *, const void *);
51extern void blackfin_dcache_flush_range(const void *, const void *);
fdce83c1 52extern void blackfin_icache_dcache_flush_range(const void *, const void *);
05b75e48 53extern void blackfin_dcache_flush_invalidate_range(const void *, const void *);
d4d77308 54
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55/* Use DMA to move data from on chip to external memory. The L1 instruction
56 * regions can only be accessed via DMA, so if the address in question is in
57 * that region, make sure we attempt to DMA indirectly.
d4d77308 58 */
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59# ifdef __ADSPBF561__
60 /* Core B regions all need dma from Core A */
61# define addr_bfin_on_chip_mem(addr) \
62 ((((unsigned long)(addr) & 0xFFF00000) == 0xFFA00000) || \
63 (((unsigned long)(addr) & 0xFFC00000) == 0xFF400000))
64# else
65# define addr_bfin_on_chip_mem(addr) \
66 (((unsigned long)(addr) & 0xFFF00000) == 0xFFA00000)
67# endif
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68
69# include <asm/system.h>
70
71#if ANOMALY_05000198
72# define NOP_PAD_ANOMALY_05000198 "nop;"
73#else
74# define NOP_PAD_ANOMALY_05000198
75#endif
76
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77#define BFIN_BUG() while (1) asm volatile("emuexcpt;");
78
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79#define _bfin_readX(addr, size, asm_size, asm_ext) ({ \
80 u32 __v; \
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81 __asm__ __volatile__( \
82 NOP_PAD_ANOMALY_05000198 \
7ed998f6 83 "%0 = " #asm_size "[%1]" #asm_ext ";" \
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84 : "=d" (__v) \
85 : "a" (addr) \
86 ); \
87 __v; })
7ed998f6 88#define _bfin_writeX(addr, val, size, asm_size) \
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89 __asm__ __volatile__( \
90 NOP_PAD_ANOMALY_05000198 \
7ed998f6 91 #asm_size "[%0] = %1;" \
d4d77308 92 : \
7ed998f6 93 : "a" (addr), "d" ((u##size)(val)) \
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94 : "memory" \
95 )
96
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97#define bfin_read8(addr) _bfin_readX(addr, 8, b, (z))
98#define bfin_read16(addr) _bfin_readX(addr, 16, w, (z))
99#define bfin_read32(addr) _bfin_readX(addr, 32, , )
100#define bfin_write8(addr, val) _bfin_writeX(addr, val, 8, b)
101#define bfin_write16(addr, val) _bfin_writeX(addr, val, 16, w)
102#define bfin_write32(addr, val) _bfin_writeX(addr, val, 32, )
103
104#define bfin_read(addr) \
105({ \
106 sizeof(*(addr)) == 1 ? bfin_read8(addr) : \
107 sizeof(*(addr)) == 2 ? bfin_read16(addr) : \
108 sizeof(*(addr)) == 4 ? bfin_read32(addr) : \
ecf9ce21 109 ({ BFIN_BUG(); 0; }); \
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110})
111#define bfin_write(addr, val) \
112do { \
113 switch (sizeof(*(addr))) { \
114 case 1: bfin_write8(addr, val); break; \
115 case 2: bfin_write16(addr, val); break; \
116 case 4: bfin_write32(addr, val); break; \
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117 default: \
118 BFIN_BUG(); \
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119 } \
120} while (0)
121
122#define bfin_write_or(addr, bits) \
123do { \
124 typeof(addr) __addr = (addr); \
125 bfin_write(__addr, bfin_read(__addr) | (bits)); \
126} while (0)
127
128#define bfin_write_and(addr, bits) \
129do { \
130 typeof(addr) __addr = (addr); \
131 bfin_write(__addr, bfin_read(__addr) & (bits)); \
132} while (0)
d4d77308 133
7ed998f6 134#define bfin_readPTR(addr) bfin_read32(addr)
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135#define bfin_writePTR(addr, val) bfin_write32(addr, val)
136
137/* SSYNC implementation for C file */
138static inline void SSYNC(void)
139{
140 int _tmp;
141 if (ANOMALY_05000312)
142 __asm__ __volatile__(
143 "cli %0;"
144 "nop;"
145 "nop;"
146 "ssync;"
147 "sti %0;"
148 : "=d" (_tmp)
149 );
150 else if (ANOMALY_05000244)
151 __asm__ __volatile__(
152 "nop;"
153 "nop;"
154 "nop;"
155 "ssync;"
156 );
157 else
158 __asm__ __volatile__("ssync;");
159}
160
161/* CSYNC implementation for C file */
162static inline void CSYNC(void)
163{
164 int _tmp;
165 if (ANOMALY_05000312)
166 __asm__ __volatile__(
167 "cli %0;"
168 "nop;"
169 "nop;"
170 "csync;"
171 "sti %0;"
172 : "=d" (_tmp)
173 );
174 else if (ANOMALY_05000244)
175 __asm__ __volatile__(
176 "nop;"
177 "nop;"
178 "nop;"
179 "csync;"
180 );
181 else
182 __asm__ __volatile__("csync;");
183}
184
185#else /* __ASSEMBLY__ */
186
187/* SSYNC & CSYNC implementations for assembly files */
188
189#define ssync(x) SSYNC(x)
190#define csync(x) CSYNC(x)
191
192#if ANOMALY_05000312
193#define SSYNC(scratch) cli scratch; nop; nop; SSYNC; sti scratch;
194#define CSYNC(scratch) cli scratch; nop; nop; CSYNC; sti scratch;
195
196#elif ANOMALY_05000244
197#define SSYNC(scratch) nop; nop; nop; SSYNC;
198#define CSYNC(scratch) nop; nop; nop; CSYNC;
199
200#else
201#define SSYNC(scratch) SSYNC;
202#define CSYNC(scratch) CSYNC;
203
204#endif /* ANOMALY_05000312 & ANOMALY_05000244 handling */
205
206#endif /* __ASSEMBLY__ */
207
208#endif