[people/arne_f/kernel.git] / arch / cris / arch-v10 / drivers / i2c.c

/*!***************************************************************************
*!
*! FILE NAME  : i2c.c
*!
*! DESCRIPTION: implements an interface for IIC/I2C, both directly from other
*!              kernel modules (i2c_writereg/readreg) and from userspace using
*!              ioctl()'s
*!
*! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN
*!
*!***************************************************************************/

/****************** INCLUDE FILES SECTION ***********************************/

#include <linux/module.h>
#include <linux/sched.h>
#include <linux/smp_lock.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/string.h>
#include <linux/init.h>

#include <asm/etraxi2c.h>

#include <asm/system.h>
#include <arch/svinto.h>
#include <asm/io.h>
#include <asm/delay.h>
#include <arch/io_interface_mux.h>

#include "i2c.h"

/****************** I2C DEFINITION SECTION *************************/

#define D(x)

#define I2C_MAJOR 123  /* LOCAL/EXPERIMENTAL */
static const char i2c_name[] = "i2c";

#define CLOCK_LOW_TIME            8
#define CLOCK_HIGH_TIME           8
#define START_CONDITION_HOLD_TIME 8
#define STOP_CONDITION_HOLD_TIME  8
#define ENABLE_OUTPUT 0x01
#define ENABLE_INPUT 0x00
#define I2C_CLOCK_HIGH 1
#define I2C_CLOCK_LOW 0
#define I2C_DATA_HIGH 1
#define I2C_DATA_LOW 0

#ifdef CONFIG_ETRAX_I2C_USES_PB_NOT_PB_I2C
/* Use PB and not PB_I2C */
#ifndef CONFIG_ETRAX_I2C_DATA_PORT
#define CONFIG_ETRAX_I2C_DATA_PORT 0
#endif
#ifndef CONFIG_ETRAX_I2C_CLK_PORT
#define CONFIG_ETRAX_I2C_CLK_PORT 1
#endif

#define SDABIT CONFIG_ETRAX_I2C_DATA_PORT
#define SCLBIT CONFIG_ETRAX_I2C_CLK_PORT
#define i2c_enable() 
#define i2c_disable() 

/* enable or disable output-enable, to select output or input on the i2c bus */

#define i2c_dir_out() \
  REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, SDABIT, 1)
#define i2c_dir_in()  \
  REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, SDABIT, 0)

/* control the i2c clock and data signals */

#define i2c_clk(x) \
  REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, SCLBIT, x)
#define i2c_data(x) \
  REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, SDABIT, x)

/* read a bit from the i2c interface */

#define i2c_getbit() (((*R_PORT_PB_READ & (1 << SDABIT))) >> SDABIT)

#else
/* enable or disable the i2c interface */

#define i2c_enable() *R_PORT_PB_I2C = (port_pb_i2c_shadow |= IO_MASK(R_PORT_PB_I2C, i2c_en))
#define i2c_disable() *R_PORT_PB_I2C = (port_pb_i2c_shadow &= ~IO_MASK(R_PORT_PB_I2C, i2c_en))

/* enable or disable output-enable, to select output or input on the i2c bus */

#define i2c_dir_out() \
	*R_PORT_PB_I2C = (port_pb_i2c_shadow &= ~IO_MASK(R_PORT_PB_I2C, i2c_oe_)); \
	REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, 0, 1); 
#define i2c_dir_in() \
	*R_PORT_PB_I2C = (port_pb_i2c_shadow |= IO_MASK(R_PORT_PB_I2C, i2c_oe_)); \
	REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, 0, 0);

/* control the i2c clock and data signals */

#define i2c_clk(x) \
	*R_PORT_PB_I2C = (port_pb_i2c_shadow = (port_pb_i2c_shadow & \
       ~IO_MASK(R_PORT_PB_I2C, i2c_clk)) | IO_FIELD(R_PORT_PB_I2C, i2c_clk, (x))); \
       REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, 1, x);

#define i2c_data(x) \
	*R_PORT_PB_I2C = (port_pb_i2c_shadow = (port_pb_i2c_shadow & \
	   ~IO_MASK(R_PORT_PB_I2C, i2c_d)) | IO_FIELD(R_PORT_PB_I2C, i2c_d, (x))); \
	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, 0, x);

/* read a bit from the i2c interface */

#define i2c_getbit() (*R_PORT_PB_READ & 0x1)
#endif

/* use the kernels delay routine */

#define i2c_delay(usecs) udelay(usecs)

static DEFINE_SPINLOCK(i2c_lock); /* Protect directions etc */

/****************** FUNCTION DEFINITION SECTION *************************/


/* generate i2c start condition */

void
i2c_start(void)
{
	/*
	 * SCL=1 SDA=1
	 */
	i2c_dir_out();
	i2c_delay(CLOCK_HIGH_TIME/6);
	i2c_data(I2C_DATA_HIGH);
	i2c_clk(I2C_CLOCK_HIGH);
	i2c_delay(CLOCK_HIGH_TIME);
	/*
	 * SCL=1 SDA=0
	 */
	i2c_data(I2C_DATA_LOW);
	i2c_delay(START_CONDITION_HOLD_TIME);
	/*
	 * SCL=0 SDA=0
	 */
	i2c_clk(I2C_CLOCK_LOW);
	i2c_delay(CLOCK_LOW_TIME);
}

/* generate i2c stop condition */

void
i2c_stop(void)
{
	i2c_dir_out();

	/*
	 * SCL=0 SDA=0
	 */
	i2c_clk(I2C_CLOCK_LOW);
	i2c_data(I2C_DATA_LOW);
	i2c_delay(CLOCK_LOW_TIME*2);
	/*
	 * SCL=1 SDA=0
	 */
	i2c_clk(I2C_CLOCK_HIGH);
	i2c_delay(CLOCK_HIGH_TIME*2);
	/*
	 * SCL=1 SDA=1
	 */
	i2c_data(I2C_DATA_HIGH);
	i2c_delay(STOP_CONDITION_HOLD_TIME);

	i2c_dir_in();
}

/* write a byte to the i2c interface */

void
i2c_outbyte(unsigned char x)
{
	int i;

	i2c_dir_out();

	for (i = 0; i < 8; i++) {
		if (x & 0x80) {
			i2c_data(I2C_DATA_HIGH);
		} else {
			i2c_data(I2C_DATA_LOW);
		}
		
		i2c_delay(CLOCK_LOW_TIME/2);
		i2c_clk(I2C_CLOCK_HIGH);
		i2c_delay(CLOCK_HIGH_TIME);
		i2c_clk(I2C_CLOCK_LOW);
		i2c_delay(CLOCK_LOW_TIME/2);
		x <<= 1;
	}
	i2c_data(I2C_DATA_LOW);
	i2c_delay(CLOCK_LOW_TIME/2);

	/*
	 * enable input
	 */
	i2c_dir_in();
}

/* read a byte from the i2c interface */

unsigned char
i2c_inbyte(void)
{
	unsigned char aBitByte = 0;
	int i;

	/* Switch off I2C to get bit */
	i2c_disable();
	i2c_dir_in();
	i2c_delay(CLOCK_HIGH_TIME/2);

	/* Get bit */
	aBitByte |= i2c_getbit();

	/* Enable I2C */
	i2c_enable();
	i2c_delay(CLOCK_LOW_TIME/2);

	for (i = 1; i < 8; i++) {
		aBitByte <<= 1;
		/* Clock pulse */
		i2c_clk(I2C_CLOCK_HIGH);
		i2c_delay(CLOCK_HIGH_TIME);
		i2c_clk(I2C_CLOCK_LOW);
		i2c_delay(CLOCK_LOW_TIME);

		/* Switch off I2C to get bit */
		i2c_disable();
		i2c_dir_in();
		i2c_delay(CLOCK_HIGH_TIME/2);

		/* Get bit */
		aBitByte |= i2c_getbit();

		/* Enable I2C */
		i2c_enable();
		i2c_delay(CLOCK_LOW_TIME/2);
	}
	i2c_clk(I2C_CLOCK_HIGH);
	i2c_delay(CLOCK_HIGH_TIME);

        /*
	 * we leave the clock low, getbyte is usually followed
	 * by sendack/nack, they assume the clock to be low
	 */
        i2c_clk(I2C_CLOCK_LOW);
	return aBitByte;
}

/*#---------------------------------------------------------------------------
*#
*# FUNCTION NAME: i2c_getack
*#
*# DESCRIPTION  : checks if ack was received from ic2
*#
*#--------------------------------------------------------------------------*/

int
i2c_getack(void)
{
	int ack = 1;
	/*
	 * enable output
	 */
	i2c_dir_out();
	/*
	 * Release data bus by setting
	 * data high
	 */
	i2c_data(I2C_DATA_HIGH);
	/*
	 * enable input
	 */
	i2c_dir_in();
	i2c_delay(CLOCK_HIGH_TIME/4);
	/*
	 * generate ACK clock pulse
	 */
	i2c_clk(I2C_CLOCK_HIGH);
	/*
	 * Use PORT PB instead of I2C
	 * for input. (I2C not working)
	 */
	i2c_clk(1);
	i2c_data(1);
	/*
	 * switch off I2C
	 */
	i2c_data(1);
	i2c_disable();
	i2c_dir_in();
	/*
	 * now wait for ack
	 */
	i2c_delay(CLOCK_HIGH_TIME/2);
	/*
	 * check for ack
	 */
	if(i2c_getbit())
		ack = 0;
	i2c_delay(CLOCK_HIGH_TIME/2);
	if(!ack){
		if(!i2c_getbit()) /* receiver pulld SDA low */
			ack = 1;
		i2c_delay(CLOCK_HIGH_TIME/2);
	}

	/*
	 * our clock is high now, make sure data is low
	 * before we enable our output. If we keep data high
	 * and enable output, we would generate a stop condition.
	 */
	i2c_data(I2C_DATA_LOW);

	/*
	 * end clock pulse
	 */
	i2c_enable();
	i2c_dir_out();
	i2c_clk(I2C_CLOCK_LOW);
	i2c_delay(CLOCK_HIGH_TIME/4);
	/*
	 * enable output
	 */
	i2c_dir_out();
	/*
	 * remove ACK clock pulse
	 */
	i2c_data(I2C_DATA_HIGH);
	i2c_delay(CLOCK_LOW_TIME/2);
	return ack;
}

/*#---------------------------------------------------------------------------
*#
*# FUNCTION NAME: I2C::sendAck
*#
*# DESCRIPTION  : Send ACK on received data
*#
*#--------------------------------------------------------------------------*/
void
i2c_sendack(void)
{
	/*
	 * enable output
	 */
	i2c_delay(CLOCK_LOW_TIME);
	i2c_dir_out();
	/*
	 * set ack pulse high
	 */
	i2c_data(I2C_DATA_LOW);
	/*
	 * generate clock pulse
	 */
	i2c_delay(CLOCK_HIGH_TIME/6);
	i2c_clk(I2C_CLOCK_HIGH);
	i2c_delay(CLOCK_HIGH_TIME);
	i2c_clk(I2C_CLOCK_LOW);
	i2c_delay(CLOCK_LOW_TIME/6);
	/*
	 * reset data out
	 */
	i2c_data(I2C_DATA_HIGH);
	i2c_delay(CLOCK_LOW_TIME);

	i2c_dir_in();
}

/*#---------------------------------------------------------------------------
*#
*# FUNCTION NAME: i2c_sendnack
*#
*# DESCRIPTION  : Sends NACK on received data
*#
*#--------------------------------------------------------------------------*/
void
i2c_sendnack(void)
{
	/*
	 * enable output
	 */
	i2c_delay(CLOCK_LOW_TIME);
	i2c_dir_out();
	/*
	 * set data high
	 */
	i2c_data(I2C_DATA_HIGH);
	/*
	 * generate clock pulse
	 */
	i2c_delay(CLOCK_HIGH_TIME/6);
	i2c_clk(I2C_CLOCK_HIGH);
	i2c_delay(CLOCK_HIGH_TIME);
	i2c_clk(I2C_CLOCK_LOW);
	i2c_delay(CLOCK_LOW_TIME);

	i2c_dir_in();
}

/*#---------------------------------------------------------------------------
*#
*# FUNCTION NAME: i2c_writereg
*#
*# DESCRIPTION  : Writes a value to an I2C device
*#
*#--------------------------------------------------------------------------*/
int
i2c_writereg(unsigned char theSlave, unsigned char theReg, 
	     unsigned char theValue)
{
	int error, cntr = 3;
	unsigned long flags;

	spin_lock(&i2c_lock);

	do {
		error = 0;
		/*
		 * we don't like to be interrupted
		 */
		local_irq_save(flags);

		i2c_start();
		/*
		 * send slave address
		 */
		i2c_outbyte((theSlave & 0xfe));
		/*
		 * wait for ack
		 */
		if(!i2c_getack())
			error = 1;
		/*
		 * now select register
		 */
		i2c_dir_out();
		i2c_outbyte(theReg);
		/*
		 * now it's time to wait for ack
		 */
		if(!i2c_getack())
			error |= 2;
		/*
		 * send register register data
		 */
		i2c_outbyte(theValue);
		/*
		 * now it's time to wait for ack
		 */
		if(!i2c_getack())
			error |= 4;
		/*
		 * end byte stream
		 */
		i2c_stop();
		/*
		 * enable interrupt again
		 */
		local_irq_restore(flags);
		
	} while(error && cntr--);

	i2c_delay(CLOCK_LOW_TIME);

	spin_unlock(&i2c_lock);

	return -error;
}

/*#---------------------------------------------------------------------------
*#
*# FUNCTION NAME: i2c_readreg
*#
*# DESCRIPTION  : Reads a value from the decoder registers.
*#
*#--------------------------------------------------------------------------*/
unsigned char
i2c_readreg(unsigned char theSlave, unsigned char theReg)
{
	unsigned char b = 0;
	int error, cntr = 3;
	unsigned long flags;

	spin_lock(&i2c_lock);

	do {
		error = 0;
		/*
		 * we don't like to be interrupted
		 */
		local_irq_save(flags);
		/*
		 * generate start condition
		 */
		i2c_start();
    
		/*
		 * send slave address
		 */
		i2c_outbyte((theSlave & 0xfe));
		/*
		 * wait for ack
		 */
		if(!i2c_getack())
			error = 1;
		/*
		 * now select register
		 */
		i2c_dir_out();
		i2c_outbyte(theReg);
		/*
		 * now it's time to wait for ack
		 */
		if(!i2c_getack())
			error = 1;
		/*
		 * repeat start condition
		 */
		i2c_delay(CLOCK_LOW_TIME);
		i2c_start();
		/*
		 * send slave address
		 */
		i2c_outbyte(theSlave | 0x01);
		/*
		 * wait for ack
		 */
		if(!i2c_getack())
			error = 1;
		/*
		 * fetch register
		 */
		b = i2c_inbyte();
		/*
		 * last received byte needs to be nacked
		 * instead of acked
		 */
		i2c_sendnack();
		/*
		 * end sequence
		 */
		i2c_stop();
		/*
		 * enable interrupt again
		 */
		local_irq_restore(flags);
		
	} while(error && cntr--);

	spin_unlock(&i2c_lock);

	return b;
}

static int
i2c_open(struct inode *inode, struct file *filp)
{
	cycle_kernel_lock();
	return 0;
}

static int
i2c_release(struct inode *inode, struct file *filp)
{
	return 0;
}

/* Main device API. ioctl's to write or read to/from i2c registers.
 */

static int
i2c_ioctl(struct inode *inode, struct file *file,
	  unsigned int cmd, unsigned long arg)
{
	if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) {
		return -EINVAL;
	}

	switch (_IOC_NR(cmd)) {
		case I2C_WRITEREG:
			/* write to an i2c slave */
			D(printk("i2cw %d %d %d\n", 
				 I2C_ARGSLAVE(arg),
				 I2C_ARGREG(arg),
				 I2C_ARGVALUE(arg)));

			return i2c_writereg(I2C_ARGSLAVE(arg),
					    I2C_ARGREG(arg),
					    I2C_ARGVALUE(arg));
		case I2C_READREG:
		{
			unsigned char val;
			/* read from an i2c slave */
			D(printk("i2cr %d %d ", 
				I2C_ARGSLAVE(arg),
				I2C_ARGREG(arg)));
			val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg));
			D(printk("= %d\n", val));
			return val;
		}					    
		default:
			return -EINVAL;

	}
	
	return 0;
}

static const struct file_operations i2c_fops = {
	.owner    = THIS_MODULE,
	.ioctl    = i2c_ioctl,
	.open     = i2c_open,
	.release  = i2c_release,
};

int __init
i2c_init(void)
{
	static int res = 0;
	static int first = 1;

	if (!first) {
		return res;
	}
	first = 0;

	/* Setup and enable the Port B I2C interface */

#ifndef CONFIG_ETRAX_I2C_USES_PB_NOT_PB_I2C
	if ((res = cris_request_io_interface(if_i2c, "I2C"))) {
		printk(KERN_CRIT "i2c_init: Failed to get IO interface\n");
		return res;
	}

	*R_PORT_PB_I2C = port_pb_i2c_shadow |= 
		IO_STATE(R_PORT_PB_I2C, i2c_en,  on) |
		IO_FIELD(R_PORT_PB_I2C, i2c_d,   1)  |
		IO_FIELD(R_PORT_PB_I2C, i2c_clk, 1)  |
		IO_STATE(R_PORT_PB_I2C, i2c_oe_, enable);

	port_pb_dir_shadow &= ~IO_MASK(R_PORT_PB_DIR, dir0);
	port_pb_dir_shadow &= ~IO_MASK(R_PORT_PB_DIR, dir1);

	*R_PORT_PB_DIR = (port_pb_dir_shadow |=
			  IO_STATE(R_PORT_PB_DIR, dir0, input)  |
			  IO_STATE(R_PORT_PB_DIR, dir1, output));
#else
        if ((res = cris_io_interface_allocate_pins(if_i2c,
						   'b',
                                                   CONFIG_ETRAX_I2C_DATA_PORT,
						   CONFIG_ETRAX_I2C_DATA_PORT))) {
		printk(KERN_WARNING "i2c_init: Failed to get IO pin for I2C data port\n");
		return res;
	} else if ((res = cris_io_interface_allocate_pins(if_i2c,
							  'b',
							  CONFIG_ETRAX_I2C_CLK_PORT,
							  CONFIG_ETRAX_I2C_CLK_PORT))) {
		cris_io_interface_free_pins(if_i2c,
					    'b',
					    CONFIG_ETRAX_I2C_DATA_PORT,
					    CONFIG_ETRAX_I2C_DATA_PORT);
		printk(KERN_WARNING "i2c_init: Failed to get IO pin for I2C clk port\n");
	}
#endif

	return res;
}

static int __init
i2c_register(void)
{
	int res;

	res = i2c_init();
	if (res < 0)
		return res;
  	res = register_chrdev(I2C_MAJOR, i2c_name, &i2c_fops);
	if(res < 0) {
		printk(KERN_ERR "i2c: couldn't get a major number.\n");
		return res;
	}

	printk(KERN_INFO "I2C driver v2.2, (c) 1999-2004 Axis Communications AB\n");
	
	return 0;
}

/* this makes sure that i2c_register is called during boot */

module_init(i2c_register);

/****************** END OF FILE i2c.c ********************************/
Commit	Line	Data
1da177e4 LT	1	/!**************************************************************************
	2	*!
	3	*! FILE NAME : i2c.c
	4	*!
	5	*! DESCRIPTION: implements an interface for IIC/I2C, both directly from other
	6	*! kernel modules (i2c_writereg/readreg) and from userspace using
	7	*! ioctl()'s
	8	*!
e5d5cf24	9	*! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN
1da177e4 LT	10	*!
1da177e4 LT	11	!**************************************************************************/
1da177e4 LT	12
	13	/**************** INCLUDE FILES SECTION *********************************/
	14
	15	#include <linux/module.h>
	16	#include <linux/sched.h>
f2b9857e	17	#include <linux/smp_lock.h>
1da177e4 LT	18	#include <linux/errno.h>
	19	#include <linux/kernel.h>
	20	#include <linux/fs.h>
	21	#include <linux/string.h>
	22	#include <linux/init.h>
1da177e4 LT	23
	24	#include <asm/etraxi2c.h>
	25
	26	#include <asm/system.h>
556dcee7	27	#include <arch/svinto.h>
1da177e4 LT	28	#include <asm/io.h>
1da177e4 LT	29	#include <asm/delay.h>
556dcee7	30	#include <arch/io_interface_mux.h>
1da177e4 LT	31
	32	#include "i2c.h"
	33
	34	/**************** I2C DEFINITION SECTION ***********************/
	35
	36	#define D(x)
	37
	38	#define I2C_MAJOR 123 /* LOCAL/EXPERIMENTAL */
	39	static const char i2c_name[] = "i2c";
	40
	41	#define CLOCK_LOW_TIME 8
	42	#define CLOCK_HIGH_TIME 8
	43	#define START_CONDITION_HOLD_TIME 8
	44	#define STOP_CONDITION_HOLD_TIME 8
	45	#define ENABLE_OUTPUT 0x01
	46	#define ENABLE_INPUT 0x00
	47	#define I2C_CLOCK_HIGH 1
	48	#define I2C_CLOCK_LOW 0
	49	#define I2C_DATA_HIGH 1
	50	#define I2C_DATA_LOW 0
	51
	52	#ifdef CONFIG_ETRAX_I2C_USES_PB_NOT_PB_I2C
	53	/* Use PB and not PB_I2C */
	54	#ifndef CONFIG_ETRAX_I2C_DATA_PORT
	55	#define CONFIG_ETRAX_I2C_DATA_PORT 0
	56	#endif
	57	#ifndef CONFIG_ETRAX_I2C_CLK_PORT
	58	#define CONFIG_ETRAX_I2C_CLK_PORT 1
	59	#endif
	60
	61	#define SDABIT CONFIG_ETRAX_I2C_DATA_PORT
	62	#define SCLBIT CONFIG_ETRAX_I2C_CLK_PORT
	63	#define i2c_enable()
	64	#define i2c_disable()
	65
	66	/* enable or disable output-enable, to select output or input on the i2c bus */
	67
	68	#define i2c_dir_out() \
	69	REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, SDABIT, 1)
	70	#define i2c_dir_in() \
	71	REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, SDABIT, 0)
	72
	73	/* control the i2c clock and data signals */
	74
	75	#define i2c_clk(x) \
	76	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, SCLBIT, x)
	77	#define i2c_data(x) \
	78	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, SDABIT, x)
	79
	80	/* read a bit from the i2c interface */
	81
	82	#define i2c_getbit() (((*R_PORT_PB_READ & (1 << SDABIT))) >> SDABIT)
	83
	84	#else
	85	/* enable or disable the i2c interface */
	86
	87	#define i2c_enable() *R_PORT_PB_I2C = (port_pb_i2c_shadow \|= IO_MASK(R_PORT_PB_I2C, i2c_en))
	88	#define i2c_disable() *R_PORT_PB_I2C = (port_pb_i2c_shadow &= ~IO_MASK(R_PORT_PB_I2C, i2c_en))
	89
	90	/* enable or disable output-enable, to select output or input on the i2c bus */
	91
	92	#define i2c_dir_out() \
	93	*R_PORT_PB_I2C = (port_pb_i2c_shadow &= ~IO_MASK(R_PORT_PB_I2C, i2c_oe_)); \
	94	REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, 0, 1);
95	#define i2c_dir_in() \
96	*R_PORT_PB_I2C = (port_pb_i2c_shadow \|= IO_MASK(R_PORT_PB_I2C, i2c_oe_)); \
97	REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, 0, 0);
98
99	/* control the i2c clock and data signals */
100
101	#define i2c_clk(x) \
102	*R_PORT_PB_I2C = (port_pb_i2c_shadow = (port_pb_i2c_shadow & \
103	~IO_MASK(R_PORT_PB_I2C, i2c_clk)) \| IO_FIELD(R_PORT_PB_I2C, i2c_clk, (x))); \
104	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, 1, x);
105
106	#define i2c_data(x) \
107	*R_PORT_PB_I2C = (port_pb_i2c_shadow = (port_pb_i2c_shadow & \
108	~IO_MASK(R_PORT_PB_I2C, i2c_d)) \| IO_FIELD(R_PORT_PB_I2C, i2c_d, (x))); \
109	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, 0, x);
110
111	/* read a bit from the i2c interface */
112
113	#define i2c_getbit() (*R_PORT_PB_READ & 0x1)
114	#endif
115
116	/* use the kernels delay routine */
117
118	#define i2c_delay(usecs) udelay(usecs)
119
7e920426	120	static DEFINE_SPINLOCK(i2c_lock); /* Protect directions etc */
1da177e4 LT	121
	122	/**************** FUNCTION DEFINITION SECTION ***********************/
	123
	124
	125	/* generate i2c start condition */
	126
	127	void
	128	i2c_start(void)
	129	{
	130	/*
	131	* SCL=1 SDA=1
	132	*/
	133	i2c_dir_out();
	134	i2c_delay(CLOCK_HIGH_TIME/6);
	135	i2c_data(I2C_DATA_HIGH);
	136	i2c_clk(I2C_CLOCK_HIGH);
	137	i2c_delay(CLOCK_HIGH_TIME);
	138	/*
	139	* SCL=1 SDA=0
	140	*/
	141	i2c_data(I2C_DATA_LOW);
	142	i2c_delay(START_CONDITION_HOLD_TIME);
	143	/*
	144	* SCL=0 SDA=0
	145	*/
	146	i2c_clk(I2C_CLOCK_LOW);
	147	i2c_delay(CLOCK_LOW_TIME);
	148	}
	149
	150	/* generate i2c stop condition */
	151
	152	void
	153	i2c_stop(void)
	154	{
	155	i2c_dir_out();
	156
	157	/*
	158	* SCL=0 SDA=0
	159	*/
	160	i2c_clk(I2C_CLOCK_LOW);
	161	i2c_data(I2C_DATA_LOW);
	162	i2c_delay(CLOCK_LOW_TIME*2);
	163	/*
	164	* SCL=1 SDA=0
	165	*/
	166	i2c_clk(I2C_CLOCK_HIGH);
	167	i2c_delay(CLOCK_HIGH_TIME*2);
	168	/*
	169	* SCL=1 SDA=1
	170	*/
	171	i2c_data(I2C_DATA_HIGH);
	172	i2c_delay(STOP_CONDITION_HOLD_TIME);
	173
	174	i2c_dir_in();
	175	}
	176
	177	/* write a byte to the i2c interface */
	178
	179	void
	180	i2c_outbyte(unsigned char x)
	181	{
	182	int i;
	183
	184	i2c_dir_out();
185
186	for (i = 0; i < 8; i++) {
187	if (x & 0x80) {
188	i2c_data(I2C_DATA_HIGH);
189	} else {
190	i2c_data(I2C_DATA_LOW);
191	}
192
193	i2c_delay(CLOCK_LOW_TIME/2);
194	i2c_clk(I2C_CLOCK_HIGH);
195	i2c_delay(CLOCK_HIGH_TIME);
196	i2c_clk(I2C_CLOCK_LOW);
197	i2c_delay(CLOCK_LOW_TIME/2);
198	x <<= 1;
199	}
200	i2c_data(I2C_DATA_LOW);
201	i2c_delay(CLOCK_LOW_TIME/2);
202
203	/*
204	* enable input
205	*/
206	i2c_dir_in();
207	}
208
209	/* read a byte from the i2c interface */
210
211	unsigned char
212	i2c_inbyte(void)
213	{
214	unsigned char aBitByte = 0;
215	int i;
216
217	/* Switch off I2C to get bit */
218	i2c_disable();
219	i2c_dir_in();
220	i2c_delay(CLOCK_HIGH_TIME/2);
221
222	/* Get bit */
223	aBitByte \|= i2c_getbit();
224
225	/* Enable I2C */
226	i2c_enable();
227	i2c_delay(CLOCK_LOW_TIME/2);
228
229	for (i = 1; i < 8; i++) {
230	aBitByte <<= 1;
231	/* Clock pulse */
232	i2c_clk(I2C_CLOCK_HIGH);
233	i2c_delay(CLOCK_HIGH_TIME);
234	i2c_clk(I2C_CLOCK_LOW);
235	i2c_delay(CLOCK_LOW_TIME);
236
237	/* Switch off I2C to get bit */
238	i2c_disable();
239	i2c_dir_in();
240	i2c_delay(CLOCK_HIGH_TIME/2);
241
242	/* Get bit */
243	aBitByte \|= i2c_getbit();
244
245	/* Enable I2C */
246	i2c_enable();
247	i2c_delay(CLOCK_LOW_TIME/2);
248	}
249	i2c_clk(I2C_CLOCK_HIGH);
250	i2c_delay(CLOCK_HIGH_TIME);
251
252	/*
253	* we leave the clock low, getbyte is usually followed
254	* by sendack/nack, they assume the clock to be low
255	*/
256	i2c_clk(I2C_CLOCK_LOW);
257	return aBitByte;
258	}
259
260	/*#---------------------------------------------------------------------------
261	*#
262	*# FUNCTION NAME: i2c_getack
263	*#
264	*# DESCRIPTION : checks if ack was received from ic2
265	*#
266	#--------------------------------------------------------------------------/
267
268	int
269	i2c_getack(void)
270	{
271	int ack = 1;
272	/*
273	* enable output
274	*/
275	i2c_dir_out();
276	/*
277	* Release data bus by setting
278	* data high
279	*/
280	i2c_data(I2C_DATA_HIGH);
281	/*
282	* enable input
283	*/
284	i2c_dir_in();
285	i2c_delay(CLOCK_HIGH_TIME/4);
286	/*
287	* generate ACK clock pulse
288	*/
289	i2c_clk(I2C_CLOCK_HIGH);
290	/*
291	* Use PORT PB instead of I2C
292	* for input. (I2C not working)
293	*/
294	i2c_clk(1);
295	i2c_data(1);
296	/*
297	* switch off I2C
298	*/
299	i2c_data(1);
300	i2c_disable();
301	i2c_dir_in();
302	/*
303	* now wait for ack
304	*/
305	i2c_delay(CLOCK_HIGH_TIME/2);
306	/*
307	* check for ack
308	*/
309	if(i2c_getbit())
310	ack = 0;
311	i2c_delay(CLOCK_HIGH_TIME/2);
312	if(!ack){
313	if(!i2c_getbit()) /* receiver pulld SDA low */
314	ack = 1;
315	i2c_delay(CLOCK_HIGH_TIME/2);
316	}
317
318	/*
319	* our clock is high now, make sure data is low
320	* before we enable our output. If we keep data high
321	* and enable output, we would generate a stop condition.
322	*/
323	i2c_data(I2C_DATA_LOW);
324
325	/*
326	* end clock pulse
327	*/
328	i2c_enable();
329	i2c_dir_out();
330	i2c_clk(I2C_CLOCK_LOW);
331	i2c_delay(CLOCK_HIGH_TIME/4);
332	/*
333	* enable output
334	*/
335	i2c_dir_out();
336	/*
337	* remove ACK clock pulse
338	*/
339	i2c_data(I2C_DATA_HIGH);
340	i2c_delay(CLOCK_LOW_TIME/2);
341	return ack;
342	}
343
344	/*#---------------------------------------------------------------------------
345	*#
346	*# FUNCTION NAME: I2C::sendAck
347	*#
348	*# DESCRIPTION : Send ACK on received data
349	*#
350	#--------------------------------------------------------------------------/
351	void
352	i2c_sendack(void)
353	{
354	/*
355	* enable output
356	*/
357	i2c_delay(CLOCK_LOW_TIME);
358	i2c_dir_out();
359	/*
360	* set ack pulse high
361	*/
362	i2c_data(I2C_DATA_LOW);
363	/*
364	* generate clock pulse
365	*/
366	i2c_delay(CLOCK_HIGH_TIME/6);
367	i2c_clk(I2C_CLOCK_HIGH);
368	i2c_delay(CLOCK_HIGH_TIME);
369	i2c_clk(I2C_CLOCK_LOW);
370	i2c_delay(CLOCK_LOW_TIME/6);
371	/*
372	* reset data out
373	*/
374	i2c_data(I2C_DATA_HIGH);
375	i2c_delay(CLOCK_LOW_TIME);
376
377	i2c_dir_in();
378	}
379
380	/*#---------------------------------------------------------------------------
381	*#
382	*# FUNCTION NAME: i2c_sendnack
383	*#
384	*# DESCRIPTION : Sends NACK on received data
385	*#
386	#--------------------------------------------------------------------------/
387	void
388	i2c_sendnack(void)
389	{
390	/*
391	* enable output
392	*/
393	i2c_delay(CLOCK_LOW_TIME);
394	i2c_dir_out();
395	/*
396	* set data high
397	*/
398	i2c_data(I2C_DATA_HIGH);
399	/*
400	* generate clock pulse
401	*/
402	i2c_delay(CLOCK_HIGH_TIME/6);
403	i2c_clk(I2C_CLOCK_HIGH);
404	i2c_delay(CLOCK_HIGH_TIME);
405	i2c_clk(I2C_CLOCK_LOW);
406	i2c_delay(CLOCK_LOW_TIME);
407
408	i2c_dir_in();
409	}
410
411	/*#---------------------------------------------------------------------------
412	*#
413	*# FUNCTION NAME: i2c_writereg
414	*#
415	*# DESCRIPTION : Writes a value to an I2C device
416	*#
417	#--------------------------------------------------------------------------/
418	int
419	i2c_writereg(unsigned char theSlave, unsigned char theReg,
420	unsigned char theValue)
421	{
422	int error, cntr = 3;
423	unsigned long flags;
424
7e920426 MS	425	spin_lock(&i2c_lock);
7e920426 MS	426
1da177e4 LT	427	do {
	428	error = 0;
	429	/*
	430	* we don't like to be interrupted
	431	*/
	432	local_irq_save(flags);
1da177e4 LT	433
	434	i2c_start();
	435	/*
	436	* send slave address
	437	*/
	438	i2c_outbyte((theSlave & 0xfe));
	439	/*
	440	* wait for ack
	441	*/
	442	if(!i2c_getack())
	443	error = 1;
	444	/*
	445	* now select register
	446	*/
	447	i2c_dir_out();
	448	i2c_outbyte(theReg);
	449	/*
	450	* now it's time to wait for ack
	451	*/
	452	if(!i2c_getack())
	453	error \|= 2;
	454	/*
	455	* send register register data
	456	*/
	457	i2c_outbyte(theValue);
	458	/*
	459	* now it's time to wait for ack
	460	*/
	461	if(!i2c_getack())
	462	error \|= 4;
	463	/*
	464	* end byte stream
	465	*/
	466	i2c_stop();
	467	/*
	468	* enable interrupt again
	469	*/
	470	local_irq_restore(flags);
	471
	472	} while(error && cntr--);
	473
	474	i2c_delay(CLOCK_LOW_TIME);
	475
7e920426 MS	476	spin_unlock(&i2c_lock);
7e920426 MS	477
1da177e4 LT	478	return -error;
	479	}
	480
	481	/*#---------------------------------------------------------------------------
	482	*#
	483	*# FUNCTION NAME: i2c_readreg
	484	*#
	485	*# DESCRIPTION : Reads a value from the decoder registers.
	486	*#
	487	#--------------------------------------------------------------------------/
	488	unsigned char
	489	i2c_readreg(unsigned char theSlave, unsigned char theReg)
	490	{
	491	unsigned char b = 0;
	492	int error, cntr = 3;
	493	unsigned long flags;
	494
7e920426 MS	495	spin_lock(&i2c_lock);
7e920426 MS	496
1da177e4 LT	497	do {
	498	error = 0;
	499	/*
	500	* we don't like to be interrupted
	501	*/
	502	local_irq_save(flags);
1da177e4 LT	503	/*
	504	* generate start condition
	505	*/
	506	i2c_start();
	507
	508	/*
	509	* send slave address
	510	*/
	511	i2c_outbyte((theSlave & 0xfe));
	512	/*
	513	* wait for ack
	514	*/
	515	if(!i2c_getack())
	516	error = 1;
	517	/*
	518	* now select register
	519	*/
	520	i2c_dir_out();
	521	i2c_outbyte(theReg);
	522	/*
	523	* now it's time to wait for ack
	524	*/
	525	if(!i2c_getack())
	526	error = 1;
	527	/*
	528	* repeat start condition
	529	*/
	530	i2c_delay(CLOCK_LOW_TIME);
	531	i2c_start();
	532	/*
	533	* send slave address
	534	*/
	535	i2c_outbyte(theSlave \| 0x01);
	536	/*
	537	* wait for ack
	538	*/
	539	if(!i2c_getack())
	540	error = 1;
	541	/*
	542	* fetch register
	543	*/
	544	b = i2c_inbyte();
	545	/*
	546	* last received byte needs to be nacked
	547	* instead of acked
	548	*/
e5d5cf24	549	i2c_sendnack();
1da177e4 LT	550	/*
	551	* end sequence
	552	*/
	553	i2c_stop();
	554	/*
	555	* enable interrupt again
	556	*/
	557	local_irq_restore(flags);
	558
	559	} while(error && cntr--);
	560
7e920426 MS	561	spin_unlock(&i2c_lock);
7e920426 MS	562
1da177e4 LT	563	return b;
	564	}
	565
	566	static int
	567	i2c_open(struct inode inode, struct file filp)
	568	{
f2b9857e	569	cycle_kernel_lock();
1da177e4 LT	570	return 0;
	571	}
	572
	573	static int
	574	i2c_release(struct inode inode, struct file filp)
	575	{
	576	return 0;
	577	}
	578
	579	/* Main device API. ioctl's to write or read to/from i2c registers.
	580	*/
	581
	582	static int
	583	i2c_ioctl(struct inode inode, struct file file,
	584	unsigned int cmd, unsigned long arg)
	585	{
	586	if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) {
	587	return -EINVAL;
	588	}
	589
	590	switch (_IOC_NR(cmd)) {
	591	case I2C_WRITEREG:
	592	/* write to an i2c slave */
	593	D(printk("i2cw %d %d %d\n",
	594	I2C_ARGSLAVE(arg),
	595	I2C_ARGREG(arg),
	596	I2C_ARGVALUE(arg)));
	597
	598	return i2c_writereg(I2C_ARGSLAVE(arg),
	599	I2C_ARGREG(arg),
	600	I2C_ARGVALUE(arg));
	601	case I2C_READREG:
	602	{
	603	unsigned char val;
	604	/* read from an i2c slave */
	605	D(printk("i2cr %d %d ",
	606	I2C_ARGSLAVE(arg),
	607	I2C_ARGREG(arg)));
	608	val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg));
	609	D(printk("= %d\n", val));
	610	return val;
	611	}
	612	default:
	613	return -EINVAL;
	614
	615	}
	616
	617	return 0;
	618	}
	619
5dfe4c96	620	static const struct file_operations i2c_fops = {
1da177e4 LT	621	.owner = THIS_MODULE,
	622	.ioctl = i2c_ioctl,
	623	.open = i2c_open,
	624	.release = i2c_release,
	625	};
	626
	627	int __init
	628	i2c_init(void)
	629	{
7e920426 MS	630	static int res = 0;
	631	static int first = 1;
	632
	633	if (!first) {
	634	return res;
	635	}
e5d5cf24	636	first = 0;
7e920426	637
1da177e4 LT	638	/* Setup and enable the Port B I2C interface */
	639
	640	#ifndef CONFIG_ETRAX_I2C_USES_PB_NOT_PB_I2C
7e920426 MS	641	if ((res = cris_request_io_interface(if_i2c, "I2C"))) {
	642	printk(KERN_CRIT "i2c_init: Failed to get IO interface\n");
	643	return res;
	644	}
	645
1da177e4 LT	646	*R_PORT_PB_I2C = port_pb_i2c_shadow \|=
	647	IO_STATE(R_PORT_PB_I2C, i2c_en, on) \|
	648	IO_FIELD(R_PORT_PB_I2C, i2c_d, 1) \|
	649	IO_FIELD(R_PORT_PB_I2C, i2c_clk, 1) \|
	650	IO_STATE(R_PORT_PB_I2C, i2c_oe_, enable);
1da177e4 LT	651
	652	port_pb_dir_shadow &= ~IO_MASK(R_PORT_PB_DIR, dir0);
	653	port_pb_dir_shadow &= ~IO_MASK(R_PORT_PB_DIR, dir1);
	654
	655	*R_PORT_PB_DIR = (port_pb_dir_shadow \|=
	656	IO_STATE(R_PORT_PB_DIR, dir0, input) \|
	657	IO_STATE(R_PORT_PB_DIR, dir1, output));
7e920426 MS	658	#else
	659	if ((res = cris_io_interface_allocate_pins(if_i2c,
	660	'b',
	661	CONFIG_ETRAX_I2C_DATA_PORT,
	662	CONFIG_ETRAX_I2C_DATA_PORT))) {
	663	printk(KERN_WARNING "i2c_init: Failed to get IO pin for I2C data port\n");
	664	return res;
	665	} else if ((res = cris_io_interface_allocate_pins(if_i2c,
	666	'b',
	667	CONFIG_ETRAX_I2C_CLK_PORT,
	668	CONFIG_ETRAX_I2C_CLK_PORT))) {
	669	cris_io_interface_free_pins(if_i2c,
	670	'b',
	671	CONFIG_ETRAX_I2C_DATA_PORT,
	672	CONFIG_ETRAX_I2C_DATA_PORT);
	673	printk(KERN_WARNING "i2c_init: Failed to get IO pin for I2C clk port\n");
	674	}
	675	#endif
1da177e4	676
7e920426	677	return res;
1da177e4 LT	678	}
	679
	680	static int __init
	681	i2c_register(void)
	682	{
	683	int res;
	684
7e920426 MS	685	res = i2c_init();
	686	if (res < 0)
	687	return res;
1da177e4 LT	688	res = register_chrdev(I2C_MAJOR, i2c_name, &i2c_fops);
	689	if(res < 0) {
	690	printk(KERN_ERR "i2c: couldn't get a major number.\n");
	691	return res;
	692	}
	693
7e920426	694	printk(KERN_INFO "I2C driver v2.2, (c) 1999-2004 Axis Communications AB\n");
1da177e4 LT	695
	696	return 0;
	697	}
	698
	699	/* this makes sure that i2c_register is called during boot */
	700
	701	module_init(i2c_register);
	702
	703	/**************** END OF FILE i2c.c ******************************/