[thirdparty/kernel/linux.git] / arch / cris / include / arch-v10 / arch / io.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_ARCH_CRIS_IO_H
#define _ASM_ARCH_CRIS_IO_H

/* Etrax shadow registers - which live in arch/cris/kernel/shadows.c */

extern unsigned long gen_config_ii_shadow;
extern unsigned long port_g_data_shadow;
extern unsigned char port_pa_dir_shadow;
extern unsigned char port_pa_data_shadow;
extern unsigned char port_pb_i2c_shadow;
extern unsigned char port_pb_config_shadow;
extern unsigned char port_pb_dir_shadow;
extern unsigned char port_pb_data_shadow;
extern unsigned long r_timer_ctrl_shadow;

extern unsigned long port_cse1_shadow;
extern unsigned long port_csp0_shadow;
extern unsigned long port_csp4_shadow;

extern volatile unsigned long *port_cse1_addr;
extern volatile unsigned long *port_csp0_addr;
extern volatile unsigned long *port_csp4_addr;

/* macro for setting regs through a shadow -
 * r = register name (like R_PORT_PA_DATA)
 * s = shadow name (like port_pa_data_shadow)
 * b = bit number
 * v = value (0 or 1)
 */

#define REG_SHADOW_SET(r,s,b,v) *r = s = (s & ~(1 << (b))) | ((v) << (b))

/* The LED's on various Etrax-based products are set differently. */

#if defined(CONFIG_ETRAX_NO_LEDS)
#undef CONFIG_ETRAX_PA_LEDS
#undef CONFIG_ETRAX_PB_LEDS
#undef CONFIG_ETRAX_CSP0_LEDS
#define CRIS_LED_NETWORK_SET_G(x)
#define CRIS_LED_NETWORK_SET_R(x)
#define CRIS_LED_ACTIVE_SET_G(x)
#define CRIS_LED_ACTIVE_SET_R(x)
#define CRIS_LED_DISK_WRITE(x)
#define CRIS_LED_DISK_READ(x)
#endif

#if !defined(CONFIG_ETRAX_CSP0_LEDS)
#define CRIS_LED_BIT_SET(x)
#define CRIS_LED_BIT_CLR(x)
#endif

#define CRIS_LED_OFF    0x00
#define CRIS_LED_GREEN  0x01
#define CRIS_LED_RED    0x02
#define CRIS_LED_ORANGE (CRIS_LED_GREEN | CRIS_LED_RED)

#if defined(CONFIG_ETRAX_NO_LEDS)
#define CRIS_LED_NETWORK_SET(x)
#else
#if CONFIG_ETRAX_LED1G == CONFIG_ETRAX_LED1R
#define CRIS_LED_NETWORK_SET(x)                          \
	do {                                        \
		CRIS_LED_NETWORK_SET_G((x) & CRIS_LED_GREEN); \
	} while (0)
#else
#define CRIS_LED_NETWORK_SET(x)                          \
	do {                                        \
		CRIS_LED_NETWORK_SET_G((x) & CRIS_LED_GREEN); \
		CRIS_LED_NETWORK_SET_R((x) & CRIS_LED_RED);   \
	} while (0)
#endif
#if CONFIG_ETRAX_LED2G == CONFIG_ETRAX_LED2R
#define CRIS_LED_ACTIVE_SET(x)                           \
	do {                                        \
		CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN);  \
	} while (0)
#else
#define CRIS_LED_ACTIVE_SET(x)                           \
	do {                                        \
		CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN);  \
		CRIS_LED_ACTIVE_SET_R((x) & CRIS_LED_RED);    \
	} while (0)
#endif
#endif

#ifdef CONFIG_ETRAX_PA_LEDS
#define CRIS_LED_NETWORK_SET_G(x) \
         REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1G, !(x))
#define CRIS_LED_NETWORK_SET_R(x) \
         REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1R, !(x))
#define CRIS_LED_ACTIVE_SET_G(x) \
         REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2G, !(x))
#define CRIS_LED_ACTIVE_SET_R(x) \
         REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2R, !(x))
#define CRIS_LED_DISK_WRITE(x) \
         do{\
                REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
                REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
        }while(0)
#define CRIS_LED_DISK_READ(x) \
	REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, \
		CONFIG_ETRAX_LED3G, !(x))
#endif

#ifdef CONFIG_ETRAX_PB_LEDS
#define CRIS_LED_NETWORK_SET_G(x) \
         REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1G, !(x))
#define CRIS_LED_NETWORK_SET_R(x) \
         REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1R, !(x))
#define CRIS_LED_ACTIVE_SET_G(x) \
         REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2G, !(x))
#define CRIS_LED_ACTIVE_SET_R(x) \
         REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2R, !(x))
#define CRIS_LED_DISK_WRITE(x) \
        do{\
                REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
                REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
        }while(0)
#define CRIS_LED_DISK_READ(x) \
	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, \
		CONFIG_ETRAX_LED3G, !(x))
#endif

#ifdef CONFIG_ETRAX_CSP0_LEDS
#define CONFIGURABLE_LEDS\
        ((1 << CONFIG_ETRAX_LED1G ) | (1 << CONFIG_ETRAX_LED1R ) |\
         (1 << CONFIG_ETRAX_LED2G ) | (1 << CONFIG_ETRAX_LED2R ) |\
         (1 << CONFIG_ETRAX_LED3G ) | (1 << CONFIG_ETRAX_LED3R ) |\
         (1 << CONFIG_ETRAX_LED4G ) | (1 << CONFIG_ETRAX_LED4R ) |\
         (1 << CONFIG_ETRAX_LED5G ) | (1 << CONFIG_ETRAX_LED5R ) |\
         (1 << CONFIG_ETRAX_LED6G ) | (1 << CONFIG_ETRAX_LED6R ) |\
         (1 << CONFIG_ETRAX_LED7G ) | (1 << CONFIG_ETRAX_LED7R ) |\
         (1 << CONFIG_ETRAX_LED8Y ) | (1 << CONFIG_ETRAX_LED9Y ) |\
         (1 << CONFIG_ETRAX_LED10Y ) |(1 << CONFIG_ETRAX_LED11Y )|\
         (1 << CONFIG_ETRAX_LED12R ))

#define CRIS_LED_NETWORK_SET_G(x) \
         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1G, !(x))
#define CRIS_LED_NETWORK_SET_R(x) \
         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1R, !(x))
#define CRIS_LED_ACTIVE_SET_G(x) \
         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2G, !(x))
#define CRIS_LED_ACTIVE_SET_R(x) \
         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2R, !(x))
#define CRIS_LED_DISK_WRITE(x) \
        do{\
                REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x));\
                REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3R, !(x));\
        }while(0)
#define CRIS_LED_DISK_READ(x) \
         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x))
#define CRIS_LED_BIT_SET(x)\
        do{\
                if((( 1 << x) & CONFIGURABLE_LEDS)  != 0)\
                       REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 1);\
        }while(0)
#define CRIS_LED_BIT_CLR(x)\
        do{\
                if((( 1 << x) & CONFIGURABLE_LEDS)  != 0)\
                       REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 0);\
        }while(0)
#endif

#
#ifdef CONFIG_ETRAX_SOFT_SHUTDOWN
#define SOFT_SHUTDOWN() \
          REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_SHUTDOWN_BIT, 1)
#else
#define SOFT_SHUTDOWN()
#endif

#endif
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
1da177e4 LT	2	#ifndef _ASM_ARCH_CRIS_IO_H
	3	#define _ASM_ARCH_CRIS_IO_H
	4
1da177e4 LT	5	/* Etrax shadow registers - which live in arch/cris/kernel/shadows.c */
1da177e4 LT	6
63245d2c	7	extern unsigned long gen_config_ii_shadow;
1da177e4 LT	8	extern unsigned long port_g_data_shadow;
	9	extern unsigned char port_pa_dir_shadow;
	10	extern unsigned char port_pa_data_shadow;
	11	extern unsigned char port_pb_i2c_shadow;
	12	extern unsigned char port_pb_config_shadow;
	13	extern unsigned char port_pb_dir_shadow;
	14	extern unsigned char port_pb_data_shadow;
	15	extern unsigned long r_timer_ctrl_shadow;
	16
	17	extern unsigned long port_cse1_shadow;
	18	extern unsigned long port_csp0_shadow;
	19	extern unsigned long port_csp4_shadow;
	20
	21	extern volatile unsigned long *port_cse1_addr;
	22	extern volatile unsigned long *port_csp0_addr;
	23	extern volatile unsigned long *port_csp4_addr;
	24
0d9f2e6f	25	/* macro for setting regs through a shadow -
1da177e4 LT	26	* r = register name (like R_PORT_PA_DATA)
	27	* s = shadow name (like port_pa_data_shadow)
	28	* b = bit number
	29	* v = value (0 or 1)
	30	*/
	31
	32	#define REG_SHADOW_SET(r,s,b,v) *r = s = (s & ~(1 << (b))) \| ((v) << (b))
	33
	34	/* The LED's on various Etrax-based products are set differently. */
	35
e269a869	36	#if defined(CONFIG_ETRAX_NO_LEDS)
1da177e4 LT	37	#undef CONFIG_ETRAX_PA_LEDS
	38	#undef CONFIG_ETRAX_PB_LEDS
	39	#undef CONFIG_ETRAX_CSP0_LEDS
0d9f2e6f JN	40	#define CRIS_LED_NETWORK_SET_G(x)
	41	#define CRIS_LED_NETWORK_SET_R(x)
	42	#define CRIS_LED_ACTIVE_SET_G(x)
	43	#define CRIS_LED_ACTIVE_SET_R(x)
	44	#define CRIS_LED_DISK_WRITE(x)
	45	#define CRIS_LED_DISK_READ(x)
1da177e4 LT	46	#endif
	47
	48	#if !defined(CONFIG_ETRAX_CSP0_LEDS)
0d9f2e6f JN	49	#define CRIS_LED_BIT_SET(x)
0d9f2e6f JN	50	#define CRIS_LED_BIT_CLR(x)
1da177e4 LT	51	#endif
1da177e4 LT	52
0d9f2e6f JN	53	#define CRIS_LED_OFF 0x00
	54	#define CRIS_LED_GREEN 0x01
	55	#define CRIS_LED_RED 0x02
	56	#define CRIS_LED_ORANGE (CRIS_LED_GREEN \| CRIS_LED_RED)
1da177e4	57
0d9f2e6f JN	58	#if defined(CONFIG_ETRAX_NO_LEDS)
	59	#define CRIS_LED_NETWORK_SET(x)
	60	#else
	61	#if CONFIG_ETRAX_LED1G == CONFIG_ETRAX_LED1R
	62	#define CRIS_LED_NETWORK_SET(x) \
1da177e4	63	do { \
0d9f2e6f	64	CRIS_LED_NETWORK_SET_G((x) & CRIS_LED_GREEN); \
1da177e4 LT	65	} while (0)
1da177e4 LT	66	#else
0d9f2e6f	67	#define CRIS_LED_NETWORK_SET(x) \
1da177e4	68	do { \
0d9f2e6f JN	69	CRIS_LED_NETWORK_SET_G((x) & CRIS_LED_GREEN); \
0d9f2e6f JN	70	CRIS_LED_NETWORK_SET_R((x) & CRIS_LED_RED); \
1da177e4 LT	71	} while (0)
1da177e4 LT	72	#endif
0d9f2e6f JN	73	#if CONFIG_ETRAX_LED2G == CONFIG_ETRAX_LED2R
0d9f2e6f JN	74	#define CRIS_LED_ACTIVE_SET(x) \
1da177e4	75	do { \
0d9f2e6f	76	CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN); \
1da177e4 LT	77	} while (0)
1da177e4 LT	78	#else
0d9f2e6f	79	#define CRIS_LED_ACTIVE_SET(x) \
1da177e4	80	do { \
0d9f2e6f JN	81	CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN); \
0d9f2e6f JN	82	CRIS_LED_ACTIVE_SET_R((x) & CRIS_LED_RED); \
1da177e4 LT	83	} while (0)
1da177e4 LT	84	#endif
0d9f2e6f	85	#endif
1da177e4 LT	86
1da177e4 LT	87	#ifdef CONFIG_ETRAX_PA_LEDS
0d9f2e6f	88	#define CRIS_LED_NETWORK_SET_G(x) \
1da177e4	89	REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1G, !(x))
0d9f2e6f	90	#define CRIS_LED_NETWORK_SET_R(x) \
1da177e4	91	REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1R, !(x))
0d9f2e6f	92	#define CRIS_LED_ACTIVE_SET_G(x) \
1da177e4	93	REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2G, !(x))
0d9f2e6f	94	#define CRIS_LED_ACTIVE_SET_R(x) \
1da177e4	95	REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2R, !(x))
0d9f2e6f	96	#define CRIS_LED_DISK_WRITE(x) \
1da177e4 LT	97	do{\
	98	REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
	99	REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
	100	}while(0)
0d9f2e6f JN	101	#define CRIS_LED_DISK_READ(x) \
	102	REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, \
	103	CONFIG_ETRAX_LED3G, !(x))
1da177e4 LT	104	#endif
	105
	106	#ifdef CONFIG_ETRAX_PB_LEDS
0d9f2e6f	107	#define CRIS_LED_NETWORK_SET_G(x) \
1da177e4	108	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1G, !(x))
0d9f2e6f	109	#define CRIS_LED_NETWORK_SET_R(x) \
1da177e4	110	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1R, !(x))
0d9f2e6f	111	#define CRIS_LED_ACTIVE_SET_G(x) \
1da177e4	112	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2G, !(x))
0d9f2e6f	113	#define CRIS_LED_ACTIVE_SET_R(x) \
1da177e4	114	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2R, !(x))
0d9f2e6f	115	#define CRIS_LED_DISK_WRITE(x) \
1da177e4 LT	116	do{\
	117	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
	118	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
	119	}while(0)
0d9f2e6f JN	120	#define CRIS_LED_DISK_READ(x) \
	121	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, \
	122	CONFIG_ETRAX_LED3G, !(x))
1da177e4 LT	123	#endif
	124
	125	#ifdef CONFIG_ETRAX_CSP0_LEDS
	126	#define CONFIGURABLE_LEDS\
	127	((1 << CONFIG_ETRAX_LED1G ) \| (1 << CONFIG_ETRAX_LED1R ) \|\
	128	(1 << CONFIG_ETRAX_LED2G ) \| (1 << CONFIG_ETRAX_LED2R ) \|\
	129	(1 << CONFIG_ETRAX_LED3G ) \| (1 << CONFIG_ETRAX_LED3R ) \|\
	130	(1 << CONFIG_ETRAX_LED4G ) \| (1 << CONFIG_ETRAX_LED4R ) \|\
	131	(1 << CONFIG_ETRAX_LED5G ) \| (1 << CONFIG_ETRAX_LED5R ) \|\
	132	(1 << CONFIG_ETRAX_LED6G ) \| (1 << CONFIG_ETRAX_LED6R ) \|\
	133	(1 << CONFIG_ETRAX_LED7G ) \| (1 << CONFIG_ETRAX_LED7R ) \|\
	134	(1 << CONFIG_ETRAX_LED8Y ) \| (1 << CONFIG_ETRAX_LED9Y ) \|\
	135	(1 << CONFIG_ETRAX_LED10Y ) \|(1 << CONFIG_ETRAX_LED11Y )\|\
	136	(1 << CONFIG_ETRAX_LED12R ))
	137
0d9f2e6f	138	#define CRIS_LED_NETWORK_SET_G(x) \
1da177e4	139	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1G, !(x))
0d9f2e6f	140	#define CRIS_LED_NETWORK_SET_R(x) \
1da177e4	141	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1R, !(x))
0d9f2e6f	142	#define CRIS_LED_ACTIVE_SET_G(x) \
1da177e4	143	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2G, !(x))
0d9f2e6f	144	#define CRIS_LED_ACTIVE_SET_R(x) \
1da177e4	145	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2R, !(x))
0d9f2e6f	146	#define CRIS_LED_DISK_WRITE(x) \
1da177e4 LT	147	do{\
	148	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x));\
	149	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3R, !(x));\
	150	}while(0)
0d9f2e6f	151	#define CRIS_LED_DISK_READ(x) \
1da177e4	152	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x))
0d9f2e6f	153	#define CRIS_LED_BIT_SET(x)\
1da177e4 LT	154	do{\
	155	if((( 1 << x) & CONFIGURABLE_LEDS) != 0)\
	156	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 1);\
	157	}while(0)
0d9f2e6f	158	#define CRIS_LED_BIT_CLR(x)\
1da177e4 LT	159	do{\
	160	if((( 1 << x) & CONFIGURABLE_LEDS) != 0)\
	161	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 0);\
	162	}while(0)
	163	#endif
	164
	165	#
	166	#ifdef CONFIG_ETRAX_SOFT_SHUTDOWN
	167	#define SOFT_SHUTDOWN() \
	168	REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_SHUTDOWN_BIT, 1)
	169	#else
	170	#define SOFT_SHUTDOWN()
	171	#endif
	172
1da177e4	173	#endif