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License cleanup: add SPDX GPL-2.0 license identifier to files with no license
[people/arne_f/kernel.git] / arch / cris / include / arch-v32 / arch / hwregs / extmem_defs.h
CommitLineData
b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
51533b61
MS		 2#ifndef __extmem_defs_h
3#define __extmem_defs_h
4
5/*
6 * This file is autogenerated from
7 * file: ../../inst/ext_mem/mod/extmem_regs.r
8 * id: extmem_regs.r,v 1.1 2004/02/16 13:29:30 np Exp
9 * last modfied: Tue Mar 30 22:26:21 2004
10 *
11 * by /n/asic/design/tools/rdesc/src/rdes2c --outfile extmem_defs.h ../../inst/ext_mem/mod/extmem_regs.r
12 * id: $Id: extmem_defs.h,v 1.5 2004/06/04 07:15:33 starvik Exp $
13 * Any changes here will be lost.
14 *
15 * -*- buffer-read-only: t -*-
16 */
17/* Main access macros */
18#ifndef REG_RD
19#define REG_RD( scope, inst, reg ) \
20 REG_READ( reg_##scope##_##reg, \
21 (inst) + REG_RD_ADDR_##scope##_##reg )
22#endif
23
24#ifndef REG_WR
25#define REG_WR( scope, inst, reg, val ) \
26 REG_WRITE( reg_##scope##_##reg, \
27 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
28#endif
29
30#ifndef REG_RD_VECT
31#define REG_RD_VECT( scope, inst, reg, index ) \
32 REG_READ( reg_##scope##_##reg, \
33 (inst) + REG_RD_ADDR_##scope##_##reg + \
34 (index) * STRIDE_##scope##_##reg )
35#endif
36
37#ifndef REG_WR_VECT
38#define REG_WR_VECT( scope, inst, reg, index, val ) \
39 REG_WRITE( reg_##scope##_##reg, \
40 (inst) + REG_WR_ADDR_##scope##_##reg + \
41 (index) * STRIDE_##scope##_##reg, (val) )
42#endif
43
44#ifndef REG_RD_INT
45#define REG_RD_INT( scope, inst, reg ) \
46 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
47#endif
48
49#ifndef REG_WR_INT
50#define REG_WR_INT( scope, inst, reg, val ) \
51 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
52#endif
53
54#ifndef REG_RD_INT_VECT
55#define REG_RD_INT_VECT( scope, inst, reg, index ) \
56 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
57 (index) * STRIDE_##scope##_##reg )
58#endif
59
60#ifndef REG_WR_INT_VECT
61#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
62 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
63 (index) * STRIDE_##scope##_##reg, (val) )
64#endif
65
66#ifndef REG_TYPE_CONV
67#define REG_TYPE_CONV( type, orgtype, val ) \
68 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
69#endif
70
71#ifndef reg_page_size
72#define reg_page_size 8192
73#endif
74
75#ifndef REG_ADDR
76#define REG_ADDR( scope, inst, reg ) \
77 ( (inst) + REG_RD_ADDR_##scope##_##reg )
78#endif
79
80#ifndef REG_ADDR_VECT
81#define REG_ADDR_VECT( scope, inst, reg, index ) \
82 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
83 (index) * STRIDE_##scope##_##reg )
84#endif
85
86/* C-code for register scope extmem */
87
88/* Register rw_cse0_cfg, scope extmem, type rw */
89typedef struct {
90 unsigned int lw : 6;
91 unsigned int ew : 3;
92 unsigned int zw : 3;
93 unsigned int aw : 2;
94 unsigned int dw : 2;
95 unsigned int ewb : 2;
96 unsigned int bw : 1;
97 unsigned int mode : 1;
98 unsigned int erc_en : 1;
99 unsigned int dummy1 : 6;
100 unsigned int size : 3;
101 unsigned int log : 1;
102 unsigned int en : 1;
103} reg_extmem_rw_cse0_cfg;
104#define REG_RD_ADDR_extmem_rw_cse0_cfg 0
105#define REG_WR_ADDR_extmem_rw_cse0_cfg 0
106
107/* Register rw_cse1_cfg, scope extmem, type rw */
108typedef struct {
109 unsigned int lw : 6;
110 unsigned int ew : 3;
111 unsigned int zw : 3;
112 unsigned int aw : 2;
113 unsigned int dw : 2;
114 unsigned int ewb : 2;
115 unsigned int bw : 1;
116 unsigned int mode : 1;
117 unsigned int erc_en : 1;
118 unsigned int dummy1 : 6;
119 unsigned int size : 3;
120 unsigned int log : 1;
121 unsigned int en : 1;
122} reg_extmem_rw_cse1_cfg;
123#define REG_RD_ADDR_extmem_rw_cse1_cfg 4
124#define REG_WR_ADDR_extmem_rw_cse1_cfg 4
125
126/* Register rw_csr0_cfg, scope extmem, type rw */
127typedef struct {
128 unsigned int lw : 6;
129 unsigned int ew : 3;
130 unsigned int zw : 3;
131 unsigned int aw : 2;
132 unsigned int dw : 2;
133 unsigned int ewb : 2;
134 unsigned int bw : 1;
135 unsigned int mode : 1;
136 unsigned int erc_en : 1;
137 unsigned int dummy1 : 6;
138 unsigned int size : 3;
139 unsigned int log : 1;
140 unsigned int en : 1;
141} reg_extmem_rw_csr0_cfg;
142#define REG_RD_ADDR_extmem_rw_csr0_cfg 8
143#define REG_WR_ADDR_extmem_rw_csr0_cfg 8
144
145/* Register rw_csr1_cfg, scope extmem, type rw */
146typedef struct {
147 unsigned int lw : 6;
148 unsigned int ew : 3;
149 unsigned int zw : 3;
150 unsigned int aw : 2;
151 unsigned int dw : 2;
152 unsigned int ewb : 2;
153 unsigned int bw : 1;
154 unsigned int mode : 1;
155 unsigned int erc_en : 1;
156 unsigned int dummy1 : 6;
157 unsigned int size : 3;
158 unsigned int log : 1;
159 unsigned int en : 1;
160} reg_extmem_rw_csr1_cfg;
161#define REG_RD_ADDR_extmem_rw_csr1_cfg 12
162#define REG_WR_ADDR_extmem_rw_csr1_cfg 12
163
164/* Register rw_csp0_cfg, scope extmem, type rw */
165typedef struct {
166 unsigned int lw : 6;
167 unsigned int ew : 3;
168 unsigned int zw : 3;
169 unsigned int aw : 2;
170 unsigned int dw : 2;
171 unsigned int ewb : 2;
172 unsigned int bw : 1;
173 unsigned int mode : 1;
174 unsigned int erc_en : 1;
175 unsigned int dummy1 : 6;
176 unsigned int size : 3;
177 unsigned int log : 1;
178 unsigned int en : 1;
179} reg_extmem_rw_csp0_cfg;
180#define REG_RD_ADDR_extmem_rw_csp0_cfg 16
181#define REG_WR_ADDR_extmem_rw_csp0_cfg 16
182
183/* Register rw_csp1_cfg, scope extmem, type rw */
184typedef struct {
185 unsigned int lw : 6;
186 unsigned int ew : 3;
187 unsigned int zw : 3;
188 unsigned int aw : 2;
189 unsigned int dw : 2;
190 unsigned int ewb : 2;
191 unsigned int bw : 1;
192 unsigned int mode : 1;
193 unsigned int erc_en : 1;
194 unsigned int dummy1 : 6;
195 unsigned int size : 3;
196 unsigned int log : 1;
197 unsigned int en : 1;
198} reg_extmem_rw_csp1_cfg;
199#define REG_RD_ADDR_extmem_rw_csp1_cfg 20
200#define REG_WR_ADDR_extmem_rw_csp1_cfg 20
201
202/* Register rw_csp2_cfg, scope extmem, type rw */
203typedef struct {
204 unsigned int lw : 6;
205 unsigned int ew : 3;
206 unsigned int zw : 3;
207 unsigned int aw : 2;
208 unsigned int dw : 2;
209 unsigned int ewb : 2;
210 unsigned int bw : 1;
211 unsigned int mode : 1;
212 unsigned int erc_en : 1;
213 unsigned int dummy1 : 6;
214 unsigned int size : 3;
215 unsigned int log : 1;
216 unsigned int en : 1;
217} reg_extmem_rw_csp2_cfg;
218#define REG_RD_ADDR_extmem_rw_csp2_cfg 24
219#define REG_WR_ADDR_extmem_rw_csp2_cfg 24
220
221/* Register rw_csp3_cfg, scope extmem, type rw */
222typedef struct {
223 unsigned int lw : 6;
224 unsigned int ew : 3;
225 unsigned int zw : 3;
226 unsigned int aw : 2;
227 unsigned int dw : 2;
228 unsigned int ewb : 2;
229 unsigned int bw : 1;
230 unsigned int mode : 1;
231 unsigned int erc_en : 1;
232 unsigned int dummy1 : 6;
233 unsigned int size : 3;
234 unsigned int log : 1;
235 unsigned int en : 1;
236} reg_extmem_rw_csp3_cfg;
237#define REG_RD_ADDR_extmem_rw_csp3_cfg 28
238#define REG_WR_ADDR_extmem_rw_csp3_cfg 28
239
240/* Register rw_csp4_cfg, scope extmem, type rw */
241typedef struct {
242 unsigned int lw : 6;
243 unsigned int ew : 3;
244 unsigned int zw : 3;
245 unsigned int aw : 2;
246 unsigned int dw : 2;
247 unsigned int ewb : 2;
248 unsigned int bw : 1;
249 unsigned int mode : 1;
250 unsigned int erc_en : 1;
251 unsigned int dummy1 : 6;
252 unsigned int size : 3;
253 unsigned int log : 1;
254 unsigned int en : 1;
255} reg_extmem_rw_csp4_cfg;
256#define REG_RD_ADDR_extmem_rw_csp4_cfg 32
257#define REG_WR_ADDR_extmem_rw_csp4_cfg 32
258
259/* Register rw_csp5_cfg, scope extmem, type rw */
260typedef struct {
261 unsigned int lw : 6;
262 unsigned int ew : 3;
263 unsigned int zw : 3;
264 unsigned int aw : 2;
265 unsigned int dw : 2;
266 unsigned int ewb : 2;
267 unsigned int bw : 1;
268 unsigned int mode : 1;
269 unsigned int erc_en : 1;
270 unsigned int dummy1 : 6;
271 unsigned int size : 3;
272 unsigned int log : 1;
273 unsigned int en : 1;
274} reg_extmem_rw_csp5_cfg;
275#define REG_RD_ADDR_extmem_rw_csp5_cfg 36
276#define REG_WR_ADDR_extmem_rw_csp5_cfg 36
277
278/* Register rw_csp6_cfg, scope extmem, type rw */
279typedef struct {
280 unsigned int lw : 6;
281 unsigned int ew : 3;
282 unsigned int zw : 3;
283 unsigned int aw : 2;
284 unsigned int dw : 2;
285 unsigned int ewb : 2;
286 unsigned int bw : 1;
287 unsigned int mode : 1;
288 unsigned int erc_en : 1;
289 unsigned int dummy1 : 6;
290 unsigned int size : 3;
291 unsigned int log : 1;
292 unsigned int en : 1;
293} reg_extmem_rw_csp6_cfg;
294#define REG_RD_ADDR_extmem_rw_csp6_cfg 40
295#define REG_WR_ADDR_extmem_rw_csp6_cfg 40
296
297/* Register rw_css_cfg, scope extmem, type rw */
298typedef struct {
299 unsigned int lw : 6;
300 unsigned int ew : 3;
301 unsigned int zw : 3;
302 unsigned int aw : 2;
303 unsigned int dw : 2;
304 unsigned int ewb : 2;
305 unsigned int bw : 1;
306 unsigned int mode : 1;
307 unsigned int erc_en : 1;
308 unsigned int dummy1 : 6;
309 unsigned int size : 3;
310 unsigned int log : 1;
311 unsigned int en : 1;
312} reg_extmem_rw_css_cfg;
313#define REG_RD_ADDR_extmem_rw_css_cfg 44
314#define REG_WR_ADDR_extmem_rw_css_cfg 44
315
316/* Register rw_status_handle, scope extmem, type rw */
317typedef struct {
318 unsigned int h : 32;
319} reg_extmem_rw_status_handle;
320#define REG_RD_ADDR_extmem_rw_status_handle 48
321#define REG_WR_ADDR_extmem_rw_status_handle 48
322
323/* Register rw_wait_pin, scope extmem, type rw */
324typedef struct {
325 unsigned int val : 16;
326 unsigned int dummy1 : 15;
327 unsigned int start : 1;
328} reg_extmem_rw_wait_pin;
329#define REG_RD_ADDR_extmem_rw_wait_pin 52
330#define REG_WR_ADDR_extmem_rw_wait_pin 52
331
332/* Register rw_gated_csp, scope extmem, type rw */
333typedef struct {
334 unsigned int dummy1 : 31;
335 unsigned int en : 1;
336} reg_extmem_rw_gated_csp;
337#define REG_RD_ADDR_extmem_rw_gated_csp 56
338#define REG_WR_ADDR_extmem_rw_gated_csp 56
339
340
341/* Constants */
342enum {
343 regk_extmem_b16 = 0x00000001,
344 regk_extmem_b32 = 0x00000000,
345 regk_extmem_bwe = 0x00000000,
346 regk_extmem_cwe = 0x00000001,
347 regk_extmem_no = 0x00000000,
348 regk_extmem_rw_cse0_cfg_default = 0x000006cf,
349 regk_extmem_rw_cse1_cfg_default = 0x000006cf,
350 regk_extmem_rw_csp0_cfg_default = 0x000006cf,
351 regk_extmem_rw_csp1_cfg_default = 0x000006cf,
352 regk_extmem_rw_csp2_cfg_default = 0x000006cf,
353 regk_extmem_rw_csp3_cfg_default = 0x000006cf,
354 regk_extmem_rw_csp4_cfg_default = 0x000006cf,
355 regk_extmem_rw_csp5_cfg_default = 0x000006cf,
356 regk_extmem_rw_csp6_cfg_default = 0x000006cf,
357 regk_extmem_rw_csr0_cfg_default = 0x000006cf,
358 regk_extmem_rw_csr1_cfg_default = 0x000006cf,
359 regk_extmem_rw_css_cfg_default = 0x000006cf,
360 regk_extmem_s128KB = 0x00000000,
361 regk_extmem_s16MB = 0x00000005,
362 regk_extmem_s1MB = 0x00000001,
363 regk_extmem_s2MB = 0x00000002,
364 regk_extmem_s32MB = 0x00000006,
365 regk_extmem_s4MB = 0x00000003,
366 regk_extmem_s64MB = 0x00000007,
367 regk_extmem_s8MB = 0x00000004,
368 regk_extmem_yes = 0x00000001
369};
370#endif /* __extmem_defs_h */
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