[thirdparty/linux.git] / arch / cris / include / arch-v32 / arch / hwregs / marb_bp_defs.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __marb_bp_defs_h
#define __marb_bp_defs_h

/*
 * This file is autogenerated from
 *   file:           ../../inst/memarb/rtl/guinness/marb_top.r
 *     id:           <not found>
 *     last modfied: Fri Nov  7 15:36:04 2003
 *
 *   by /n/asic/projects/guinness/design/top/inst/rdesc/rdes2c ../../rtl/global.rmap ../../mod/modreg.rmap -base 0xb0000000 ../../inst/memarb/rtl/guinness/marb_top.r
 *      id: $Id: marb_bp_defs.h,v 1.2 2004/06/04 07:15:33 starvik Exp $
 * Any changes here will be lost.
 *
 * -*- buffer-read-only: t -*-
 */
/* Main access macros */
#ifndef REG_RD
#define REG_RD( scope, inst, reg ) \
  REG_READ( reg_##scope##_##reg, \
            (inst) + REG_RD_ADDR_##scope##_##reg )
#endif

#ifndef REG_WR
#define REG_WR( scope, inst, reg, val ) \
  REG_WRITE( reg_##scope##_##reg, \
             (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
#endif

#ifndef REG_RD_VECT
#define REG_RD_VECT( scope, inst, reg, index ) \
  REG_READ( reg_##scope##_##reg, \
            (inst) + REG_RD_ADDR_##scope##_##reg + \
	    (index) * STRIDE_##scope##_##reg )
#endif

#ifndef REG_WR_VECT
#define REG_WR_VECT( scope, inst, reg, index, val ) \
  REG_WRITE( reg_##scope##_##reg, \
             (inst) + REG_WR_ADDR_##scope##_##reg + \
	     (index) * STRIDE_##scope##_##reg, (val) )
#endif

#ifndef REG_RD_INT
#define REG_RD_INT( scope, inst, reg ) \
  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
#endif

#ifndef REG_WR_INT
#define REG_WR_INT( scope, inst, reg, val ) \
  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
#endif

#ifndef REG_RD_INT_VECT
#define REG_RD_INT_VECT( scope, inst, reg, index ) \
  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
	    (index) * STRIDE_##scope##_##reg )
#endif

#ifndef REG_WR_INT_VECT
#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
	     (index) * STRIDE_##scope##_##reg, (val) )
#endif

#ifndef REG_TYPE_CONV
#define REG_TYPE_CONV( type, orgtype, val ) \
  ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
#endif

#ifndef reg_page_size
#define reg_page_size 8192
#endif

/* C-code for register scope marb_bp */

/* Register rw_first_addr, scope marb_bp, type rw */
typedef unsigned int reg_marb_bp_rw_first_addr;
#define REG_RD_ADDR_marb_bp_rw_first_addr 0
#define REG_WR_ADDR_marb_bp_rw_first_addr 0

/* Register rw_last_addr, scope marb_bp, type rw */
typedef unsigned int reg_marb_bp_rw_last_addr;
#define REG_RD_ADDR_marb_bp_rw_last_addr 4
#define REG_WR_ADDR_marb_bp_rw_last_addr 4

/* Register rw_op, scope marb_bp, type rw */
typedef struct {
  unsigned int read         : 1;
  unsigned int write        : 1;
  unsigned int read_excl    : 1;
  unsigned int pri_write    : 1;
  unsigned int us_read      : 1;
  unsigned int us_write     : 1;
  unsigned int us_read_excl : 1;
  unsigned int us_pri_write : 1;
  unsigned int dummy1       : 24;
} reg_marb_bp_rw_op;
#define REG_RD_ADDR_marb_bp_rw_op 8
#define REG_WR_ADDR_marb_bp_rw_op 8

/* Register rw_clients, scope marb_bp, type rw */
typedef struct {
  unsigned int dma0  : 1;
  unsigned int dma1  : 1;
  unsigned int dma2  : 1;
  unsigned int dma3  : 1;
  unsigned int dma4  : 1;
  unsigned int dma5  : 1;
  unsigned int dma6  : 1;
  unsigned int dma7  : 1;
  unsigned int dma8  : 1;
  unsigned int dma9  : 1;
  unsigned int cpui  : 1;
  unsigned int cpud  : 1;
  unsigned int iop   : 1;
  unsigned int slave : 1;
  unsigned int dummy1 : 18;
} reg_marb_bp_rw_clients;
#define REG_RD_ADDR_marb_bp_rw_clients 12
#define REG_WR_ADDR_marb_bp_rw_clients 12

/* Register rw_options, scope marb_bp, type rw */
typedef struct {
  unsigned int wrap : 1;
  unsigned int dummy1 : 31;
} reg_marb_bp_rw_options;
#define REG_RD_ADDR_marb_bp_rw_options 16
#define REG_WR_ADDR_marb_bp_rw_options 16

/* Register r_break_addr, scope marb_bp, type r */
typedef unsigned int reg_marb_bp_r_break_addr;
#define REG_RD_ADDR_marb_bp_r_break_addr 20

/* Register r_break_op, scope marb_bp, type r */
typedef struct {
  unsigned int read         : 1;
  unsigned int write        : 1;
  unsigned int read_excl    : 1;
  unsigned int pri_write    : 1;
  unsigned int us_read      : 1;
  unsigned int us_write     : 1;
  unsigned int us_read_excl : 1;
  unsigned int us_pri_write : 1;
  unsigned int dummy1       : 24;
} reg_marb_bp_r_break_op;
#define REG_RD_ADDR_marb_bp_r_break_op 24

/* Register r_break_clients, scope marb_bp, type r */
typedef struct {
  unsigned int dma0  : 1;
  unsigned int dma1  : 1;
  unsigned int dma2  : 1;
  unsigned int dma3  : 1;
  unsigned int dma4  : 1;
  unsigned int dma5  : 1;
  unsigned int dma6  : 1;
  unsigned int dma7  : 1;
  unsigned int dma8  : 1;
  unsigned int dma9  : 1;
  unsigned int cpui  : 1;
  unsigned int cpud  : 1;
  unsigned int iop   : 1;
  unsigned int slave : 1;
  unsigned int dummy1 : 18;
} reg_marb_bp_r_break_clients;
#define REG_RD_ADDR_marb_bp_r_break_clients 28

/* Register r_break_first_client, scope marb_bp, type r */
typedef struct {
  unsigned int dma0  : 1;
  unsigned int dma1  : 1;
  unsigned int dma2  : 1;
  unsigned int dma3  : 1;
  unsigned int dma4  : 1;
  unsigned int dma5  : 1;
  unsigned int dma6  : 1;
  unsigned int dma7  : 1;
  unsigned int dma8  : 1;
  unsigned int dma9  : 1;
  unsigned int cpui  : 1;
  unsigned int cpud  : 1;
  unsigned int iop   : 1;
  unsigned int slave : 1;
  unsigned int dummy1 : 18;
} reg_marb_bp_r_break_first_client;
#define REG_RD_ADDR_marb_bp_r_break_first_client 32

/* Register r_break_size, scope marb_bp, type r */
typedef unsigned int reg_marb_bp_r_break_size;
#define REG_RD_ADDR_marb_bp_r_break_size 36

/* Register rw_ack, scope marb_bp, type rw */
typedef unsigned int reg_marb_bp_rw_ack;
#define REG_RD_ADDR_marb_bp_rw_ack 40
#define REG_WR_ADDR_marb_bp_rw_ack 40


/* Constants */
enum {
  regk_marb_bp_no                          = 0x00000000,
  regk_marb_bp_rw_op_default               = 0x00000000,
  regk_marb_bp_rw_options_default          = 0x00000000,
  regk_marb_bp_yes                         = 0x00000001
};
#endif /* __marb_bp_defs_h */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
51533b61 MS	2	#ifndef __marb_bp_defs_h
	3	#define __marb_bp_defs_h
	4
	5	/*
	6	* This file is autogenerated from
	7	* file: ../../inst/memarb/rtl/guinness/marb_top.r
	8	* id: <not found>
	9	* last modfied: Fri Nov 7 15:36:04 2003
	10	*
	11	* by /n/asic/projects/guinness/design/top/inst/rdesc/rdes2c ../../rtl/global.rmap ../../mod/modreg.rmap -base 0xb0000000 ../../inst/memarb/rtl/guinness/marb_top.r
	12	* id: $Id: marb_bp_defs.h,v 1.2 2004/06/04 07:15:33 starvik Exp $
	13	* Any changes here will be lost.
	14	*
	15	* -- buffer-read-only: t --
	16	*/
	17	/* Main access macros */
	18	#ifndef REG_RD
	19	#define REG_RD( scope, inst, reg ) \
	20	REG_READ( reg_##scope##_##reg, \
	21	(inst) + REG_RD_ADDR_##scope##_##reg )
	22	#endif
	23
	24	#ifndef REG_WR
	25	#define REG_WR( scope, inst, reg, val ) \
	26	REG_WRITE( reg_##scope##_##reg, \
	27	(inst) + REG_WR_ADDR_##scope##_##reg, (val) )
	28	#endif
	29
	30	#ifndef REG_RD_VECT
	31	#define REG_RD_VECT( scope, inst, reg, index ) \
	32	REG_READ( reg_##scope##_##reg, \
	33	(inst) + REG_RD_ADDR_##scope##_##reg + \
	34	(index) * STRIDE_##scope##_##reg )
	35	#endif
	36
	37	#ifndef REG_WR_VECT
	38	#define REG_WR_VECT( scope, inst, reg, index, val ) \
	39	REG_WRITE( reg_##scope##_##reg, \
	40	(inst) + REG_WR_ADDR_##scope##_##reg + \
	41	(index) * STRIDE_##scope##_##reg, (val) )
	42	#endif
	43
	44	#ifndef REG_RD_INT
	45	#define REG_RD_INT( scope, inst, reg ) \
	46	REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
	47	#endif
	48
	49	#ifndef REG_WR_INT
	50	#define REG_WR_INT( scope, inst, reg, val ) \
	51	REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
	52	#endif
	53
	54	#ifndef REG_RD_INT_VECT
	55	#define REG_RD_INT_VECT( scope, inst, reg, index ) \
	56	REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
	57	(index) * STRIDE_##scope##_##reg )
	58	#endif
	59
	60	#ifndef REG_WR_INT_VECT
	61	#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
	62	REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
	63	(index) * STRIDE_##scope##_##reg, (val) )
	64	#endif
	65
66	#ifndef REG_TYPE_CONV
67	#define REG_TYPE_CONV( type, orgtype, val ) \
68	( { union { orgtype o; type n; } r; r.o = val; r.n; } )
69	#endif
70
71	#ifndef reg_page_size
72	#define reg_page_size 8192
73	#endif
74
75	/* C-code for register scope marb_bp */
76
77	/* Register rw_first_addr, scope marb_bp, type rw */
78	typedef unsigned int reg_marb_bp_rw_first_addr;
79	#define REG_RD_ADDR_marb_bp_rw_first_addr 0
80	#define REG_WR_ADDR_marb_bp_rw_first_addr 0
81
82	/* Register rw_last_addr, scope marb_bp, type rw */
83	typedef unsigned int reg_marb_bp_rw_last_addr;
84	#define REG_RD_ADDR_marb_bp_rw_last_addr 4
85	#define REG_WR_ADDR_marb_bp_rw_last_addr 4
86
87	/* Register rw_op, scope marb_bp, type rw */
88	typedef struct {
89	unsigned int read : 1;
90	unsigned int write : 1;
91	unsigned int read_excl : 1;
92	unsigned int pri_write : 1;
93	unsigned int us_read : 1;
94	unsigned int us_write : 1;
95	unsigned int us_read_excl : 1;
96	unsigned int us_pri_write : 1;
97	unsigned int dummy1 : 24;
98	} reg_marb_bp_rw_op;
99	#define REG_RD_ADDR_marb_bp_rw_op 8
100	#define REG_WR_ADDR_marb_bp_rw_op 8
101
102	/* Register rw_clients, scope marb_bp, type rw */
103	typedef struct {
104	unsigned int dma0 : 1;
105	unsigned int dma1 : 1;
106	unsigned int dma2 : 1;
107	unsigned int dma3 : 1;
108	unsigned int dma4 : 1;
109	unsigned int dma5 : 1;
110	unsigned int dma6 : 1;
111	unsigned int dma7 : 1;
112	unsigned int dma8 : 1;
113	unsigned int dma9 : 1;
114	unsigned int cpui : 1;
115	unsigned int cpud : 1;
116	unsigned int iop : 1;
117	unsigned int slave : 1;
118	unsigned int dummy1 : 18;
119	} reg_marb_bp_rw_clients;
120	#define REG_RD_ADDR_marb_bp_rw_clients 12
121	#define REG_WR_ADDR_marb_bp_rw_clients 12
122
123	/* Register rw_options, scope marb_bp, type rw */
124	typedef struct {
125	unsigned int wrap : 1;
126	unsigned int dummy1 : 31;
127	} reg_marb_bp_rw_options;
128	#define REG_RD_ADDR_marb_bp_rw_options 16
129	#define REG_WR_ADDR_marb_bp_rw_options 16
130
131	/* Register r_break_addr, scope marb_bp, type r */
132	typedef unsigned int reg_marb_bp_r_break_addr;
133	#define REG_RD_ADDR_marb_bp_r_break_addr 20
134
135	/* Register r_break_op, scope marb_bp, type r */
136	typedef struct {
137	unsigned int read : 1;
138	unsigned int write : 1;
139	unsigned int read_excl : 1;
140	unsigned int pri_write : 1;
141	unsigned int us_read : 1;
142	unsigned int us_write : 1;
143	unsigned int us_read_excl : 1;
144	unsigned int us_pri_write : 1;
145	unsigned int dummy1 : 24;
146	} reg_marb_bp_r_break_op;
147	#define REG_RD_ADDR_marb_bp_r_break_op 24
148
149	/* Register r_break_clients, scope marb_bp, type r */
150	typedef struct {
151	unsigned int dma0 : 1;
152	unsigned int dma1 : 1;
153	unsigned int dma2 : 1;
154	unsigned int dma3 : 1;
155	unsigned int dma4 : 1;
156	unsigned int dma5 : 1;
157	unsigned int dma6 : 1;
158	unsigned int dma7 : 1;
159	unsigned int dma8 : 1;
160	unsigned int dma9 : 1;
161	unsigned int cpui : 1;
162	unsigned int cpud : 1;
163	unsigned int iop : 1;
164	unsigned int slave : 1;
165	unsigned int dummy1 : 18;
166	} reg_marb_bp_r_break_clients;
167	#define REG_RD_ADDR_marb_bp_r_break_clients 28
168
169	/* Register r_break_first_client, scope marb_bp, type r */
170	typedef struct {
171	unsigned int dma0 : 1;
172	unsigned int dma1 : 1;
173	unsigned int dma2 : 1;
174	unsigned int dma3 : 1;
175	unsigned int dma4 : 1;
176	unsigned int dma5 : 1;
177	unsigned int dma6 : 1;
178	unsigned int dma7 : 1;
179	unsigned int dma8 : 1;
180	unsigned int dma9 : 1;
181	unsigned int cpui : 1;
182	unsigned int cpud : 1;
183	unsigned int iop : 1;
184	unsigned int slave : 1;
185	unsigned int dummy1 : 18;
186	} reg_marb_bp_r_break_first_client;
187	#define REG_RD_ADDR_marb_bp_r_break_first_client 32
188
189	/* Register r_break_size, scope marb_bp, type r */
190	typedef unsigned int reg_marb_bp_r_break_size;
191	#define REG_RD_ADDR_marb_bp_r_break_size 36
192
193	/* Register rw_ack, scope marb_bp, type rw */
194	typedef unsigned int reg_marb_bp_rw_ack;
195	#define REG_RD_ADDR_marb_bp_rw_ack 40
196	#define REG_WR_ADDR_marb_bp_rw_ack 40
197
198
199	/* Constants */
200	enum {
201	regk_marb_bp_no = 0x00000000,
202	regk_marb_bp_rw_op_default = 0x00000000,
203	regk_marb_bp_rw_options_default = 0x00000000,
204	regk_marb_bp_yes = 0x00000001
205	};
206	#endif /* __marb_bp_defs_h */